-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
/*
* Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
*
*/
#include "pipe/p_state.h"
+#include "util/u_dual_blend.h"
#include "util/u_string.h"
#include "util/u_memory.h"
#include "util/u_helpers.h"
#include "freedreno_state.h"
#include "freedreno_context.h"
-#include "freedreno_zsa.h"
-#include "freedreno_rasterizer.h"
-#include "freedreno_blend.h"
-#include "freedreno_program.h"
#include "freedreno_resource.h"
#include "freedreno_texture.h"
#include "freedreno_gmem.h"
+#include "freedreno_query_hw.h"
#include "freedreno_util.h"
+/* All the generic state handling.. In case of CSO's that are specific
+ * to the GPU version, when the bind and the delete are common they can
+ * go in here.
+ */
+
static void
fd_set_blend_color(struct pipe_context *pctx,
const struct pipe_blend_color *blend_color)
fd_set_clip_state(struct pipe_context *pctx,
const struct pipe_clip_state *clip)
{
- DBG("TODO: ");
+ struct fd_context *ctx = fd_context(pctx);
+ ctx->ucp = *clip;
+ ctx->dirty |= FD_DIRTY_UCP;
}
static void
ctx->dirty |= FD_DIRTY_SAMPLE_MASK;
}
+static void
+fd_set_min_samples(struct pipe_context *pctx, unsigned min_samples)
+{
+ struct fd_context *ctx = fd_context(pctx);
+ ctx->min_samples = min_samples;
+ ctx->dirty |= FD_DIRTY_MIN_SAMPLES;
+}
+
/* notes from calim on #dri-devel:
* index==0 will be non-UBO (ie. glUniformXYZ()) all packed together padded
* out to vec4's
* index>0 will be UBO's.. well, I'll worry about that later
*/
static void
-fd_set_constant_buffer(struct pipe_context *pctx, uint shader, uint index,
- struct pipe_constant_buffer *cb)
+fd_set_constant_buffer(struct pipe_context *pctx,
+ enum pipe_shader_type shader, uint index,
+ const struct pipe_constant_buffer *cb)
{
struct fd_context *ctx = fd_context(pctx);
struct fd_constbuf_stateobj *so = &ctx->constbuf[shader];
- /* Note that the state tracker can unbind constant buffers by
+ util_copy_constant_buffer(&so->cb[index], cb);
+
+ /* Note that gallium frontends can unbind constant buffers by
* passing NULL here.
*/
if (unlikely(!cb)) {
so->enabled_mask &= ~(1 << index);
- so->dirty_mask &= ~(1 << index);
- pipe_resource_reference(&so->cb[index].buffer, NULL);
return;
}
- pipe_resource_reference(&so->cb[index].buffer, cb->buffer);
- so->cb[index].buffer_offset = cb->buffer_offset;
- so->cb[index].buffer_size = cb->buffer_size;
- so->cb[index].user_buffer = cb->user_buffer;
-
so->enabled_mask |= 1 << index;
- so->dirty_mask |= 1 << index;
- ctx->dirty |= FD_DIRTY_CONSTBUF;
+ ctx->dirty_shader[shader] |= FD_DIRTY_SHADER_CONST;
+ ctx->dirty |= FD_DIRTY_CONST;
+
+ fd_resource_set_usage(cb->buffer, FD_DIRTY_CONST);
+}
+
+static void
+fd_set_shader_buffers(struct pipe_context *pctx,
+ enum pipe_shader_type shader,
+ unsigned start, unsigned count,
+ const struct pipe_shader_buffer *buffers,
+ unsigned writable_bitmask)
+{
+ struct fd_context *ctx = fd_context(pctx);
+ struct fd_shaderbuf_stateobj *so = &ctx->shaderbuf[shader];
+ const unsigned modified_bits = u_bit_consecutive(start, count);
+
+ so->enabled_mask &= ~modified_bits;
+ so->writable_mask &= ~modified_bits;
+ so->writable_mask |= writable_bitmask << start;
+
+ for (unsigned i = 0; i < count; i++) {
+ unsigned n = i + start;
+ struct pipe_shader_buffer *buf = &so->sb[n];
+
+ if (buffers && buffers[i].buffer) {
+ if ((buf->buffer == buffers[i].buffer) &&
+ (buf->buffer_offset == buffers[i].buffer_offset) &&
+ (buf->buffer_size == buffers[i].buffer_size))
+ continue;
+
+ buf->buffer_offset = buffers[i].buffer_offset;
+ buf->buffer_size = buffers[i].buffer_size;
+ pipe_resource_reference(&buf->buffer, buffers[i].buffer);
+
+ fd_resource_set_usage(buffers[i].buffer, FD_DIRTY_SSBO);
+
+ so->enabled_mask |= BIT(n);
+ } else {
+ pipe_resource_reference(&buf->buffer, NULL);
+ }
+ }
+
+ ctx->dirty_shader[shader] |= FD_DIRTY_SHADER_SSBO;
+ ctx->dirty |= FD_DIRTY_SSBO;
+}
+
+void
+fd_set_shader_images(struct pipe_context *pctx,
+ enum pipe_shader_type shader,
+ unsigned start, unsigned count,
+ const struct pipe_image_view *images)
+{
+ struct fd_context *ctx = fd_context(pctx);
+ struct fd_shaderimg_stateobj *so = &ctx->shaderimg[shader];
+
+ unsigned mask = 0;
+
+ if (images) {
+ for (unsigned i = 0; i < count; i++) {
+ unsigned n = i + start;
+ struct pipe_image_view *buf = &so->si[n];
+
+ if ((buf->resource == images[i].resource) &&
+ (buf->format == images[i].format) &&
+ (buf->access == images[i].access) &&
+ !memcmp(&buf->u, &images[i].u, sizeof(buf->u)))
+ continue;
+
+ mask |= BIT(n);
+ util_copy_image_view(buf, &images[i]);
+
+ if (buf->resource) {
+ fd_resource_set_usage(buf->resource, FD_DIRTY_IMAGE);
+ so->enabled_mask |= BIT(n);
+ } else {
+ so->enabled_mask &= ~BIT(n);
+ }
+ }
+ } else {
+ mask = (BIT(count) - 1) << start;
+
+ for (unsigned i = 0; i < count; i++) {
+ unsigned n = i + start;
+ struct pipe_image_view *img = &so->si[n];
+
+ pipe_resource_reference(&img->resource, NULL);
+ }
+
+ so->enabled_mask &= ~mask;
+ }
+
+ ctx->dirty_shader[shader] |= FD_DIRTY_SHADER_IMAGE;
+ ctx->dirty |= FD_DIRTY_IMAGE;
}
static void
const struct pipe_framebuffer_state *framebuffer)
{
struct fd_context *ctx = fd_context(pctx);
- struct pipe_framebuffer_state *cso = &ctx->framebuffer;
- unsigned i;
+ struct pipe_framebuffer_state *cso;
+
+ DBG("%ux%u, %u layers, %u samples",
+ framebuffer->width, framebuffer->height,
+ framebuffer->layers, framebuffer->samples);
+
+ fd_context_switch_from(ctx);
+
+ cso = &ctx->framebuffer;
+
+ if (util_framebuffer_state_equal(cso, framebuffer))
+ return;
+
+ util_copy_framebuffer_state(cso, framebuffer);
+
+ cso->samples = util_framebuffer_get_num_samples(cso);
+
+ if (ctx->screen->reorder) {
+ struct fd_batch *old_batch = NULL;
- DBG("%d: cbufs[0]=%p, zsbuf=%p", ctx->needs_flush,
- cso->cbufs[0], cso->zsbuf);
+ fd_batch_reference(&old_batch, ctx->batch);
- fd_context_render(pctx);
+ if (likely(old_batch))
+ fd_batch_set_stage(old_batch, FD_STAGE_NULL);
- for (i = 0; i < framebuffer->nr_cbufs; i++)
- pipe_surface_reference(&cso->cbufs[i], framebuffer->cbufs[i]);
- for (; i < ctx->framebuffer.nr_cbufs; i++)
- pipe_surface_reference(&cso->cbufs[i], NULL);
+ fd_batch_reference(&ctx->batch, NULL);
+ fd_context_all_dirty(ctx);
- cso->nr_cbufs = framebuffer->nr_cbufs;
- cso->width = framebuffer->width;
- cso->height = framebuffer->height;
+ if (old_batch && old_batch->blit && !old_batch->back_blit) {
+ /* for blits, there is not really much point in hanging on
+ * to the uncommitted batch (ie. you probably don't blit
+ * multiple times to the same surface), so we might as
+ * well go ahead and flush this one:
+ */
+ fd_batch_flush(old_batch);
+ }
- pipe_surface_reference(&cso->zsbuf, framebuffer->zsbuf);
+ fd_batch_reference(&old_batch, NULL);
+ } else if (ctx->batch) {
+ DBG("%d: cbufs[0]=%p, zsbuf=%p", ctx->batch->needs_flush,
+ framebuffer->cbufs[0], framebuffer->zsbuf);
+ fd_batch_flush(ctx->batch);
+ }
ctx->dirty |= FD_DIRTY_FRAMEBUFFER;
- /* also need to reset the scissor.. mesa/gl state tracker
- * does this for us, but u_blitter doesn't and other
- * state trackers might not..
- */
- ctx->scissor.minx = 0;
- ctx->scissor.miny = 0;
- ctx->scissor.maxx = cso->width;
- ctx->scissor.maxy = cso->height;
+ ctx->disabled_scissor.minx = 0;
+ ctx->disabled_scissor.miny = 0;
+ ctx->disabled_scissor.maxx = cso->width;
+ ctx->disabled_scissor.maxy = cso->height;
ctx->dirty |= FD_DIRTY_SCISSOR;
}
}
static void
-fd_set_scissor_state(struct pipe_context *pctx,
+fd_set_scissor_states(struct pipe_context *pctx,
+ unsigned start_slot,
+ unsigned num_scissors,
const struct pipe_scissor_state *scissor)
{
struct fd_context *ctx = fd_context(pctx);
}
static void
-fd_set_viewport_state(struct pipe_context *pctx,
+fd_set_viewport_states(struct pipe_context *pctx,
+ unsigned start_slot,
+ unsigned num_viewports,
const struct pipe_viewport_state *viewport)
{
struct fd_context *ctx = fd_context(pctx);
+ struct pipe_scissor_state *scissor = &ctx->viewport_scissor;
+ float minx, miny, maxx, maxy;
+
ctx->viewport = *viewport;
+
+ /* see si_get_scissor_from_viewport(): */
+
+ /* Convert (-1, -1) and (1, 1) from clip space into window space. */
+ minx = -viewport->scale[0] + viewport->translate[0];
+ miny = -viewport->scale[1] + viewport->translate[1];
+ maxx = viewport->scale[0] + viewport->translate[0];
+ maxy = viewport->scale[1] + viewport->translate[1];
+
+ /* Handle inverted viewports. */
+ if (minx > maxx) {
+ swap(minx, maxx);
+ }
+ if (miny > maxy) {
+ swap(miny, maxy);
+ }
+
+ debug_assert(miny >= 0);
+ debug_assert(maxy >= 0);
+
+ /* Convert to integer and round up the max bounds. */
+ scissor->minx = minx;
+ scissor->miny = miny;
+ scissor->maxx = ceilf(maxx);
+ scissor->maxy = ceilf(maxy);
+
ctx->dirty |= FD_DIRTY_VIEWPORT;
}
const struct pipe_vertex_buffer *vb)
{
struct fd_context *ctx = fd_context(pctx);
- struct fd_vertexbuf_stateobj *so = &ctx->vertexbuf;
+ struct fd_vertexbuf_stateobj *so = &ctx->vtx.vertexbuf;
int i;
/* on a2xx, pitch is encoded in the vtx fetch instruction, so
* we need to mark VTXSTATE as dirty as well to trigger patching
* and re-emitting the vtx shader:
*/
- for (i = 0; i < count; i++) {
- bool new_enabled = vb && (vb[i].buffer || vb[i].user_buffer);
- bool old_enabled = so->vb[i].buffer || so->vb[i].user_buffer;
- uint32_t new_stride = vb ? vb[i].stride : 0;
- uint32_t old_stride = so->vb[i].stride;
- if ((new_enabled != old_enabled) || (new_stride != old_stride)) {
- ctx->dirty |= FD_DIRTY_VTXSTATE;
- break;
+ if (ctx->screen->gpu_id < 300) {
+ for (i = 0; i < count; i++) {
+ bool new_enabled = vb && vb[i].buffer.resource;
+ bool old_enabled = so->vb[i].buffer.resource != NULL;
+ uint32_t new_stride = vb ? vb[i].stride : 0;
+ uint32_t old_stride = so->vb[i].stride;
+ if ((new_enabled != old_enabled) || (new_stride != old_stride)) {
+ ctx->dirty |= FD_DIRTY_VTXSTATE;
+ break;
+ }
}
}
util_set_vertex_buffers_mask(so->vb, &so->enabled_mask, vb, start_slot, count);
so->count = util_last_bit(so->enabled_mask);
+ if (!vb)
+ return;
+
ctx->dirty |= FD_DIRTY_VTXBUF;
+
+ for (unsigned i = 0; i < count; i++) {
+ assert(!vb[i].is_user_buffer);
+ fd_resource_set_usage(vb[i].buffer.resource, FD_DIRTY_VTXBUF);
+ }
+}
+
+static void
+fd_blend_state_bind(struct pipe_context *pctx, void *hwcso)
+{
+ struct fd_context *ctx = fd_context(pctx);
+ struct pipe_blend_state *cso = hwcso;
+ bool old_is_dual = ctx->blend ?
+ ctx->blend->rt[0].blend_enable && util_blend_state_is_dual(ctx->blend, 0) :
+ false;
+ bool new_is_dual = cso ?
+ cso->rt[0].blend_enable && util_blend_state_is_dual(cso, 0) :
+ false;
+ ctx->blend = hwcso;
+ ctx->dirty |= FD_DIRTY_BLEND;
+ if (old_is_dual != new_is_dual)
+ ctx->dirty |= FD_DIRTY_BLEND_DUAL;
}
static void
-fd_set_index_buffer(struct pipe_context *pctx,
- const struct pipe_index_buffer *ib)
+fd_blend_state_delete(struct pipe_context *pctx, void *hwcso)
+{
+ FREE(hwcso);
+}
+
+static void
+fd_rasterizer_state_bind(struct pipe_context *pctx, void *hwcso)
{
struct fd_context *ctx = fd_context(pctx);
+ struct pipe_scissor_state *old_scissor = fd_context_get_scissor(ctx);
+ bool discard = ctx->rasterizer && ctx->rasterizer->rasterizer_discard;
+
+ ctx->rasterizer = hwcso;
+ ctx->dirty |= FD_DIRTY_RASTERIZER;
- if (ib) {
- pipe_resource_reference(&ctx->indexbuf.buffer, ib->buffer);
- ctx->indexbuf.index_size = ib->index_size;
- ctx->indexbuf.offset = ib->offset;
- ctx->indexbuf.user_buffer = ib->user_buffer;
+ if (ctx->rasterizer && ctx->rasterizer->scissor) {
+ ctx->current_scissor = &ctx->scissor;
} else {
- pipe_resource_reference(&ctx->indexbuf.buffer, NULL);
+ ctx->current_scissor = &ctx->disabled_scissor;
}
- ctx->dirty |= FD_DIRTY_INDEXBUF;
+ /* if scissor enable bit changed we need to mark scissor
+ * state as dirty as well:
+ * NOTE: we can do a shallow compare, since we only care
+ * if it changed to/from &ctx->disable_scissor
+ */
+ if (old_scissor != fd_context_get_scissor(ctx))
+ ctx->dirty |= FD_DIRTY_SCISSOR;
+
+ if (ctx->rasterizer && (discard != ctx->rasterizer->rasterizer_discard))
+ ctx->dirty |= FD_DIRTY_RASTERIZER_DISCARD;
}
-void
-fd_state_init(struct pipe_context *pctx)
+static void
+fd_rasterizer_state_delete(struct pipe_context *pctx, void *hwcso)
{
- pctx->set_blend_color = fd_set_blend_color;
- pctx->set_stencil_ref = fd_set_stencil_ref;
- pctx->set_clip_state = fd_set_clip_state;
- pctx->set_sample_mask = fd_set_sample_mask;
- pctx->set_constant_buffer = fd_set_constant_buffer;
- pctx->set_framebuffer_state = fd_set_framebuffer_state;
- pctx->set_polygon_stipple = fd_set_polygon_stipple;
- pctx->set_scissor_state = fd_set_scissor_state;
- pctx->set_viewport_state = fd_set_viewport_state;
-
- pctx->set_vertex_buffers = fd_set_vertex_buffers;
- pctx->set_index_buffer = fd_set_index_buffer;
+ FREE(hwcso);
}
-/* NOTE: just define the position for const regs statically.. the blob
- * driver doesn't seem to change these dynamically, and I can't really
- * think of a good reason to so..
- */
-#define VS_CONST_BASE 0x20
-#define PS_CONST_BASE 0x120
+static void
+fd_zsa_state_bind(struct pipe_context *pctx, void *hwcso)
+{
+ struct fd_context *ctx = fd_context(pctx);
+ ctx->zsa = hwcso;
+ ctx->dirty |= FD_DIRTY_ZSA;
+}
static void
-emit_constants(struct fd_ringbuffer *ring, uint32_t base,
- struct fd_constbuf_stateobj *constbuf,
- struct fd_shader_stateobj *shader)
+fd_zsa_state_delete(struct pipe_context *pctx, void *hwcso)
{
- uint32_t enabled_mask = constbuf->enabled_mask;
- uint32_t start_base = base;
- unsigned i;
+ FREE(hwcso);
+}
- // XXX TODO only emit dirty consts.. but we need to keep track if
- // they are clobbered by a clear, gmem2mem, or mem2gmem..
- constbuf->dirty_mask = enabled_mask;
+static void *
+fd_vertex_state_create(struct pipe_context *pctx, unsigned num_elements,
+ const struct pipe_vertex_element *elements)
+{
+ struct fd_vertex_stateobj *so = CALLOC_STRUCT(fd_vertex_stateobj);
- /* emit user constants: */
- while (enabled_mask) {
- unsigned index = ffs(enabled_mask) - 1;
- struct pipe_constant_buffer *cb = &constbuf->cb[index];
- unsigned size = align(cb->buffer_size, 4) / 4; /* size in dwords */
+ if (!so)
+ return NULL;
- // I expect that size should be a multiple of vec4's:
- assert(size == align(size, 4));
+ memcpy(so->pipe, elements, sizeof(*elements) * num_elements);
+ so->num_elements = num_elements;
- /* hmm, sometimes we still seem to end up with consts bound,
- * even if shader isn't using them, which ends up overwriting
- * const reg's used for immediates.. this is a hack to work
- * around that:
- */
- if (shader && ((base - start_base) >= (shader->first_immediate * 4)))
- break;
+ return so;
+}
- if (constbuf->dirty_mask & (1 << index)) {
- const uint32_t *dwords;
+static void
+fd_vertex_state_delete(struct pipe_context *pctx, void *hwcso)
+{
+ FREE(hwcso);
+}
- if (cb->user_buffer) {
- dwords = cb->user_buffer;
- } else {
- struct fd_resource *rsc = fd_resource(cb->buffer);
- dwords = fd_bo_map(rsc->bo);
- }
+static void
+fd_vertex_state_bind(struct pipe_context *pctx, void *hwcso)
+{
+ struct fd_context *ctx = fd_context(pctx);
+ ctx->vtx.vtx = hwcso;
+ ctx->dirty |= FD_DIRTY_VTXSTATE;
+}
- dwords = (uint32_t *)(((uint8_t *)dwords) + cb->buffer_offset);
+static struct pipe_stream_output_target *
+fd_create_stream_output_target(struct pipe_context *pctx,
+ struct pipe_resource *prsc, unsigned buffer_offset,
+ unsigned buffer_size)
+{
+ struct pipe_stream_output_target *target;
+ struct fd_resource *rsc = fd_resource(prsc);
- OUT_PKT3(ring, CP_SET_CONSTANT, size + 1);
- OUT_RING(ring, base);
- for (i = 0; i < size; i++)
- OUT_RING(ring, *(dwords++));
+ target = CALLOC_STRUCT(pipe_stream_output_target);
+ if (!target)
+ return NULL;
- constbuf->dirty_mask &= ~(1 << index);
- }
+ pipe_reference_init(&target->reference, 1);
+ pipe_resource_reference(&target->buffer, prsc);
- base += size;
- enabled_mask &= ~(1 << index);
- }
+ target->context = pctx;
+ target->buffer_offset = buffer_offset;
+ target->buffer_size = buffer_size;
- /* emit shader immediates: */
- if (shader) {
- for (i = 0; i < shader->num_immediates; i++) {
- OUT_PKT3(ring, CP_SET_CONSTANT, 5);
- OUT_RING(ring, start_base + (4 * (shader->first_immediate + i)));
- OUT_RING(ring, shader->immediates[i].val[0]);
- OUT_RING(ring, shader->immediates[i].val[1]);
- OUT_RING(ring, shader->immediates[i].val[2]);
- OUT_RING(ring, shader->immediates[i].val[3]);
- base += 4;
- }
- }
+ assert(rsc->base.target == PIPE_BUFFER);
+ util_range_add(&rsc->base, &rsc->valid_buffer_range,
+ buffer_offset, buffer_offset + buffer_size);
+
+ return target;
}
-/* this works at least for a220 and earlier.. if later gpu's gain more than
- * 32 texture units, might need to bump this up to uint64_t
- */
-typedef uint32_t texmask;
+static void
+fd_stream_output_target_destroy(struct pipe_context *pctx,
+ struct pipe_stream_output_target *target)
+{
+ pipe_resource_reference(&target->buffer, NULL);
+ FREE(target);
+}
-static texmask
-emit_texture(struct fd_ringbuffer *ring, struct fd_context *ctx,
- struct fd_texture_stateobj *tex, unsigned samp_id, texmask emitted)
+static void
+fd_set_stream_output_targets(struct pipe_context *pctx,
+ unsigned num_targets, struct pipe_stream_output_target **targets,
+ const unsigned *offsets)
{
- unsigned const_idx = fd_get_const_idx(ctx, tex, samp_id);
- struct fd_sampler_stateobj *sampler;
- struct fd_pipe_sampler_view *view;
+ struct fd_context *ctx = fd_context(pctx);
+ struct fd_streamout_stateobj *so = &ctx->streamout;
+ unsigned i;
- if (emitted & (1 << const_idx))
- return 0;
+ debug_assert(num_targets <= ARRAY_SIZE(so->targets));
- sampler = tex->samplers[samp_id];
- view = fd_pipe_sampler_view(tex->textures[samp_id]);
+ for (i = 0; i < num_targets; i++) {
+ boolean changed = targets[i] != so->targets[i];
+ boolean reset = (offsets[i] != (unsigned)-1);
- OUT_PKT3(ring, CP_SET_CONSTANT, 7);
- OUT_RING(ring, 0x00010000 + (0x6 * const_idx));
+ so->reset |= (reset << i);
- OUT_RING(ring, sampler->tex0 | view->tex0);
- OUT_RELOC(ring, view->tex_resource->bo, 0, view->fmt);
- OUT_RING(ring, view->tex2);
- OUT_RING(ring, sampler->tex3 | view->tex3);
- OUT_RING(ring, sampler->tex4);
- OUT_RING(ring, sampler->tex5);
+ if (!changed && !reset)
+ continue;
- return (1 << const_idx);
-}
+ if (reset)
+ so->offsets[i] = offsets[i];
-static void
-emit_textures(struct fd_ringbuffer *ring, struct fd_context *ctx)
-{
- texmask emitted = 0;
- unsigned i;
+ pipe_so_target_reference(&so->targets[i], targets[i]);
+ }
- for (i = 0; i < ctx->verttex.num_samplers; i++)
- if (ctx->verttex.samplers[i])
- emitted |= emit_texture(ring, ctx, &ctx->verttex, i, emitted);
+ for (; i < so->num_targets; i++) {
+ pipe_so_target_reference(&so->targets[i], NULL);
+ }
+
+ so->num_targets = num_targets;
- for (i = 0; i < ctx->fragtex.num_samplers; i++)
- if (ctx->fragtex.samplers[i])
- emitted |= emit_texture(ring, ctx, &ctx->fragtex, i, emitted);
+ ctx->dirty |= FD_DIRTY_STREAMOUT;
}
-void
-fd_emit_vertex_bufs(struct fd_ringbuffer *ring, uint32_t val,
- struct fd_vertex_buf *vbufs, uint32_t n)
+static void
+fd_bind_compute_state(struct pipe_context *pctx, void *state)
{
- unsigned i;
+ struct fd_context *ctx = fd_context(pctx);
+ ctx->compute = state;
+ ctx->dirty_shader[PIPE_SHADER_COMPUTE] |= FD_DIRTY_SHADER_PROG;
+}
- OUT_PKT3(ring, CP_SET_CONSTANT, 1 + (2 * n));
- OUT_RING(ring, (0x1 << 16) | (val & 0xffff));
- for (i = 0; i < n; i++) {
- struct fd_resource *rsc = fd_resource(vbufs[i].prsc);
- OUT_RELOC(ring, rsc->bo, vbufs[i].offset, 3);
- OUT_RING (ring, vbufs[i].size);
- }
+static void
+fd_set_compute_resources(struct pipe_context *pctx,
+ unsigned start, unsigned count, struct pipe_surface **prscs)
+{
+ // TODO
}
-void
-fd_state_emit(struct pipe_context *pctx, uint32_t dirty)
+/* used by clover to bind global objects, returning the bo address
+ * via handles[n]
+ */
+static void
+fd_set_global_binding(struct pipe_context *pctx,
+ unsigned first, unsigned count, struct pipe_resource **prscs,
+ uint32_t **handles)
{
struct fd_context *ctx = fd_context(pctx);
- struct fd_ringbuffer *ring = ctx->ring;
+ struct fd_global_bindings_stateobj *so = &ctx->global_bindings;
+ unsigned mask = 0;
- /* NOTE: we probably want to eventually refactor this so each state
- * object handles emitting it's own state.. although the mapping of
- * state to registers is not always orthogonal, sometimes a single
- * register contains bitfields coming from multiple state objects,
- * so not sure the best way to deal with that yet.
- */
+ if (prscs) {
+ for (unsigned i = 0; i < count; i++) {
+ unsigned n = i + first;
- if (dirty & FD_DIRTY_SAMPLE_MASK) {
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_AA_MASK));
- OUT_RING(ring, ctx->sample_mask);
- }
+ mask |= BIT(n);
- if (dirty & FD_DIRTY_ZSA) {
- struct pipe_stencil_ref *sr = &ctx->stencil_ref;
+ pipe_resource_reference(&so->buf[n], prscs[i]);
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_DEPTHCONTROL));
- OUT_RING(ring, ctx->zsa->rb_depthcontrol);
+ if (so->buf[n]) {
+ struct fd_resource *rsc = fd_resource(so->buf[n]);
+ uint64_t iova = fd_bo_get_iova(rsc->bo);
+ // TODO need to scream if iova > 32b or fix gallium API..
+ *handles[i] += iova;
+ }
- OUT_PKT3(ring, CP_SET_CONSTANT, 4);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_STENCILREFMASK_BF));
- OUT_RING(ring, ctx->zsa->rb_stencilrefmask_bf |
- A2XX_RB_STENCILREFMASK_STENCILREF(sr->ref_value[1]));
- OUT_RING(ring, ctx->zsa->rb_stencilrefmask |
- A2XX_RB_STENCILREFMASK_STENCILREF(sr->ref_value[0]));
- OUT_RING(ring, ctx->zsa->rb_alpha_ref);
- }
+ if (prscs[i])
+ so->enabled_mask |= BIT(n);
+ else
+ so->enabled_mask &= ~BIT(n);
+ }
+ } else {
+ mask = (BIT(count) - 1) << first;
- if (dirty & (FD_DIRTY_RASTERIZER | FD_DIRTY_FRAMEBUFFER)) {
- OUT_PKT3(ring, CP_SET_CONSTANT, 3);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_CLIP_CNTL));
- OUT_RING(ring, ctx->rasterizer->pa_cl_clip_cntl);
- OUT_RING(ring, ctx->rasterizer->pa_su_sc_mode_cntl |
- A2XX_PA_SU_SC_MODE_CNTL_VTX_WINDOW_OFFSET_ENABLE);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 5);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_SU_POINT_SIZE));
- OUT_RING(ring, ctx->rasterizer->pa_su_point_size);
- OUT_RING(ring, ctx->rasterizer->pa_su_point_minmax);
- OUT_RING(ring, ctx->rasterizer->pa_su_line_cntl);
- OUT_RING(ring, ctx->rasterizer->pa_sc_line_stipple);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 6);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_SU_VTX_CNTL));
- OUT_RING(ring, ctx->rasterizer->pa_su_vtx_cntl);
- OUT_RING(ring, fui(1.0)); /* PA_CL_GB_VERT_CLIP_ADJ */
- OUT_RING(ring, fui(1.0)); /* PA_CL_GB_VERT_DISC_ADJ */
- OUT_RING(ring, fui(1.0)); /* PA_CL_GB_HORZ_CLIP_ADJ */
- OUT_RING(ring, fui(1.0)); /* PA_CL_GB_HORZ_DISC_ADJ */
- }
+ for (unsigned i = 0; i < count; i++) {
+ unsigned n = i + first;
+ pipe_resource_reference(&so->buf[n], NULL);
+ }
- if (dirty & FD_DIRTY_SCISSOR) {
- OUT_PKT3(ring, CP_SET_CONSTANT, 3);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_WINDOW_SCISSOR_TL));
- OUT_RING(ring, xy2d(ctx->scissor.minx, /* PA_SC_WINDOW_SCISSOR_TL */
- ctx->scissor.miny));
- OUT_RING(ring, xy2d(ctx->scissor.maxx, /* PA_SC_WINDOW_SCISSOR_BR */
- ctx->scissor.maxy));
-
- ctx->max_scissor.minx = MIN2(ctx->max_scissor.minx, ctx->scissor.minx);
- ctx->max_scissor.miny = MIN2(ctx->max_scissor.miny, ctx->scissor.miny);
- ctx->max_scissor.maxx = MAX2(ctx->max_scissor.maxx, ctx->scissor.maxx);
- ctx->max_scissor.maxy = MAX2(ctx->max_scissor.maxy, ctx->scissor.maxy);
+ so->enabled_mask &= ~mask;
}
- if (dirty & FD_DIRTY_VIEWPORT) {
- OUT_PKT3(ring, CP_SET_CONSTANT, 7);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_VPORT_XSCALE));
- OUT_RING(ring, fui(ctx->viewport.scale[0])); /* PA_CL_VPORT_XSCALE */
- OUT_RING(ring, fui(ctx->viewport.translate[0])); /* PA_CL_VPORT_XOFFSET */
- OUT_RING(ring, fui(ctx->viewport.scale[1])); /* PA_CL_VPORT_YSCALE */
- OUT_RING(ring, fui(ctx->viewport.translate[1])); /* PA_CL_VPORT_YOFFSET */
- OUT_RING(ring, fui(ctx->viewport.scale[2])); /* PA_CL_VPORT_ZSCALE */
- OUT_RING(ring, fui(ctx->viewport.translate[2])); /* PA_CL_VPORT_ZOFFSET */
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_VTE_CNTL));
- OUT_RING(ring, A2XX_PA_CL_VTE_CNTL_VTX_W0_FMT |
- A2XX_PA_CL_VTE_CNTL_VPORT_X_SCALE_ENA |
- A2XX_PA_CL_VTE_CNTL_VPORT_X_OFFSET_ENA |
- A2XX_PA_CL_VTE_CNTL_VPORT_Y_SCALE_ENA |
- A2XX_PA_CL_VTE_CNTL_VPORT_Y_OFFSET_ENA |
- A2XX_PA_CL_VTE_CNTL_VPORT_Z_SCALE_ENA |
- A2XX_PA_CL_VTE_CNTL_VPORT_Z_OFFSET_ENA);
- }
+}
- if (dirty & (FD_DIRTY_PROG | FD_DIRTY_VTXSTATE | FD_DIRTY_TEXSTATE)) {
- fd_program_validate(ctx);
- fd_program_emit(ring, &ctx->prog);
- }
+void
+fd_state_init(struct pipe_context *pctx)
+{
+ pctx->set_blend_color = fd_set_blend_color;
+ pctx->set_stencil_ref = fd_set_stencil_ref;
+ pctx->set_clip_state = fd_set_clip_state;
+ pctx->set_sample_mask = fd_set_sample_mask;
+ pctx->set_min_samples = fd_set_min_samples;
+ pctx->set_constant_buffer = fd_set_constant_buffer;
+ pctx->set_shader_buffers = fd_set_shader_buffers;
+ pctx->set_shader_images = fd_set_shader_images;
+ pctx->set_framebuffer_state = fd_set_framebuffer_state;
+ pctx->set_polygon_stipple = fd_set_polygon_stipple;
+ pctx->set_scissor_states = fd_set_scissor_states;
+ pctx->set_viewport_states = fd_set_viewport_states;
- if (dirty & (FD_DIRTY_PROG | FD_DIRTY_CONSTBUF)) {
- emit_constants(ring, VS_CONST_BASE * 4,
- &ctx->constbuf[PIPE_SHADER_VERTEX],
- (dirty & FD_DIRTY_PROG) ? ctx->prog.vp : NULL);
- emit_constants(ring, PS_CONST_BASE * 4,
- &ctx->constbuf[PIPE_SHADER_FRAGMENT],
- (dirty & FD_DIRTY_PROG) ? ctx->prog.fp : NULL);
- }
+ pctx->set_vertex_buffers = fd_set_vertex_buffers;
- if (dirty & (FD_DIRTY_BLEND | FD_DIRTY_ZSA)) {
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_COLORCONTROL));
- OUT_RING(ring, ctx->zsa->rb_colorcontrol | ctx->blend->rb_colorcontrol);
- }
+ pctx->bind_blend_state = fd_blend_state_bind;
+ pctx->delete_blend_state = fd_blend_state_delete;
- if (dirty & FD_DIRTY_BLEND) {
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_BLEND_CONTROL));
- OUT_RING(ring, ctx->blend->rb_blendcontrol);
+ pctx->bind_rasterizer_state = fd_rasterizer_state_bind;
+ pctx->delete_rasterizer_state = fd_rasterizer_state_delete;
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_MASK));
- OUT_RING(ring, ctx->blend->rb_colormask);
- }
+ pctx->bind_depth_stencil_alpha_state = fd_zsa_state_bind;
+ pctx->delete_depth_stencil_alpha_state = fd_zsa_state_delete;
- if (dirty & (FD_DIRTY_VERTTEX | FD_DIRTY_FRAGTEX | FD_DIRTY_PROG))
- emit_textures(ring, ctx);
+ if (!pctx->create_vertex_elements_state)
+ pctx->create_vertex_elements_state = fd_vertex_state_create;
+ pctx->delete_vertex_elements_state = fd_vertex_state_delete;
+ pctx->bind_vertex_elements_state = fd_vertex_state_bind;
- ctx->dirty &= ~dirty;
-}
+ pctx->create_stream_output_target = fd_create_stream_output_target;
+ pctx->stream_output_target_destroy = fd_stream_output_target_destroy;
+ pctx->set_stream_output_targets = fd_set_stream_output_targets;
-/* emit per-context initialization:
- */
-void
-fd_state_emit_setup(struct pipe_context *pctx)
-{
- struct fd_context *ctx = fd_context(pctx);
- struct fd_ringbuffer *ring = ctx->ring;
-
- OUT_PKT0(ring, REG_A2XX_TP0_CHICKEN, 1);
- OUT_RING(ring, 0x00000002);
-
- OUT_PKT3(ring, CP_INVALIDATE_STATE, 1);
- OUT_RING(ring, 0x00007fff);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_SQ_VS_CONST));
- OUT_RING(ring, A2XX_SQ_VS_CONST_BASE(VS_CONST_BASE) |
- A2XX_SQ_VS_CONST_SIZE(0x100));
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_SQ_PS_CONST));
- OUT_RING(ring, A2XX_SQ_PS_CONST_BASE(PS_CONST_BASE) |
- A2XX_SQ_PS_CONST_SIZE(0xe0));
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 3);
- OUT_RING(ring, CP_REG(REG_A2XX_VGT_MAX_VTX_INDX));
- OUT_RING(ring, 0xffffffff); /* VGT_MAX_VTX_INDX */
- OUT_RING(ring, 0x00000000); /* VGT_MIN_VTX_INDX */
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_VGT_INDX_OFFSET));
- OUT_RING(ring, 0x00000000);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL));
- OUT_RING(ring, 0x0000003b);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_SQ_CONTEXT_MISC));
- OUT_RING(ring, A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL(CENTERS_ONLY));
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_SQ_INTERPOLATOR_CNTL));
- OUT_RING(ring, 0xffffffff);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_AA_CONFIG));
- OUT_RING(ring, 0x00000000);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_LINE_CNTL));
- OUT_RING(ring, 0x00000000);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_WINDOW_OFFSET));
- OUT_RING(ring, 0x00000000);
-
- // XXX we change this dynamically for draw/clear.. vs gmem<->mem..
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_MODECONTROL));
- OUT_RING(ring, A2XX_RB_MODECONTROL_EDRAM_MODE(COLOR_DEPTH));
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_SAMPLE_POS));
- OUT_RING(ring, 0x88888888);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_DEST_MASK));
- OUT_RING(ring, 0xffffffff);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_COPY_DEST_INFO));
- OUT_RING(ring, A2XX_RB_COPY_DEST_INFO_FORMAT(COLORX_4_4_4_4) |
- A2XX_RB_COPY_DEST_INFO_WRITE_RED |
- A2XX_RB_COPY_DEST_INFO_WRITE_GREEN |
- A2XX_RB_COPY_DEST_INFO_WRITE_BLUE |
- A2XX_RB_COPY_DEST_INFO_WRITE_ALPHA);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 3);
- OUT_RING(ring, CP_REG(REG_A2XX_SQ_WRAPPING_0));
- OUT_RING(ring, 0x00000000); /* SQ_WRAPPING_0 */
- OUT_RING(ring, 0x00000000); /* SQ_WRAPPING_1 */
-
- OUT_PKT3(ring, CP_SET_DRAW_INIT_FLAGS, 1);
- OUT_RING(ring, 0x00000000);
-
- OUT_PKT3(ring, CP_WAIT_REG_EQ, 4);
- OUT_RING(ring, 0x000005d0);
- OUT_RING(ring, 0x00000000);
- OUT_RING(ring, 0x5f601000);
- OUT_RING(ring, 0x00000001);
-
- OUT_PKT0(ring, REG_A2XX_SQ_INST_STORE_MANAGMENT, 1);
- OUT_RING(ring, 0x00000180);
-
- OUT_PKT3(ring, CP_INVALIDATE_STATE, 1);
- OUT_RING(ring, 0x00000300);
-
- OUT_PKT3(ring, CP_SET_SHADER_BASES, 1);
- OUT_RING(ring, 0x80000180);
-
- /* not sure what this form of CP_SET_CONSTANT is.. */
- OUT_PKT3(ring, CP_SET_CONSTANT, 13);
- OUT_RING(ring, 0x00000000);
- OUT_RING(ring, 0x00000000);
- OUT_RING(ring, 0x00000000);
- OUT_RING(ring, 0x00000000);
- OUT_RING(ring, 0x00000000);
- OUT_RING(ring, 0x469c4000);
- OUT_RING(ring, 0x3f800000);
- OUT_RING(ring, 0x3f000000);
- OUT_RING(ring, 0x00000000);
- OUT_RING(ring, 0x40000000);
- OUT_RING(ring, 0x3f400000);
- OUT_RING(ring, 0x3ec00000);
- OUT_RING(ring, 0x3e800000);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_MASK));
- OUT_RING(ring, A2XX_RB_COLOR_MASK_WRITE_RED |
- A2XX_RB_COLOR_MASK_WRITE_GREEN |
- A2XX_RB_COLOR_MASK_WRITE_BLUE |
- A2XX_RB_COLOR_MASK_WRITE_ALPHA);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 5);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_BLEND_RED));
- OUT_RING(ring, 0x00000000); /* RB_BLEND_RED */
- OUT_RING(ring, 0x00000000); /* RB_BLEND_GREEN */
- OUT_RING(ring, 0x00000000); /* RB_BLEND_BLUE */
- OUT_RING(ring, 0x000000ff); /* RB_BLEND_ALPHA */
-
- fd_ringbuffer_flush(ring);
- fd_ringmarker_mark(ctx->draw_start);
+ if (has_compute(fd_screen(pctx->screen))) {
+ pctx->bind_compute_state = fd_bind_compute_state;
+ pctx->set_compute_resources = fd_set_compute_resources;
+ pctx->set_global_binding = fd_set_global_binding;
+ }
}
projects / mesa.git / blobdiff