Merge remote branch 'origin/7.8'

[mesa.git] / src / gallium / drivers / i965 / brw_screen.c

diff --git a/src/gallium/drivers/i965/brw_screen.c b/src/gallium/drivers/i965/brw_screen.c
index 3d96a77d656eeaaefc99bb6a3f70bc14fd242f2a..ba30e63f20ce1ffc2601a6b9b34fd999ce884497 100644 (file)
--- a/src/gallium/drivers/i965/brw_screen.c
+++ b/src/gallium/drivers/i965/brw_screen.c
@@ -26,7 +26,7 @@
  **************************************************************************/
 
 
-#include "pipe/p_inlines.h"
+#include "util/u_inlines.h"
 #include "util/u_memory.h"
 #include "util/u_string.h"
 
@@ -138,6 +138,9 @@ brw_get_name(struct pipe_screen *screen)
    case PCI_CHIP_ILM_G:
       chipset = "ILM_G";
       break;
+   default:
+      chipset = "unknown";
+      break;
    }
 
    util_snprintf(buffer, sizeof(buffer), "i965 (chipset: %s)", chipset);
@@ -150,6 +153,10 @@ brw_get_param(struct pipe_screen *screen, int param)
    switch (param) {
    case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
       return 8;
+   case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
+      return 8;
+   case PIPE_CAP_MAX_COMBINED_SAMPLERS:
+      return 16; /* XXX correct? */
    case PIPE_CAP_NPOT_TEXTURES:
       return 1;
    case PIPE_CAP_TWO_SIDED_STENCIL:
@@ -167,11 +174,17 @@ brw_get_param(struct pipe_screen *screen, int param)
    case PIPE_CAP_TEXTURE_SHADOW_MAP:
       return 1;
    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
-      return 11; /* max 1024x1024 */
+      return BRW_MAX_TEXTURE_2D_LEVELS;
    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
-      return 8;  /* max 128x128x128 */
+      return BRW_MAX_TEXTURE_3D_LEVELS;
    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
-      return 11; /* max 1024x1024 */
+      return BRW_MAX_TEXTURE_2D_LEVELS;
+   case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
+   case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
+      return 1;
+   case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
+   case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
+      return 0;
    default:
       return 0;
    }
@@ -216,15 +229,15 @@ brw_is_format_supported(struct pipe_screen *screen,
       PIPE_FORMAT_L16_UNORM,
       /*PIPE_FORMAT_I16_UNORM,*/
       /*PIPE_FORMAT_A16_UNORM,*/
-      PIPE_FORMAT_A8L8_UNORM,
-      PIPE_FORMAT_R5G6B5_UNORM,
-      PIPE_FORMAT_A1R5G5B5_UNORM,
-      PIPE_FORMAT_A4R4G4B4_UNORM,
-      PIPE_FORMAT_X8R8G8B8_UNORM,
-      PIPE_FORMAT_A8R8G8B8_UNORM,
+      PIPE_FORMAT_L8A8_UNORM,
+      PIPE_FORMAT_B5G6R5_UNORM,
+      PIPE_FORMAT_B5G5R5A1_UNORM,
+      PIPE_FORMAT_B4G4R4A4_UNORM,
+      PIPE_FORMAT_B8G8R8X8_UNORM,
+      PIPE_FORMAT_B8G8R8A8_UNORM,
       /* video */
-      PIPE_FORMAT_YCBCR,
-      PIPE_FORMAT_YCBCR_REV,
+      PIPE_FORMAT_UYVY,
+      PIPE_FORMAT_YUYV,
       /* compressed */
       /*PIPE_FORMAT_FXT1_RGBA,*/
       PIPE_FORMAT_DXT1_RGB,
@@ -232,14 +245,14 @@ brw_is_format_supported(struct pipe_screen *screen,
       PIPE_FORMAT_DXT3_RGBA,
       PIPE_FORMAT_DXT5_RGBA,
       /* sRGB */
-      PIPE_FORMAT_R8G8B8A8_SRGB,
-      PIPE_FORMAT_A8L8_SRGB,
+      PIPE_FORMAT_A8B8G8R8_SRGB,
+      PIPE_FORMAT_L8A8_SRGB,
       PIPE_FORMAT_L8_SRGB,
       PIPE_FORMAT_DXT1_SRGB,
       /* depth */
       PIPE_FORMAT_Z32_FLOAT,
-      PIPE_FORMAT_X8Z24_UNORM,
-      PIPE_FORMAT_S8Z24_UNORM,
+      PIPE_FORMAT_Z24X8_UNORM,
+      PIPE_FORMAT_Z24_UNORM_S8_USCALED,
       PIPE_FORMAT_Z16_UNORM,
       /* signed */
       PIPE_FORMAT_R8G8_SNORM,
@@ -247,15 +260,15 @@ brw_is_format_supported(struct pipe_screen *screen,
       PIPE_FORMAT_NONE  /* list terminator */
    };
    static const enum pipe_format render_supported[] = {
-      PIPE_FORMAT_X8R8G8B8_UNORM,
-      PIPE_FORMAT_A8R8G8B8_UNORM,
-      PIPE_FORMAT_R5G6B5_UNORM,
+      PIPE_FORMAT_B8G8R8X8_UNORM,
+      PIPE_FORMAT_B8G8R8A8_UNORM,
+      PIPE_FORMAT_B5G6R5_UNORM,
       PIPE_FORMAT_NONE  /* list terminator */
    };
    static const enum pipe_format depth_supported[] = {
       PIPE_FORMAT_Z32_FLOAT,
-      PIPE_FORMAT_X8Z24_UNORM,
-      PIPE_FORMAT_S8Z24_UNORM,
+      PIPE_FORMAT_Z24X8_UNORM,
+      PIPE_FORMAT_Z24_UNORM_S8_USCALED,
       PIPE_FORMAT_Z16_UNORM,
       PIPE_FORMAT_NONE  /* list terminator */
    };
@@ -388,6 +401,7 @@ brw_create_screen(struct brw_winsys_screen *sws, uint pci_id)
    bscreen->base.get_param = brw_get_param;
    bscreen->base.get_paramf = brw_get_paramf;
    bscreen->base.is_format_supported = brw_is_format_supported;
+   bscreen->base.context_create = brw_create_context;
    bscreen->base.fence_reference = brw_fence_reference;
    bscreen->base.fence_signalled = brw_fence_signalled;
    bscreen->base.fence_finish = brw_fence_finish;
@@ -396,7 +410,7 @@ brw_create_screen(struct brw_winsys_screen *sws, uint pci_id)
    brw_screen_tex_surface_init(bscreen);
    brw_screen_buffer_init(bscreen);
 
-   bscreen->no_tiling = debug_get_option("BRW_NO_TILING", FALSE);
+   bscreen->no_tiling = debug_get_option("BRW_NO_TILING", FALSE) != NULL;
    
    
    return &bscreen->base;