iris: Track per-stage bind history, reduce work accordingly

[mesa.git] / src / gallium / drivers / iris / iris_resource.h

diff --git a/src/gallium/drivers/iris/iris_resource.h b/src/gallium/drivers/iris/iris_resource.h
index 81715ed06f814043f656d1d724172e01866ae5bc..826c959eb46287b44c08c04b49f1b09d72bcafc9 100644 (file)
--- a/src/gallium/drivers/iris/iris_resource.h
+++ b/src/gallium/drivers/iris/iris_resource.h
@@ -25,6 +25,7 @@
 
 #include "pipe/p_state.h"
 #include "util/u_inlines.h"
+#include "util/u_range.h"
 #include "intel/isl/isl.h"
 
 struct iris_batch;
@@ -67,12 +68,31 @@ struct iris_resource {
    /** Backing storage for the resource */
    struct iris_bo *bo;
 
+   /** offset at which data starts in the BO */
+   uint64_t offset;
+
    /**
     * A bitfield of PIPE_BIND_* indicating how this resource was bound
     * in the past.  Only meaningful for PIPE_BUFFER; used for flushing.
     */
    unsigned bind_history;
 
+   /**
+    * A bitfield of MESA_SHADER_* stages indicating where this resource
+    * was bound.
+    */
+   unsigned bind_stages;
+
+   /**
+    * For PIPE_BUFFER resources, a range which may contain valid data.
+    *
+    * This is a conservative estimate of what part of the buffer contains
+    * valid data that we have to preserve.  The rest of the buffer is
+    * considered invalid, and we can promote writes to that region to
+    * be unsynchronized writes, avoiding blit copies.
+    */
+   struct util_range valid_buffer_range;
+
    /**
     * Auxiliary buffer information (CCS, MCS, or HiZ).
     */
@@ -116,6 +136,11 @@ struct iris_resource {
        */
       unsigned possible_usages;
 
+      /**
+       * Same as possible_usages, but only with modes supported for sampling.
+       */
+      unsigned sampler_usages;
+
       /**
        * \brief Maps miptree slices to their current aux state.
        *
@@ -171,6 +196,16 @@ struct iris_sampler_view {
    struct iris_state_ref surface_state;
 };
 
+/**
+ * Image view representation.
+ */
+struct iris_image_view {
+   struct pipe_image_view base;
+
+   /** The resource (BO) holding our SURFACE_STATE. */
+   struct iris_state_ref surface_state;
+};
+
 /**
  * Gallium CSO for surfaces (framebuffer attachments).
  *
@@ -180,10 +215,13 @@ struct iris_sampler_view {
 struct iris_surface {
    struct pipe_surface base;
    struct isl_view view;
+   struct isl_view read_view;
    union isl_color_value clear_color;
 
    /** The resource (BO) holding our SURFACE_STATE. */
    struct iris_state_ref surface_state;
+   /** The resource (BO) holding our SURFACE_STATE for read. */
+   struct iris_state_ref surface_state_read;
 };
 
 /**
@@ -200,6 +238,8 @@ struct iris_transfer {
    struct blorp_context *blorp;
    struct iris_batch *batch;
 
+   bool dest_had_defined_contents;
+
    void (*unmap)(struct iris_transfer *);
 };
 
@@ -232,9 +272,15 @@ iris_resource_get_clear_color(const struct iris_resource *res,
 
 void iris_init_screen_resource_functions(struct pipe_screen *pscreen);
 
+void iris_dirty_for_history(struct iris_context *ice,
+                            struct iris_resource *res);
+uint32_t iris_flush_bits_for_history(struct iris_resource *res);
+
 void iris_flush_and_dirty_for_history(struct iris_context *ice,
                                       struct iris_batch *batch,
-                                      struct iris_resource *res);
+                                      struct iris_resource *res,
+                                      uint32_t extra_flags,
+                                      const char *reason);
 
 unsigned iris_get_num_logical_layers(const struct iris_resource *res,
                                      unsigned level);
@@ -249,7 +295,8 @@ iris_hiz_exec(struct iris_context *ice,
               struct iris_batch *batch,
               struct iris_resource *res,
               unsigned int level, unsigned int start_layer,
-              unsigned int num_layers, enum isl_aux_op op);
+              unsigned int num_layers, enum isl_aux_op op,
+              bool update_clear_depth);
 
 /**
  * Prepare a miptree for access
@@ -356,6 +403,13 @@ iris_resource_access_raw(struct iris_context *ice,
    }
 }
 
+enum isl_dim_layout iris_get_isl_dim_layout(const struct gen_device_info *devinfo,
+                                            enum isl_tiling tiling,
+                                            enum pipe_texture_target target);
+enum isl_surf_dim target_to_isl_surf_dim(enum pipe_texture_target target);
+uint32_t iris_resource_get_tile_offsets(const struct iris_resource *res,
+                                        uint32_t level, uint32_t z,
+                                        uint32_t *tile_x, uint32_t *tile_y);
 enum isl_aux_usage iris_resource_texture_aux_usage(struct iris_context *ice,
                                                    const struct iris_resource *res,
                                                    enum isl_format view_fmt,
@@ -371,11 +425,28 @@ void iris_resource_prepare_image(struct iris_context *ice,
                                  struct iris_batch *batch,
                                  struct iris_resource *res);
 
+static inline bool
+iris_resource_unfinished_aux_import(struct iris_resource *res)
+{
+   return res->base.next != NULL && res->mod_info &&
+      res->mod_info->aux_usage != ISL_AUX_USAGE_NONE;
+}
+
+void iris_resource_finish_aux_import(struct pipe_screen *pscreen,
+                                     struct iris_resource *res);
+
+bool iris_has_color_unresolved(const struct iris_resource *res,
+                               unsigned start_level, unsigned num_levels,
+                               unsigned start_layer, unsigned num_layers);
+
 void iris_resource_check_level_layer(const struct iris_resource *res,
                                      uint32_t level, uint32_t layer);
 
 bool iris_resource_level_has_hiz(const struct iris_resource *res,
                                  uint32_t level);
+bool iris_has_color_unresolved(const struct iris_resource *res,
+                               unsigned start_level, unsigned num_levels,
+                               unsigned start_layer, unsigned num_layers);
 
 enum isl_aux_usage iris_resource_render_aux_usage(struct iris_context *ice,
                                                   struct iris_resource *res,