Merge branch '7.8'
[mesa.git] / src / gallium / drivers / nv50 / nv50_tex.c
index e12a6ad648b2f726a44ec28067ebdddf82ca2f6b..85ab947c0063eae6afb15cf51f4246e0db618100 100644 (file)
 #include "nv50_texture.h"
 
 #include "nouveau/nouveau_stateobj.h"
+#include "nouveau/nouveau_reloc.h"
 
-#define _(pf, tt, r, g, b, a, tf)                              \
-{                                                              \
-       PIPE_FORMAT_##pf,                                       \
-       NV50TIC_0_0_MAPR_##r | NV50TIC_0_0_TYPER_##tt |         \
-       NV50TIC_0_0_MAPG_##g | NV50TIC_0_0_TYPEG_##tt |         \
-       NV50TIC_0_0_MAPB_##b | NV50TIC_0_0_TYPEB_##tt |         \
-       NV50TIC_0_0_MAPA_##a | NV50TIC_0_0_TYPEA_##tt |         \
-       NV50TIC_0_0_FMT_##tf                                    \
-}
+#include "util/u_format.h"
 
-struct nv50_texture_format {
-       enum pipe_format pf;
-       uint32_t hw;
-};
+#define _MIXED(pf, t0, t1, t2, t3, cr, cg, cb, ca, f)          \
+[PIPE_FORMAT_##pf] = (                                         \
+       NV50TIC_0_0_MAPR_##cr | NV50TIC_0_0_TYPER_##t0 |        \
+       NV50TIC_0_0_MAPG_##cg | NV50TIC_0_0_TYPEG_##t1 |        \
+       NV50TIC_0_0_MAPB_##cb | NV50TIC_0_0_TYPEB_##t2 |        \
+       NV50TIC_0_0_MAPA_##ca | NV50TIC_0_0_TYPEA_##t3 |        \
+       NV50TIC_0_0_FMT_##f)
 
-#define NV50_TEX_FORMAT_LIST_SIZE \
-       (sizeof(nv50_tex_format_list) / sizeof(struct nv50_texture_format))
+#define _(pf, t, cr, cg, cb, ca, f) _MIXED(pf, t, t, t, t, cr, cg, cb, ca, f)
 
-static const struct nv50_texture_format nv50_tex_format_list[] =
+static const uint32_t nv50_texture_formats[PIPE_FORMAT_COUNT] =
 {
-       _(A8R8G8B8_UNORM, UNORM, C2, C1, C0, C3,  8_8_8_8),
-       _(X8R8G8B8_UNORM, UNORM, C2, C1, C0, ONE, 8_8_8_8),
-       _(A1R5G5B5_UNORM, UNORM, C2, C1, C0, C3,  1_5_5_5),
-       _(A4R4G4B4_UNORM, UNORM, C2, C1, C0, C3,  4_4_4_4),
+       _(B8G8R8A8_UNORM, UNORM, C2, C1, C0, C3,  8_8_8_8),
+       _(B8G8R8A8_SRGB,  UNORM, C2, C1, C0, C3,  8_8_8_8),
+       _(B8G8R8X8_UNORM, UNORM, C2, C1, C0, ONE, 8_8_8_8),
+       _(B8G8R8X8_SRGB,  UNORM, C2, C1, C0, ONE, 8_8_8_8),
+       _(B5G5R5A1_UNORM, UNORM, C2, C1, C0, C3,  1_5_5_5),
+       _(B4G4R4A4_UNORM, UNORM, C2, C1, C0, C3,  4_4_4_4),
 
-       _(R5G6B5_UNORM, UNORM, C2, C1, C0, ONE, 5_6_5),
+       _(B5G6R5_UNORM, UNORM, C2, C1, C0, ONE, 5_6_5),
 
        _(L8_UNORM, UNORM, C0, C0, C0, ONE, 8),
+       _(L8_SRGB,  UNORM, C0, C0, C0, ONE, 8),
        _(A8_UNORM, UNORM, ZERO, ZERO, ZERO, C0, 8),
        _(I8_UNORM, UNORM, C0, C0, C0, C0, 8),
 
-       _(A8L8_UNORM, UNORM, C0, C0, C0, C1, 8_8),
+       _(L8A8_UNORM, UNORM, C0, C0, C0, C1, 8_8),
+       _(L8A8_SRGB,  UNORM, C0, C0, C0, C1, 8_8),
 
        _(DXT1_RGB, UNORM, C0, C1, C2, ONE, DXT1),
        _(DXT1_RGBA, UNORM, C0, C1, C2, C3, DXT1),
        _(DXT3_RGBA, UNORM, C0, C1, C2, C3, DXT3),
-       _(DXT5_RGBA, UNORM, C0, C1, C2, C3, DXT5)
+       _(DXT5_RGBA, UNORM, C0, C1, C2, C3, DXT5),
+
+       _MIXED(S8Z24_UNORM, UINT, UNORM, UINT, UINT, C1, C1, C1, ONE, 24_8),
+       _MIXED(Z24S8_UNORM, UNORM, UINT, UINT, UINT, C0, C0, C0, ONE, 8_24),
+
+       _(R16G16B16A16_SNORM, UNORM, C0, C1, C2, C3, 16_16_16_16),
+       _(R16G16B16A16_UNORM, SNORM, C0, C1, C2, C3, 16_16_16_16),
+       _(R32G32B32A32_FLOAT, FLOAT, C0, C1, C2, C3, 32_32_32_32),
+
+       _(R16G16_SNORM, SNORM, C0, C1, ZERO, ONE, 16_16),
+       _(R16G16_UNORM, UNORM, C0, C1, ZERO, ONE, 16_16),
+
+       _MIXED(Z32_FLOAT, FLOAT, UINT, UINT, UINT, C0, C0, C0, ONE, 32_DEPTH)
 };
 
 #undef _
+#undef _MIXED
 
-static int
-nv50_tex_construct(struct nv50_context *nv50, struct nouveau_stateobj *so,
-                  struct nv50_miptree *mt, int unit)
+static INLINE uint32_t
+nv50_tic_swizzle(uint32_t tc, unsigned swz)
 {
-       unsigned i;
-
-       for (i = 0; i < NV50_TEX_FORMAT_LIST_SIZE; i++)
-               if (nv50_tex_format_list[i].pf == mt->base.base.format)
-                       break;
-       if (i == NV50_TEX_FORMAT_LIST_SIZE)
-                return 1;
-
-       so_data (so, nv50_tex_format_list[i].hw);
-       so_reloc(so, mt->base.bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
-                    NOUVEAU_BO_RD, 0, 0);
-       if (nv50->sampler[unit]->normalized)
-               so_data (so, 0xd0005000 | mt->base.bo->tile_mode << 22);
-       else
-               so_data (so, 0x5001d000 | mt->base.bo->tile_mode << 22);
-       so_data (so, 0x00300000);
-       so_data (so, mt->base.base.width[0]);
-       so_data (so, (mt->base.base.last_level << 28) |
-                    (mt->base.base.depth[0] << 16) | mt->base.base.height[0]);
-       so_data (so, 0x03000000);
-       so_data (so, mt->base.base.last_level << 4);
-
-       return 0;
+       switch (swz) {
+       case PIPE_SWIZZLE_RED:
+               return (tc & NV50TIC_0_0_MAPR_MASK) >> NV50TIC_0_0_MAPR_SHIFT;
+       case PIPE_SWIZZLE_GREEN:
+               return (tc & NV50TIC_0_0_MAPG_MASK) >> NV50TIC_0_0_MAPG_SHIFT;
+       case PIPE_SWIZZLE_BLUE:
+               return (tc & NV50TIC_0_0_MAPB_MASK) >> NV50TIC_0_0_MAPB_SHIFT;
+       case PIPE_SWIZZLE_ALPHA:
+               return (tc & NV50TIC_0_0_MAPA_MASK) >> NV50TIC_0_0_MAPA_SHIFT;
+       case PIPE_SWIZZLE_ONE:
+               return 7;
+       case PIPE_SWIZZLE_ZERO:
+       default:
+               return 0;
+       }
 }
 
-void
-nv50_tex_validate(struct nv50_context *nv50)
+boolean
+nv50_tex_construct(struct nv50_sampler_view *view)
+{
+       const struct util_format_description *desc;
+       struct nv50_miptree *mt = nv50_miptree(view->pipe.texture);
+       uint32_t swz[4], *tic = view->tic;
+
+       tic[0] = nv50_texture_formats[view->pipe.format];
+
+       swz[0] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_r);
+       swz[1] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_g);
+       swz[2] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_b);
+       swz[3] = nv50_tic_swizzle(tic[0], view->pipe.swizzle_a);
+       view->tic[0] = (tic[0] &  ~NV50TIC_0_0_SWIZZLE_MASK) |
+               (swz[0] << NV50TIC_0_0_MAPR_SHIFT) |
+               (swz[1] << NV50TIC_0_0_MAPG_SHIFT) |
+               (swz[2] << NV50TIC_0_0_MAPB_SHIFT) |
+               (swz[3] << NV50TIC_0_0_MAPA_SHIFT);
+
+       tic[2] = 0x50001000;
+       tic[2] |= ((mt->base.bo->tile_mode & 0x0f) << 22) |
+                 ((mt->base.bo->tile_mode & 0xf0) << 21);
+
+       desc = util_format_description(mt->base.base.format);
+       if (desc->colorspace == UTIL_FORMAT_COLORSPACE_SRGB)
+               tic[2] |= NV50TIC_0_2_COLORSPACE_SRGB;
+
+       switch (mt->base.base.target) {
+       case PIPE_TEXTURE_1D:
+               tic[2] |= NV50TIC_0_2_TARGET_1D;
+               break;
+       case PIPE_TEXTURE_2D:
+               tic[2] |= NV50TIC_0_2_TARGET_2D;
+               break;
+       case PIPE_TEXTURE_3D:
+               tic[2] |= NV50TIC_0_2_TARGET_3D;
+               break;
+       case PIPE_TEXTURE_CUBE:
+               tic[2] |= NV50TIC_0_2_TARGET_CUBE;
+               break;
+       default:
+               NOUVEAU_ERR("invalid texture target: %d\n",
+                           mt->base.base.target);
+               return FALSE;
+       }
+
+       tic[3] = 0x00300000;
+
+       tic[4] = (1 << 31) | mt->base.base.width0;
+       tic[5] = (mt->base.base.last_level << 28) |
+               (mt->base.base.depth0 << 16) | mt->base.base.height0;
+
+       tic[6] = 0x03000000;
+
+       tic[7] = (view->pipe.last_level << 4) | view->pipe.first_level;
+
+       return TRUE;
+}
+
+static int
+nv50_validate_textures(struct nv50_context *nv50, struct nouveau_stateobj *so,
+                      unsigned p)
 {
        struct nouveau_grobj *eng2d = nv50->screen->eng2d;
        struct nouveau_grobj *tesla = nv50->screen->tesla;
-       struct nouveau_stateobj *so;
-       unsigned i, unit, push;
+       unsigned unit, j;
 
-       push = MAX2(nv50->miptree_nr, nv50->state.miptree_nr) * 2 + 23 + 6;
-       so = so_new(nv50->miptree_nr * 9 + push, nv50->miptree_nr + 2);
+       const unsigned rll = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_LOW;
+       const unsigned rlh = NOUVEAU_BO_VRAM | NOUVEAU_BO_RD | NOUVEAU_BO_HIGH
+               | NOUVEAU_BO_OR;
 
        nv50_so_init_sifc(nv50, so, nv50->screen->tic, NOUVEAU_BO_VRAM,
-                         nv50->miptree_nr * 8 * 4);
-
-       for (i = 0, unit = 0; unit < nv50->miptree_nr; ++unit) {
-               struct nv50_miptree *mt = nv50->miptree[unit];
+                         p * (32 * 8 * 4), nv50->sampler_view_nr[p] * 8 * 4);
 
-               if (!mt)
-                       continue;
+       for (unit = 0; unit < nv50->sampler_view_nr[p]; ++unit) {
+               struct nv50_sampler_view *view =
+                       nv50_sampler_view(nv50->sampler_views[p][unit]);
 
                so_method(so, eng2d, NV50_2D_SIFC_DATA | (2 << 29), 8);
-               if (nv50_tex_construct(nv50, so, mt, unit)) {
-                       NOUVEAU_ERR("failed tex validate\n");
-                       so_ref(NULL, &so);
-                       return;
+               if (view) {
+                       uint32_t tic2 = view->tic[2];
+                       struct nv50_miptree *mt =
+                               nv50_miptree(view->pipe.texture);
+
+                       if (nv50->sampler[p][unit]->normalized)
+                               tic2 |= NV50TIC_0_2_NORMALIZED_COORDS;
+
+                       so_data  (so, view->tic[0]);
+                       so_reloc (so, mt->base.bo, 0, rll, 0, 0);
+                       so_reloc (so, mt->base.bo, 0, rlh, tic2, tic2);
+                       so_datap (so, &view->tic[3], 5);
+
+                       /* Set TEX insn $t src binding $unit in program type p
+                        * to TIC, TSC entry (32 * p + unit), mark valid (1).
+                        */
+                       so_method(so, tesla, NV50TCL_BIND_TIC(p), 1);
+                       so_data  (so, ((32 * p + unit) << 9) | (unit << 1) | 1);
+               } else {
+                       for (j = 0; j < 8; ++j)
+                               so_data(so, 0);
+                       so_method(so, tesla, NV50TCL_BIND_TIC(p), 1);
+                       so_data  (so, (unit << 1) | 0);
                }
+       }
 
-               so_method(so, tesla, NV50TCL_SET_SAMPLER_TEX, 1);
-               so_data  (so, (i++ << NV50TCL_SET_SAMPLER_TEX_TIC_SHIFT) |
-                         (unit << NV50TCL_SET_SAMPLER_TEX_SAMPLER_SHIFT) |
-                         NV50TCL_SET_SAMPLER_TEX_VALID);
+       for (; unit < nv50->state.sampler_view_nr[p]; unit++) {
+               /* Make other bindings invalid. */
+               so_method(so, tesla, NV50TCL_BIND_TIC(p), 1);
+               so_data  (so, (unit << 1) | 0);
        }
 
-       for (; unit < nv50->state.miptree_nr; unit++) {
-               so_method(so, tesla, NV50TCL_SET_SAMPLER_TEX, 1);
-               so_data  (so,
-                         (unit << NV50TCL_SET_SAMPLER_TEX_SAMPLER_SHIFT) | 0);
+       nv50->state.sampler_view_nr[p] = nv50->sampler_view_nr[p];
+       return TRUE;
+}
+
+void
+nv50_tex_relocs(struct nv50_context *nv50)
+{
+       struct nouveau_channel *chan = nv50->screen->tesla->channel;
+       int p, unit;
+
+       p = PIPE_SHADER_FRAGMENT;
+       for (unit = 0; unit < nv50->sampler_view_nr[p]; unit++) {
+               struct pipe_sampler_view *view = nv50->sampler_views[p][unit];
+               if (!view)
+                       continue;
+               nouveau_reloc_emit(chan, nv50->screen->tic,
+                                  ((p * 32) + unit) * 32, NULL,
+                                  nv50_miptree(view->texture)->base.bo, 0, 0,
+                                  NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
+                                  NOUVEAU_BO_RD, 0, 0);
+       }
+
+       p = PIPE_SHADER_VERTEX;
+       for (unit = 0; unit < nv50->sampler_view_nr[p]; unit++) {
+               struct pipe_sampler_view *view = nv50->sampler_views[p][unit];
+               if (!view)
+                       continue;
+               nouveau_reloc_emit(chan, nv50->screen->tic,
+                                  ((p * 32) + unit) * 32, NULL,
+                                  nv50_miptree(view->texture)->base.bo, 0, 0,
+                                  NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
+                                  NOUVEAU_BO_RD, 0, 0);
+       }
+}
+
+struct nouveau_stateobj *
+nv50_tex_validate(struct nv50_context *nv50)
+{
+       struct nouveau_stateobj *so;
+       struct nouveau_grobj *tesla = nv50->screen->tesla;
+       unsigned p, m = 0, d = 0, r = 0;
+
+       for (p = 0; p < 3; ++p) {
+               unsigned nr = MAX2(nv50->sampler_view_nr[p],
+                                  nv50->state.sampler_view_nr[p]);
+               m += nr;
+               d += nr;
+               r += nv50->sampler_view_nr[p];
+       }
+       m = m * 2 + 3 * 4 + 1;
+       d = d * 9 + 3 * 19 + 1;
+       r = r * 2 + 3 * 2;
+
+       so = so_new(m, d, r);
+
+       if (nv50_validate_textures(nv50, so, 0) == FALSE ||
+           nv50_validate_textures(nv50, so, 2) == FALSE) {
+               so_ref(NULL, &so);
+
+               NOUVEAU_ERR("failed tex validate\n");
+               return NULL;
        }
 
-       /* not sure if the following really do what I think: */
-       so_method(so, tesla, 0x1440, 1); /* sync SIFC */
-       so_data  (so, 0);
        so_method(so, tesla, 0x1330, 1); /* flush TIC */
        so_data  (so, 0);
-       so_method(so, tesla, 0x1338, 1); /* flush texture caches */
-       so_data  (so, 0x20);
 
-       so_ref(so, &nv50->state.tic_upload);
-       so_ref(NULL, &so);
-       nv50->state.miptree_nr = nv50->miptree_nr;
+       return so;
 }
-