Merge branch 'gallium-msaa'

[mesa.git] / src / gallium / drivers / nvfx / nvfx_screen.c

diff --git a/src/gallium/drivers/nvfx/nvfx_screen.c b/src/gallium/drivers/nvfx/nvfx_screen.c
index 1786af776aaa40443d2be511fd859b1f7ce94dac..7e534a0c738bd048cc0067bbba062f70dc457732 100644 (file)
--- a/src/gallium/drivers/nvfx/nvfx_screen.c
+++ b/src/gallium/drivers/nvfx/nvfx_screen.c
@@ -1,5 +1,6 @@
 #include "pipe/p_screen.h"
 #include "pipe/p_state.h"
+#include "util/u_format_s3tc.h"
 #include "util/u_simple_screen.h"
 
 #include "nouveau/nouveau_screen.h"
@@ -29,7 +30,7 @@ struct nouveau_winsys {
 #define NV6X_GRCLASS4497_CHIPSETS 0x00000088
 
 static int
-nvfx_screen_get_param(struct pipe_screen *pscreen, int param)
+nvfx_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 {
        struct nvfx_screen *screen = nvfx_screen(pscreen);
 
@@ -51,6 +52,8 @@ nvfx_screen_get_param(struct pipe_screen *pscreen, int param)
                return screen->is_nv4x ? 4 : 2;
        case PIPE_CAP_OCCLUSION_QUERY:
                return 1;
+        case PIPE_CAP_TIMER_QUERY:
+               return 0;
        case PIPE_CAP_TEXTURE_SHADOW_MAP:
                return 1;
        case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
@@ -83,6 +86,45 @@ nvfx_screen_get_param(struct pipe_screen *pscreen, int param)
        case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
        case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
                return 0;
+       case PIPE_CAP_MAX_FS_INSTRUCTIONS:
+       case PIPE_CAP_MAX_FS_ALU_INSTRUCTIONS:
+       case PIPE_CAP_MAX_FS_TEX_INSTRUCTIONS:
+       case PIPE_CAP_MAX_FS_TEX_INDIRECTIONS:
+               return 4096;
+       case PIPE_CAP_MAX_FS_CONTROL_FLOW_DEPTH:
+               /* FIXME: is it the dynamic (nv30:0/nv40:24) or the static
+                  value (nv30:0/nv40:4) ? */
+               return screen->is_nv4x ? 4 : 0;
+       case PIPE_CAP_MAX_FS_INPUTS:
+               return 10;
+       case PIPE_CAP_MAX_FS_CONSTS:
+               return screen->is_nv4x ? 224 : 32;
+       case PIPE_CAP_MAX_FS_TEMPS:
+               return 32;
+       case PIPE_CAP_MAX_FS_ADDRS:
+               return screen->is_nv4x ? 1 : 0;
+       case PIPE_CAP_MAX_FS_PREDS:
+               return screen->is_nv4x ? 1 : 0;
+       case PIPE_CAP_MAX_VS_INSTRUCTIONS:
+       case PIPE_CAP_MAX_VS_ALU_INSTRUCTIONS:
+               return screen->is_nv4x ? 512 : 256;
+       case PIPE_CAP_MAX_VS_TEX_INSTRUCTIONS:
+       case PIPE_CAP_MAX_VS_TEX_INDIRECTIONS:
+               return screen->is_nv4x ? 512 : 0;
+       case PIPE_CAP_MAX_VS_CONTROL_FLOW_DEPTH:
+               /* FIXME: is it the dynamic (nv30:24/nv40:24) or the static
+                  value (nv30:1/nv40:4) ? */
+               return screen->is_nv4x ? 4 : 1;
+       case PIPE_CAP_MAX_VS_INPUTS:
+               return 16;
+       case PIPE_CAP_MAX_VS_CONSTS:
+               return 256;
+       case PIPE_CAP_MAX_VS_TEMPS:
+               return screen->is_nv4x ? 32 : 13;
+       case PIPE_CAP_MAX_VS_ADDRS:
+               return 2;
+       case PIPE_CAP_MAX_VS_PREDS:
+               return screen->is_nv4x ? 1 : 0;
        default:
                NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
                return 0;
@@ -90,7 +132,7 @@ nvfx_screen_get_param(struct pipe_screen *pscreen, int param)
 }
 
 static float
-nvfx_screen_get_paramf(struct pipe_screen *pscreen, int param)
+nvfx_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_cap param)
 {
        struct nvfx_screen *screen = nvfx_screen(pscreen);
 
@@ -149,6 +191,17 @@ nvfx_screen_surface_format_supported(struct pipe_screen *pscreen,
                }
        } else {
                switch (format) {
+               if (tex_usage & PIPE_BIND_SAMPLER_VIEW) {
+                       switch (format) {
+                       case PIPE_FORMAT_DXT1_RGB:
+                       case PIPE_FORMAT_DXT1_RGBA:
+                       case PIPE_FORMAT_DXT3_RGBA:
+                       case PIPE_FORMAT_DXT5_RGBA:
+                               return util_format_s3tc_enabled;
+                       default:
+                               break;
+                       }
+               }
                case PIPE_FORMAT_B8G8R8A8_UNORM:
                case PIPE_FORMAT_B8G8R8X8_UNORM:
                case PIPE_FORMAT_B5G5R5A1_UNORM:
@@ -160,10 +213,6 @@ nvfx_screen_surface_format_supported(struct pipe_screen *pscreen,
                case PIPE_FORMAT_L8A8_UNORM:
                case PIPE_FORMAT_Z16_UNORM:
                case PIPE_FORMAT_S8_USCALED_Z24_UNORM:
-               case PIPE_FORMAT_DXT1_RGB:
-               case PIPE_FORMAT_DXT1_RGBA:
-               case PIPE_FORMAT_DXT3_RGBA:
-               case PIPE_FORMAT_DXT5_RGBA:
                        return TRUE;
                /* TODO: does nv30 support this? */
                case PIPE_FORMAT_R16_SNORM: