.alpha_ref = state->alpha_state.ref_value
};
+ memcpy(program.rt_formats, state->rt_formats, sizeof(program.rt_formats));
+
if (dev->quirks & IS_BIFROST) {
bifrost_compile_shader_nir(s, &program, dev->gpu_id);
} else {
midgard_compile_shader_nir(s, &program, false, 0, dev->gpu_id,
- dev->debug & PAN_DBG_PRECOMPILE);
+ dev->debug & PAN_DBG_PRECOMPILE, false);
}
/* Prepare the compiled binary for upload */
* that's how I'd do it. */
if (size) {
- state->bo = pan_bo_create(dev, size, PAN_BO_EXECUTE);
+ state->bo = panfrost_bo_create(dev, size, PAN_BO_EXECUTE);
memcpy(state->bo->cpu, dst, size);
}
if (s->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_STENCIL))
state->writes_stencil = true;
+ uint64_t outputs_read = s->info.outputs_read;
+ if (outputs_read & BITFIELD64_BIT(FRAG_RESULT_COLOR))
+ outputs_read |= BITFIELD64_BIT(FRAG_RESULT_DATA0);
+
+ state->outputs_read = outputs_read >> FRAG_RESULT_DATA0;
+
/* List of reasons we need to execute frag shaders when things
* are masked off */
/* Record the varying mapping for the command stream's bookkeeping */
- struct exec_list *l_varyings =
- stage == MESA_SHADER_VERTEX ? &s->outputs : &s->inputs;
+ nir_variable_mode varying_mode =
+ stage == MESA_SHADER_VERTEX ? nir_var_shader_out : nir_var_shader_in;
- nir_foreach_variable(var, l_varyings) {
+ nir_foreach_variable_with_modes(var, s, varying_mode) {
unsigned loc = var->data.driver_location;
unsigned sz = glsl_count_attribute_slots(var->type, FALSE);