panfrost: Identify additional SFBD flags
[mesa.git] / src / gallium / drivers / panfrost / pan_cmdstream.c
index 2c6f2f28c1d928383745640d725f144535069c04..1a170f6ee3b0d939437f89345ddf1f4de729f094 100644 (file)
@@ -322,10 +322,23 @@ panfrost_emit_compute_shader(struct panfrost_context *ctx,
         meta->sampler_count = ctx->sampler_count[st];
 
         if (dev->quirks & IS_BIFROST) {
-                meta->bifrost1.unk1 = 0x800000;
-                meta->bifrost2.preload_regs = 0xC0;
-                meta->bifrost2.uniform_count = ss->uniform_count;
-                meta->bifrost1.uniform_buffer_count = panfrost_ubo_count(ctx, st);
+                struct mali_bifrost_properties_packed prop;
+                struct mali_preload_vertex_packed preload;
+
+                pan_pack(&prop, BIFROST_PROPERTIES, cfg) {
+                        cfg.unknown = 0x800000; /* XXX */
+                        cfg.uniform_buffer_count = panfrost_ubo_count(ctx, st);
+                }
+
+                /* TODO: True compute shaders */
+                pan_pack(&preload, PRELOAD_VERTEX, cfg) {
+                        cfg.uniform_count = ss->uniform_count;
+                        cfg.vertex_id = true;
+                        cfg.instance_id = true;
+                }
+
+                memcpy(&meta->bifrost_props, &prop, sizeof(prop));
+                memcpy(&meta->bifrost_preload, &preload, sizeof(preload));
         } else {
                 struct mali_midgard_properties_packed prop;
 
@@ -337,7 +350,7 @@ panfrost_emit_compute_shader(struct panfrost_context *ctx,
                         cfg.suppress_inf_nan = true; /* XXX */
                 }
 
-                memcpy(&meta->midgard1, &prop, sizeof(prop));
+                memcpy(&meta->midgard_props, &prop, sizeof(prop));
         }
 }
 
@@ -553,6 +566,7 @@ panfrost_emit_frag_shader(struct panfrost_context *ctx,
 
         struct pipe_rasterizer_state *rast = &ctx->rasterizer->base;
         const struct panfrost_zsa_state *zsa = ctx->depth_stencil;
+        unsigned rt_count = ctx->pipe_framebuffer.nr_cbufs;
 
         memset(fragmeta, 0, sizeof(*fragmeta));
 
@@ -563,69 +577,79 @@ panfrost_emit_frag_shader(struct panfrost_context *ctx,
         fragmeta->sampler_count = ctx->sampler_count[PIPE_SHADER_FRAGMENT];
 
         if (dev->quirks & IS_BIFROST) {
-                /* First clause ATEST |= 0x4000000.
-                 * Lefs than 32 regs |= 0x200 */
-                fragmeta->bifrost1.unk1 = 0x950020;
+                struct mali_bifrost_properties_packed prop;
+                struct mali_preload_fragment_packed preload;
 
-                fragmeta->bifrost1.uniform_buffer_count = panfrost_ubo_count(ctx, PIPE_SHADER_FRAGMENT);
-                fragmeta->bifrost2.preload_regs = 0x1;
-                SET_BIT(fragmeta->bifrost2.preload_regs, 0x10, fs->reads_frag_coord);
+                bool no_blend = true;
 
-                fragmeta->bifrost2.uniform_count = fs->uniform_count;
-        } else {
-                fragmeta->midgard1.uniform_count = fs->uniform_count;
-                fragmeta->midgard1.work_count = fs->work_reg_count;
+                for (unsigned i = 0; i < rt_count; ++i)
+                        no_blend &= (!blend[i].load_dest | blend[i].no_colour);
 
-                /* TODO: This is not conformant on ES3 */
-                fragmeta->midgard1.flags_hi = MALI_SUPPRESS_INF_NAN;
+                pan_pack(&prop, BIFROST_PROPERTIES, cfg) {
+                        cfg.unknown = 0x950020; /* XXX */
+                        cfg.uniform_buffer_count = panfrost_ubo_count(ctx, PIPE_SHADER_FRAGMENT);
+                        cfg.early_z_enable = !fs->can_discard && !fs->writes_depth && no_blend;
+                }
 
-                fragmeta->midgard1.flags_lo = 0x20;
-                fragmeta->midgard1.uniform_buffer_count = panfrost_ubo_count(ctx, PIPE_SHADER_FRAGMENT);
+                pan_pack(&preload, PRELOAD_FRAGMENT, cfg) {
+                        cfg.uniform_count = fs->uniform_count;
+                        cfg.fragment_position = fs->reads_frag_coord;
+                }
 
-                SET_BIT(fragmeta->midgard1.flags_lo, MALI_WRITES_GLOBAL, fs->writes_global);
-        }
+                memcpy(&fragmeta->bifrost_props, &prop, sizeof(prop));
+                memcpy(&fragmeta->bifrost_preload, &preload, sizeof(preload));
+        } else {
+                struct mali_midgard_properties_packed prop;
 
-        bool msaa = rast->multisample;
-        fragmeta->coverage_mask = msaa ? ctx->sample_mask : ~0;
+                /* Reasons to disable early-Z from a shader perspective */
+                bool late_z = fs->can_discard || fs->writes_global ||
+                        fs->writes_depth || fs->writes_stencil;
 
-        fragmeta->unknown2_3 = MALI_DEPTH_FUNC(MALI_FUNC_ALWAYS) | 0x10;
-        fragmeta->unknown2_4 = 0x4e0;
+                /* Reasons to disable early-Z from a CSO perspective */
+                bool alpha_to_coverage = ctx->blend->base.alpha_to_coverage;
 
-        if (dev->quirks & IS_BIFROST) {
-                /* TODO */
-        } else {
-                /* Depending on whether it's legal to in the given shader, we try to
-                 * enable early-z testing. TODO: respect e-z force */
+                /* If either depth or stencil is enabled, discard matters */
+                bool zs_enabled =
+                        (zsa->base.depth.enabled && zsa->base.depth.func != PIPE_FUNC_ALWAYS) ||
+                        zsa->base.stencil[0].enabled;
 
-                SET_BIT(fragmeta->midgard1.flags_lo, MALI_EARLY_Z,
-                        !fs->can_discard && !fs->writes_global &&
-                        !fs->writes_depth && !fs->writes_stencil &&
-                        !ctx->blend->base.alpha_to_coverage);
+                bool has_blend_shader = false;
 
-                /* Add the writes Z/S flags if needed. */
-                SET_BIT(fragmeta->midgard1.flags_lo, MALI_WRITES_Z, fs->writes_depth);
-                SET_BIT(fragmeta->midgard1.flags_hi, MALI_WRITES_S, fs->writes_stencil);
+                for (unsigned c = 0; c < rt_count; ++c)
+                        has_blend_shader |= blend[c].is_shader;
 
-                /* Any time texturing is used, derivatives are implicitly calculated,
-                 * so we need to enable helper invocations */
+                pan_pack(&prop, MIDGARD_PROPERTIES, cfg) {
+                        cfg.uniform_buffer_count = panfrost_ubo_count(ctx, PIPE_SHADER_FRAGMENT);
+                        cfg.uniform_count = fs->uniform_count;
+                        cfg.work_register_count = fs->work_reg_count;
+                        cfg.writes_globals = fs->writes_global;
+                        cfg.suppress_inf_nan = true; /* XXX */
 
-                SET_BIT(fragmeta->midgard1.flags_lo, MALI_HELPER_INVOCATIONS,
-                        fs->helper_invocations);
+                        /* TODO: Reduce this limit? */
+                        if (has_blend_shader)
+                                cfg.work_register_count = MAX2(cfg.work_register_count, 8);
 
-                /* If discard is enabled, which bit we set to convey this
-                 * depends on if depth/stencil is used for the draw or not.
-                 * Just one of depth OR stencil is enough to trigger this. */
+                        cfg.stencil_from_shader = fs->writes_stencil;
+                        cfg.helper_invocation_enable = fs->helper_invocations;
+                        cfg.depth_source = fs->writes_depth ?
+                                MALI_DEPTH_SOURCE_SHADER :
+                                MALI_DEPTH_SOURCE_FIXED_FUNCTION;
 
-                bool zs_enabled =
-                        fs->writes_depth || fs->writes_stencil ||
-                        (zsa->base.depth.enabled && zsa->base.depth.func != PIPE_FUNC_ALWAYS) ||
-                        zsa->base.stencil[0].enabled;
+                        /* Depend on other state */
+                        cfg.early_z_enable = !(late_z || alpha_to_coverage);
+                        cfg.reads_tilebuffer = fs->outputs_read || (!zs_enabled && fs->can_discard);
+                        cfg.reads_depth_stencil = zs_enabled && fs->can_discard;
+                }
 
-                SET_BIT(fragmeta->midgard1.flags_lo, MALI_READS_TILEBUFFER,
-                        fs->outputs_read || (!zs_enabled && fs->can_discard));
-                SET_BIT(fragmeta->midgard1.flags_lo, MALI_READS_ZS, zs_enabled && fs->can_discard);
+                memcpy(&fragmeta->midgard_props, &prop, sizeof(prop));
         }
 
+        bool msaa = rast->multisample;
+        fragmeta->coverage_mask = msaa ? ctx->sample_mask : ~0;
+
+        fragmeta->unknown2_3 = MALI_DEPTH_FUNC(MALI_FUNC_ALWAYS) | 0x10;
+        fragmeta->unknown2_4 = 0x4e0;
+
         /* TODO: Sample size */
         SET_BIT(fragmeta->unknown2_3, MALI_HAS_MSAA, msaa);
         SET_BIT(fragmeta->unknown2_4, MALI_NO_MSAA, !msaa);
@@ -669,43 +693,28 @@ panfrost_emit_frag_shader(struct panfrost_context *ctx,
         fragmeta->unknown2_3 |= MALI_DEPTH_FUNC(panfrost_translate_compare_func(
                 zsa->base.depth.enabled ? zsa->base.depth.func : PIPE_FUNC_ALWAYS));
 
-        SET_BIT(fragmeta->unknown2_4, MALI_NO_DITHER,
-                (dev->quirks & MIDGARD_SFBD) && ctx->blend &&
-                !ctx->blend->base.dither);
-
-        SET_BIT(fragmeta->unknown2_4, 0x10, dev->quirks & MIDGARD_SFBD);
-
         SET_BIT(fragmeta->unknown2_4, MALI_ALPHA_TO_COVERAGE,
                         ctx->blend->base.alpha_to_coverage);
 
-        /* Get blending setup */
-        unsigned rt_count = ctx->pipe_framebuffer.nr_cbufs;
-
         /* Disable shader execution if we can */
         if (dev->quirks & MIDGARD_SHADERLESS
                         && !panfrost_fs_required(fs, blend, rt_count)) {
-                fragmeta->shader = 0;
+                fragmeta->shader = 0x1;
                 fragmeta->attribute_count = 0;
                 fragmeta->varying_count = 0;
                 fragmeta->texture_count = 0;
                 fragmeta->sampler_count = 0;
 
                 /* This feature is not known to work on Bifrost */
-                fragmeta->midgard1.work_count = 1;
-                fragmeta->midgard1.uniform_count = 0;
-                fragmeta->midgard1.uniform_buffer_count = 0;
-        }
-
-         /* If there is a blend shader, work registers are shared. We impose 8
-          * work registers as a limit for blend shaders. Should be lower XXX */
+                struct mali_midgard_properties_packed prop;
 
-        if (!(dev->quirks & IS_BIFROST)) {
-                for (unsigned c = 0; c < rt_count; ++c) {
-                        if (blend[c].is_shader) {
-                                fragmeta->midgard1.work_count =
-                                        MAX2(fragmeta->midgard1.work_count, 8);
-                        }
+                pan_pack(&prop, MIDGARD_PROPERTIES, cfg) {
+                        cfg.work_register_count = 1;
+                        cfg.depth_source = MALI_DEPTH_SOURCE_FIXED_FUNCTION;
+                        cfg.early_z_enable = true;
                 }
+
+                memcpy(&fragmeta->midgard_props, &prop, sizeof(prop));
         }
 
         if (dev->quirks & MIDGARD_SFBD) {
@@ -714,6 +723,14 @@ panfrost_emit_frag_shader(struct panfrost_context *ctx,
                  * need to signal CAN_DISCARD for nontrivial blend modes (so
                  * we're able to read back the destination buffer) */
 
+                if (blend[0].no_colour)
+                        return;
+
+                fragmeta->unknown2_4 |= MALI_SFBD_ENABLE;
+
+                SET_BIT(fragmeta->unknown2_4, MALI_SFBD_SRGB,
+                                util_format_is_srgb(ctx->pipe_framebuffer.cbufs[0]->format));
+
                 SET_BIT(fragmeta->unknown2_3, MALI_HAS_BLEND_SHADER,
                         blend[0].is_shader);
 
@@ -727,6 +744,8 @@ panfrost_emit_frag_shader(struct panfrost_context *ctx,
 
                 SET_BIT(fragmeta->unknown2_3, MALI_CAN_DISCARD,
                         blend[0].load_dest);
+
+                SET_BIT(fragmeta->unknown2_4, MALI_NO_DITHER, !ctx->blend->base.dither);
         } else if (!(dev->quirks & IS_BIFROST)) {
                 /* Bug where MRT-capable hw apparently reads the last blend
                  * shader from here instead of the usual location? */
@@ -740,16 +759,6 @@ panfrost_emit_frag_shader(struct panfrost_context *ctx,
                         break;
                 }
         }
-
-        if (dev->quirks & IS_BIFROST) {
-                bool no_blend = true;
-
-                for (unsigned i = 0; i < rt_count; ++i)
-                        no_blend &= (!blend[i].load_dest | blend[i].no_colour);
-
-                SET_BIT(fragmeta->bifrost1.unk1, MALI_BIFROST_EARLY_Z,
-                        !fs->can_discard && !fs->writes_depth && no_blend);
-        }
 }
 
 void