translate_tex_wrap(enum pipe_tex_wrap w)
{
switch (w) {
- case PIPE_TEX_WRAP_REPEAT:
- return MALI_WRAP_MODE_REPEAT;
-
- case PIPE_TEX_WRAP_CLAMP:
- return MALI_WRAP_MODE_CLAMP;
-
- case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
- return MALI_WRAP_MODE_CLAMP_TO_EDGE;
-
- case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
- return MALI_WRAP_MODE_CLAMP_TO_BORDER;
-
- case PIPE_TEX_WRAP_MIRROR_REPEAT:
- return MALI_WRAP_MODE_MIRRORED_REPEAT;
+ case PIPE_TEX_WRAP_REPEAT: return MALI_WRAP_MODE_REPEAT;
+ case PIPE_TEX_WRAP_CLAMP: return MALI_WRAP_MODE_CLAMP;
+ case PIPE_TEX_WRAP_CLAMP_TO_EDGE: return MALI_WRAP_MODE_CLAMP_TO_EDGE;
+ case PIPE_TEX_WRAP_CLAMP_TO_BORDER: return MALI_WRAP_MODE_CLAMP_TO_BORDER;
+ case PIPE_TEX_WRAP_MIRROR_REPEAT: return MALI_WRAP_MODE_MIRRORED_REPEAT;
+ case PIPE_TEX_WRAP_MIRROR_CLAMP: return MALI_WRAP_MODE_MIRRORED_CLAMP;
+ case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: return MALI_WRAP_MODE_MIRRORED_CLAMP_TO_EDGE;
+ case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: return MALI_WRAP_MODE_MIRRORED_CLAMP_TO_BORDER;
+ default: unreachable("Invalid wrap");
+ }
+}
- case PIPE_TEX_WRAP_MIRROR_CLAMP:
- return MALI_WRAP_MODE_MIRRORED_CLAMP;
+/* The hardware compares in the wrong order order, so we have to flip before
+ * encoding. Yes, really. */
- case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
- return MALI_WRAP_MODE_MIRRORED_CLAMP_TO_EDGE;
+static enum mali_func
+panfrost_sampler_compare_func(const struct pipe_sampler_state *cso)
+{
+ if (!cso->compare_mode)
+ return MALI_FUNC_NEVER;
- case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
- return MALI_WRAP_MODE_MIRRORED_CLAMP_TO_BORDER;
+ enum mali_func f = panfrost_translate_compare_func(cso->compare_func);
+ return panfrost_flip_compare_func(f);
+}
- default:
- unreachable("Invalid wrap");
+static enum mali_mipmap_mode
+pan_pipe_to_mipmode(enum pipe_tex_mipfilter f)
+{
+ switch (f) {
+ case PIPE_TEX_MIPFILTER_NEAREST: return MALI_MIPMAP_MODE_NEAREST;
+ case PIPE_TEX_MIPFILTER_LINEAR: return MALI_MIPMAP_MODE_TRILINEAR;
+ case PIPE_TEX_MIPFILTER_NONE: return MALI_MIPMAP_MODE_NONE;
+ default: unreachable("Invalid");
}
}
void panfrost_sampler_desc_init(const struct pipe_sampler_state *cso,
- struct mali_sampler_descriptor *hw)
+ struct mali_midgard_sampler_packed *hw)
{
- unsigned func = panfrost_translate_compare_func(cso->compare_func);
- bool min_nearest = cso->min_img_filter == PIPE_TEX_FILTER_NEAREST;
- bool mag_nearest = cso->mag_img_filter == PIPE_TEX_FILTER_NEAREST;
- bool mip_linear = cso->min_mip_filter == PIPE_TEX_MIPFILTER_LINEAR;
- unsigned min_filter = min_nearest ? MALI_SAMP_MIN_NEAREST : 0;
- unsigned mag_filter = mag_nearest ? MALI_SAMP_MAG_NEAREST : 0;
- unsigned mip_filter = mip_linear ?
- (MALI_SAMP_MIP_LINEAR_1 | MALI_SAMP_MIP_LINEAR_2) : 0;
- unsigned normalized = cso->normalized_coords ? MALI_SAMP_NORM_COORDS : 0;
-
- *hw = (struct mali_sampler_descriptor) {
- .filter_mode = min_filter | mag_filter | mip_filter |
- normalized,
- .wrap_s = translate_tex_wrap(cso->wrap_s),
- .wrap_t = translate_tex_wrap(cso->wrap_t),
- .wrap_r = translate_tex_wrap(cso->wrap_r),
- .compare_func = cso->compare_mode ?
- panfrost_flip_compare_func(func) :
- MALI_FUNC_NEVER,
- .border_color = {
- cso->border_color.f[0],
- cso->border_color.f[1],
- cso->border_color.f[2],
- cso->border_color.f[3]
- },
- .min_lod = FIXED_16(cso->min_lod, false), /* clamp at 0 */
- .max_lod = FIXED_16(cso->max_lod, false),
- .lod_bias = FIXED_16(cso->lod_bias, true), /* can be negative */
- .seamless_cube_map = cso->seamless_cube_map,
- };
+ pan_pack(hw, MIDGARD_SAMPLER, cfg) {
+ cfg.magnify_nearest = cso->mag_img_filter == PIPE_TEX_FILTER_NEAREST;
+ cfg.minify_nearest = cso->min_img_filter == PIPE_TEX_FILTER_NEAREST;
+ cfg.mipmap_mode = (cso->min_mip_filter == PIPE_TEX_MIPFILTER_LINEAR) ?
+ MALI_MIPMAP_MODE_TRILINEAR : MALI_MIPMAP_MODE_NEAREST;
+ cfg.normalized_coordinates = cso->normalized_coords;
- /* If necessary, we disable mipmapping in the sampler descriptor by
- * clamping the LOD as tight as possible (from 0 to epsilon,
- * essentially -- remember these are fixed point numbers, so
- * epsilon=1/256) */
+ cfg.lod_bias = FIXED_16(cso->lod_bias, true);
- if (cso->min_mip_filter == PIPE_TEX_MIPFILTER_NONE)
- hw->max_lod = hw->min_lod + 1;
+ cfg.minimum_lod = FIXED_16(cso->min_lod, false);
+
+ /* If necessary, we disable mipmapping in the sampler descriptor by
+ * clamping the LOD as tight as possible (from 0 to epsilon,
+ * essentially -- remember these are fixed point numbers, so
+ * epsilon=1/256) */
+
+ cfg.maximum_lod = (cso->min_mip_filter == PIPE_TEX_MIPFILTER_NONE) ?
+ cfg.minimum_lod + 1 :
+ FIXED_16(cso->max_lod, false);
+
+ cfg.wrap_mode_s = translate_tex_wrap(cso->wrap_s);
+ cfg.wrap_mode_t = translate_tex_wrap(cso->wrap_t);
+ cfg.wrap_mode_r = translate_tex_wrap(cso->wrap_r);
+
+ cfg.compare_function = panfrost_sampler_compare_func(cso);
+ cfg.seamless_cube_map = cso->seamless_cube_map;
+
+ cfg.border_color_r = cso->border_color.f[0];
+ cfg.border_color_g = cso->border_color.f[1];
+ cfg.border_color_b = cso->border_color.f[2];
+ cfg.border_color_a = cso->border_color.f[3];
+ }
}
void panfrost_sampler_desc_init_bifrost(const struct pipe_sampler_state *cso,
- struct bifrost_sampler_descriptor *hw)
+ struct mali_bifrost_sampler_packed *hw)
{
- *hw = (struct bifrost_sampler_descriptor) {
- .unk1 = 0x1,
- .wrap_s = translate_tex_wrap(cso->wrap_s),
- .wrap_t = translate_tex_wrap(cso->wrap_t),
- .wrap_r = translate_tex_wrap(cso->wrap_r),
- .unk8 = 0x8,
- .min_filter = cso->min_img_filter == PIPE_TEX_FILTER_NEAREST,
- .norm_coords = cso->normalized_coords,
- .mip_filter = cso->min_mip_filter == PIPE_TEX_MIPFILTER_LINEAR,
- .mag_filter = cso->mag_img_filter == PIPE_TEX_FILTER_LINEAR,
- .min_lod = FIXED_16(cso->min_lod, false), /* clamp at 0 */
- .max_lod = FIXED_16(cso->max_lod, false),
- };
-
- /* If necessary, we disable mipmapping in the sampler descriptor by
- * clamping the LOD as tight as possible (from 0 to epsilon,
- * essentially -- remember these are fixed point numbers, so
- * epsilon=1/256) */
-
- if (cso->min_mip_filter == PIPE_TEX_MIPFILTER_NONE)
- hw->max_lod = hw->min_lod + 1;
+ pan_pack(hw, BIFROST_SAMPLER, cfg) {
+ cfg.magnify_linear = cso->mag_img_filter == PIPE_TEX_FILTER_LINEAR;
+ cfg.minify_linear = cso->min_img_filter == PIPE_TEX_FILTER_LINEAR;
+ cfg.mipmap_mode = pan_pipe_to_mipmode(cso->min_mip_filter);
+ cfg.normalized_coordinates = cso->normalized_coords;
+
+ cfg.lod_bias = FIXED_16(cso->lod_bias, true);
+ cfg.minimum_lod = FIXED_16(cso->min_lod, false);
+ cfg.maximum_lod = FIXED_16(cso->max_lod, false);
+
+ cfg.wrap_mode_s = translate_tex_wrap(cso->wrap_s);
+ cfg.wrap_mode_t = translate_tex_wrap(cso->wrap_t);
+ cfg.wrap_mode_r = translate_tex_wrap(cso->wrap_r);
+
+ cfg.compare_function = panfrost_sampler_compare_func(cso);
+ cfg.seamless_cube_map = cso->seamless_cube_map;
+ }
}
static void
fs = panfrost_get_shader_state(ctx, PIPE_SHADER_FRAGMENT);
bool msaa = ctx->rasterizer && ctx->rasterizer->base.multisample;
- fragmeta->coverage_mask = (msaa ? ctx->sample_mask : ~0) & 0xF;
+ fragmeta->coverage_mask = msaa ? ctx->sample_mask : ~0;
fragmeta->unknown2_3 = MALI_DEPTH_FUNC(MALI_FUNC_ALWAYS) | 0x10;
fragmeta->unknown2_4 = 0x4e0;
return;
if (device->quirks & IS_BIFROST) {
- struct bifrost_texture_descriptor *descriptors;
+ struct panfrost_transfer T = panfrost_pool_alloc(&batch->pool,
+ MALI_BIFROST_TEXTURE_LENGTH *
+ ctx->sampler_view_count[stage]);
- descriptors = malloc(sizeof(struct bifrost_texture_descriptor) *
- ctx->sampler_view_count[stage]);
+ struct mali_bifrost_texture_packed *out =
+ (struct mali_bifrost_texture_packed *) T.cpu;
for (int i = 0; i < ctx->sampler_view_count[stage]; ++i) {
struct panfrost_sampler_view *view = ctx->sampler_views[stage][i];
struct pipe_sampler_view *pview = &view->base;
struct panfrost_resource *rsrc = pan_resource(pview->texture);
+
panfrost_update_sampler_view(view, &ctx->base);
+ out[i] = view->bifrost_descriptor;
/* Add the BOs to the job so they are retained until the job is done. */
panfrost_batch_add_bo(batch, view->bo,
PAN_BO_ACCESS_SHARED | PAN_BO_ACCESS_READ |
panfrost_bo_access_for_stage(stage));
-
- memcpy(&descriptors[i], view->bifrost_descriptor, sizeof(*view->bifrost_descriptor));
}
- postfix->textures = panfrost_pool_upload(&batch->pool,
- descriptors,
- sizeof(struct bifrost_texture_descriptor) *
- ctx->sampler_view_count[stage]);
-
- free(descriptors);
+ postfix->textures = T.gpu;
} else {
uint64_t trampolines[PIPE_MAX_SHADER_SAMPLER_VIEWS];
struct mali_vertex_tiler_postfix *postfix)
{
struct panfrost_context *ctx = batch->ctx;
- struct panfrost_device *device = pan_device(ctx->base.screen);
if (!ctx->sampler_count[stage])
return;
- if (device->quirks & IS_BIFROST) {
- size_t desc_size = sizeof(struct bifrost_sampler_descriptor);
- size_t transfer_size = desc_size * ctx->sampler_count[stage];
- struct panfrost_transfer transfer = panfrost_pool_alloc(&batch->pool,
- transfer_size);
- struct bifrost_sampler_descriptor *desc = (struct bifrost_sampler_descriptor *)transfer.cpu;
-
- for (int i = 0; i < ctx->sampler_count[stage]; ++i)
- desc[i] = ctx->samplers[stage][i]->bifrost_hw;
+ size_t desc_size = MALI_BIFROST_SAMPLER_LENGTH;
+ assert(MALI_BIFROST_SAMPLER_LENGTH == MALI_MIDGARD_SAMPLER_LENGTH);
- postfix->sampler_descriptor = transfer.gpu;
- } else {
- size_t desc_size = sizeof(struct mali_sampler_descriptor);
- size_t transfer_size = desc_size * ctx->sampler_count[stage];
- struct panfrost_transfer transfer = panfrost_pool_alloc(&batch->pool,
- transfer_size);
- struct mali_sampler_descriptor *desc = (struct mali_sampler_descriptor *)transfer.cpu;
+ size_t sz = desc_size * ctx->sampler_count[stage];
+ struct panfrost_transfer T = panfrost_pool_alloc(&batch->pool, sz);
+ struct mali_midgard_sampler_packed *out = (struct mali_midgard_sampler_packed *) T.cpu;
- for (int i = 0; i < ctx->sampler_count[stage]; ++i)
- desc[i] = ctx->samplers[stage][i]->midgard_hw;
+ for (unsigned i = 0; i < ctx->sampler_count[stage]; ++i)
+ out[i] = ctx->samplers[stage][i]->hw;
- postfix->sampler_descriptor = transfer.gpu;
- }
+ postfix->sampler_descriptor = T.gpu;
}
void
-panfrost_emit_vertex_attr_meta(struct panfrost_batch *batch,
- struct mali_vertex_tiler_postfix *vertex_postfix)
+panfrost_emit_vertex_data(struct panfrost_batch *batch,
+ struct mali_vertex_tiler_postfix *vertex_postfix)
{
struct panfrost_context *ctx = batch->ctx;
+ struct panfrost_vertex_state *so = ctx->vertex;
- if (!ctx->vertex)
- return;
+ unsigned instance_shift = vertex_postfix->instance_shift;
+ unsigned instance_odd = vertex_postfix->instance_odd;
- struct panfrost_vertex_state *so = ctx->vertex;
+ /* Worst case: everything is NPOT */
- panfrost_vertex_state_upd_attr_offs(ctx, vertex_postfix);
- vertex_postfix->attribute_meta = panfrost_pool_upload(&batch->pool, so->hw,
- sizeof(*so->hw) *
- PAN_MAX_ATTRIBUTE);
-}
+ struct panfrost_transfer S = panfrost_pool_alloc(&batch->pool,
+ MALI_ATTRIBUTE_LENGTH * PIPE_MAX_ATTRIBS * 2);
-void
-panfrost_emit_vertex_data(struct panfrost_batch *batch,
- struct mali_vertex_tiler_postfix *vertex_postfix)
-{
- struct panfrost_context *ctx = batch->ctx;
- struct panfrost_vertex_state *so = ctx->vertex;
+ struct panfrost_transfer T = panfrost_pool_alloc(&batch->pool,
+ MALI_ATTRIBUTE_LENGTH * (PAN_INSTANCE_ID + 1));
+
+ struct mali_attribute_buffer_packed *bufs =
+ (struct mali_attribute_buffer_packed *) S.cpu;
- /* Staged mali_attr, and index into them. i =/= k, depending on the
- * vertex buffer mask and instancing. Twice as much room is allocated,
- * for a worst case of NPOT_DIVIDEs which take up extra slot */
- union mali_attr attrs[PIPE_MAX_ATTRIBS * 2];
+ struct mali_attribute_packed *out =
+ (struct mali_attribute_packed *) T.cpu;
+
+ unsigned attrib_to_buffer[PIPE_MAX_ATTRIBS] = { 0 };
unsigned k = 0;
for (unsigned i = 0; i < so->num_elements; ++i) {
- /* We map a mali_attr to be 1:1 with the mali_attr_meta, which
+ /* We map buffers 1:1 with the attributes, which
* means duplicating some vertex buffers (who cares? aside from
* maybe some caching implications but I somehow doubt that
* matters) */
struct pipe_vertex_element *elem = &so->pipe[i];
unsigned vbi = elem->vertex_buffer_index;
-
- /* The exception to 1:1 mapping is that we can have multiple
- * entries (NPOT divisors), so we fixup anyways */
-
- so->hw[i].index = k;
+ attrib_to_buffer[i] = k;
if (!(ctx->vb_mask & (1 << vbi)))
continue;
if (!rsrc)
continue;
- /* Align to 64 bytes by masking off the lower bits. This
- * will be adjusted back when we fixup the src_offset in
- * mali_attr_meta */
-
- mali_ptr raw_addr = rsrc->bo->gpu + buf->buffer_offset;
- mali_ptr addr = raw_addr & ~63;
- unsigned chopped_addr = raw_addr - addr;
-
/* Add a dependency of the batch on the vertex buffer */
panfrost_batch_add_bo(batch, rsrc->bo,
PAN_BO_ACCESS_SHARED |
PAN_BO_ACCESS_READ |
PAN_BO_ACCESS_VERTEX_TILER);
- /* Set common fields */
- attrs[k].elements = addr;
- attrs[k].stride = buf->stride;
+ /* Mask off lower bits, see offset fixup below */
+ mali_ptr raw_addr = rsrc->bo->gpu + buf->buffer_offset;
+ mali_ptr addr = raw_addr & ~63;
/* Since we advanced the base pointer, we shrink the buffer
- * size */
- attrs[k].size = rsrc->base.width0 - buf->buffer_offset;
+ * size, but add the offset we subtracted */
+ unsigned size = rsrc->base.width0 + (raw_addr - addr)
+ - buf->buffer_offset;
- /* We need to add the extra size we masked off (for
- * correctness) so the data doesn't get clamped away */
- attrs[k].size += chopped_addr;
+ /* When there is a divisor, the hardware-level divisor is
+ * the product of the instance divisor and the padded count */
+ unsigned divisor = elem->instance_divisor;
+ unsigned hw_divisor = ctx->padded_count * divisor;
+ unsigned stride = buf->stride;
- /* For non-instancing make sure we initialize */
- attrs[k].shift = attrs[k].extra_flags = 0;
+ /* If there's a divisor(=1) but no instancing, we want every
+ * attribute to be the same */
- /* Instancing uses a dramatically different code path than
- * linear, so dispatch for the actual emission now that the
- * common code is finished */
+ if (divisor && ctx->instance_count == 1)
+ stride = 0;
- unsigned divisor = elem->instance_divisor;
+ if (!divisor || ctx->instance_count <= 1) {
+ pan_pack(bufs + k, ATTRIBUTE_BUFFER, cfg) {
+ if (ctx->instance_count > 1)
+ cfg.type = MALI_ATTRIBUTE_TYPE_1D_MODULUS;
+
+ cfg.pointer = addr;
+ cfg.stride = stride;
+ cfg.size = size;
+ cfg.divisor_r = instance_shift;
+ cfg.divisor_p = instance_odd;
+ }
+ } else if (util_is_power_of_two_or_zero(hw_divisor)) {
+ pan_pack(bufs + k, ATTRIBUTE_BUFFER, cfg) {
+ cfg.type = MALI_ATTRIBUTE_TYPE_1D_POT_DIVISOR;
+ cfg.pointer = addr;
+ cfg.stride = stride;
+ cfg.size = size;
+ cfg.divisor_r = __builtin_ctz(hw_divisor);
+ }
- if (divisor && ctx->instance_count == 1) {
- /* Silly corner case where there's a divisor(=1) but
- * there's no legitimate instancing. So we want *every*
- * attribute to be the same. So set stride to zero so
- * we don't go anywhere. */
-
- attrs[k].size = attrs[k].stride + chopped_addr;
- attrs[k].stride = 0;
- attrs[k++].elements |= MALI_ATTR_LINEAR;
- } else if (ctx->instance_count <= 1) {
- /* Normal, non-instanced attributes */
- attrs[k++].elements |= MALI_ATTR_LINEAR;
} else {
- unsigned instance_shift = vertex_postfix->instance_shift;
- unsigned instance_odd = vertex_postfix->instance_odd;
+ unsigned shift = 0, extra_flags = 0;
+
+ unsigned magic_divisor =
+ panfrost_compute_magic_divisor(hw_divisor, &shift, &extra_flags);
+
+ pan_pack(bufs + k, ATTRIBUTE_BUFFER, cfg) {
+ cfg.type = MALI_ATTRIBUTE_TYPE_1D_NPOT_DIVISOR;
+ cfg.pointer = addr;
+ cfg.stride = stride;
+ cfg.size = size;
+
+ cfg.divisor_r = shift;
+ cfg.divisor_e = extra_flags;
+ }
- k += panfrost_vertex_instanced(ctx->padded_count,
- instance_shift,
- instance_odd,
- divisor, &attrs[k]);
+ pan_pack(bufs + k + 1, ATTRIBUTE_BUFFER_CONTINUATION_NPOT, cfg) {
+ cfg.divisor_numerator = magic_divisor;
+ cfg.divisor = divisor;
+ }
+
+ ++k;
}
+
+ ++k;
}
/* Add special gl_VertexID/gl_InstanceID buffers */
- panfrost_vertex_id(ctx->padded_count, &attrs[k]);
- so->hw[PAN_VERTEX_ID].index = k++;
- panfrost_instance_id(ctx->padded_count, &attrs[k]);
- so->hw[PAN_INSTANCE_ID].index = k++;
+ panfrost_vertex_id(ctx->padded_count, &bufs[k], ctx->instance_count > 1);
+
+ pan_pack(out + PAN_VERTEX_ID, ATTRIBUTE, cfg) {
+ cfg.buffer_index = k++;
+ cfg.format = so->formats[PAN_VERTEX_ID];
+ }
+
+ panfrost_instance_id(ctx->padded_count, &bufs[k], ctx->instance_count > 1);
+
+ pan_pack(out + PAN_INSTANCE_ID, ATTRIBUTE, cfg) {
+ cfg.buffer_index = k++;
+ cfg.format = so->formats[PAN_INSTANCE_ID];
+ }
+
+ /* Attribute addresses require 64-byte alignment, so let:
+ *
+ * base' = base & ~63 = base - (base & 63)
+ * offset' = offset + (base & 63)
+ *
+ * Since base' + offset' = base + offset, these are equivalent
+ * addressing modes and now base is 64 aligned.
+ */
+
+ unsigned start = vertex_postfix->offset_start;
+
+ for (unsigned i = 0; i < so->num_elements; ++i) {
+ unsigned vbi = so->pipe[i].vertex_buffer_index;
+ struct pipe_vertex_buffer *buf = &ctx->vertex_buffers[vbi];
+
+ /* Adjust by the masked off bits of the offset. Make sure we
+ * read src_offset from so->hw (which is not GPU visible)
+ * rather than target (which is) due to caching effects */
- /* Upload whatever we emitted and go */
+ unsigned src_offset = so->pipe[i].src_offset;
+
+ /* BOs aligned to 4k so guaranteed aligned to 64 */
+ src_offset += (buf->buffer_offset & 63);
+
+ /* Also, somewhat obscurely per-instance data needs to be
+ * offset in response to a delayed start in an indexed draw */
+
+ if (so->pipe[i].instance_divisor && ctx->instance_count > 1 && start)
+ src_offset -= buf->stride * start;
+
+ pan_pack(out + i, ATTRIBUTE, cfg) {
+ cfg.buffer_index = attrib_to_buffer[i];
+ cfg.format = so->formats[i];
+ cfg.offset = src_offset;
+ }
+ }
- vertex_postfix->attributes = panfrost_pool_upload(&batch->pool, attrs,
- k * sizeof(*attrs));
+ vertex_postfix->attributes = S.gpu;
+ vertex_postfix->attribute_meta = T.gpu;
}
static mali_ptr
/* Emitters for varying records */
-static struct mali_attr_meta
-pan_emit_vary(unsigned present, enum pan_special_varying buf,
+static void
+pan_emit_vary(struct mali_attribute_packed *out,
+ unsigned present, enum pan_special_varying buf,
unsigned quirks, enum mali_format format,
unsigned offset)
{
unsigned nr_channels = MALI_EXTRACT_CHANNELS(format);
+ unsigned swizzle = quirks & HAS_SWIZZLES ?
+ panfrost_get_default_swizzle(nr_channels) :
+ panfrost_bifrost_swizzle(nr_channels);
struct mali_attr_meta meta = {
.index = pan_varying_index(present, buf),
.unknown1 = quirks & IS_BIFROST ? 0x0 : 0x2,
- .swizzle = quirks & HAS_SWIZZLES ?
- panfrost_get_default_swizzle(nr_channels) :
- panfrost_bifrost_swizzle(nr_channels),
- .format = format,
+ .format = (format << 12) | swizzle,
.src_offset = offset
};
- return meta;
+ memcpy(out, &meta, sizeof(meta));
}
/* General varying that is unused */
-static struct mali_attr_meta
-pan_emit_vary_only(unsigned present, unsigned quirks)
+static void
+pan_emit_vary_only(struct mali_attribute_packed *out,
+ unsigned present, unsigned quirks)
{
- return pan_emit_vary(present, 0, quirks, MALI_VARYING_DISCARD, 0);
+ pan_emit_vary(out, present, 0, quirks, MALI_VARYING_DISCARD, 0);
}
/* Special records */
[PAN_VARY_FRAGCOORD] = MALI_RGBA32F
};
-static struct mali_attr_meta
-pan_emit_vary_special(unsigned present, enum pan_special_varying buf,
+static void
+pan_emit_vary_special(struct mali_attribute_packed *out,
+ unsigned present, enum pan_special_varying buf,
unsigned quirks)
{
assert(buf < PAN_VARY_MAX);
- return pan_emit_vary(present, buf, quirks, pan_varying_formats[buf], 0);
+ pan_emit_vary(out, present, buf, quirks, pan_varying_formats[buf], 0);
}
static enum mali_format
* a bitfield) 32-bit, smaller than a 64-bit pointer, so may as well pass by
* value. */
-static struct mali_attr_meta
-pan_emit_vary_xfb(unsigned present,
+static void
+pan_emit_vary_xfb(struct mali_attribute_packed *out,
+ unsigned present,
unsigned max_xfb,
unsigned *streamout_offsets,
unsigned quirks,
enum mali_format format,
struct pipe_stream_output o)
{
+ unsigned swizzle = quirks & HAS_SWIZZLES ?
+ panfrost_get_default_swizzle(o.num_components) :
+ panfrost_bifrost_swizzle(o.num_components);
+
/* Otherwise construct a record for it */
struct mali_attr_meta meta = {
/* XFB buffers come after everything else */
/* As usual unknown bit */
.unknown1 = quirks & IS_BIFROST ? 0x0 : 0x2,
- /* Override swizzle with number of channels */
- .swizzle = quirks & HAS_SWIZZLES ?
- panfrost_get_default_swizzle(o.num_components) :
- panfrost_bifrost_swizzle(o.num_components),
-
/* Override number of channels and precision to highp */
- .format = pan_xfb_format(format, o.num_components),
+ .format = (pan_xfb_format(format, o.num_components) << 12) | swizzle,
/* Apply given offsets together */
.src_offset = (o.dst_offset * 4) /* dwords */
+ streamout_offsets[o.output_buffer]
};
- return meta;
+ memcpy(out, &meta, sizeof(meta));
}
/* Determine if we should capture a varying for XFB. This requires actually
return o->output_buffer < max_xfb;
}
-/* Higher-level wrapper around all of the above, classifying a varying into one
- * of the above types */
-
-static struct mali_attr_meta
-panfrost_emit_varying(
- struct panfrost_shader_state *stage,
+static void
+pan_emit_general_varying(struct mali_attribute_packed *out,
struct panfrost_shader_state *other,
struct panfrost_shader_state *xfb,
+ gl_varying_slot loc,
+ enum mali_format format,
unsigned present,
- unsigned max_xfb,
- unsigned *streamout_offsets,
unsigned quirks,
unsigned *gen_offsets,
enum mali_format *gen_formats,
unsigned *gen_stride,
unsigned idx,
- bool should_alloc,
- bool is_fragment)
+ bool should_alloc)
{
- gl_varying_slot loc = stage->varyings_loc[idx];
- enum mali_format format = stage->varyings[idx];
-
- /* Override format to match linkage */
- if (!should_alloc && gen_formats[idx])
- format = gen_formats[idx];
-
- if (has_point_coord(stage->point_sprite_mask, loc)) {
- return pan_emit_vary_special(present, PAN_VARY_PNTCOORD, quirks);
- } else if (panfrost_xfb_captured(xfb, loc, max_xfb)) {
- struct pipe_stream_output *o = pan_get_so(&xfb->stream_output, loc);
- return pan_emit_vary_xfb(present, max_xfb, streamout_offsets, quirks, format, *o);
- } else if (loc == VARYING_SLOT_POS) {
- if (is_fragment)
- return pan_emit_vary_special(present, PAN_VARY_FRAGCOORD, quirks);
- else
- return pan_emit_vary_special(present, PAN_VARY_POSITION, quirks);
- } else if (loc == VARYING_SLOT_PSIZ) {
- return pan_emit_vary_special(present, PAN_VARY_PSIZ, quirks);
- } else if (loc == VARYING_SLOT_PNTC) {
- return pan_emit_vary_special(present, PAN_VARY_PNTCOORD, quirks);
- } else if (loc == VARYING_SLOT_FACE) {
- return pan_emit_vary_special(present, PAN_VARY_FACE, quirks);
- }
-
- /* We've exhausted special cases, so it's otherwise a general varying. Check if we're linked */
+ /* Check if we're linked */
signed other_idx = -1;
for (unsigned j = 0; j < other->varying_count; ++j) {
}
}
- if (other_idx < 0)
- return pan_emit_vary_only(present, quirks);
+ if (other_idx < 0) {
+ pan_emit_vary_only(out, present, quirks);
+ return;
+ }
unsigned offset = gen_offsets[other_idx];
*gen_stride += size;
}
- return pan_emit_vary(present, PAN_VARY_GENERAL,
- quirks, format, offset);
+ pan_emit_vary(out, present, PAN_VARY_GENERAL, quirks, format, offset);
+}
+
+/* Higher-level wrapper around all of the above, classifying a varying into one
+ * of the above types */
+
+static void
+panfrost_emit_varying(
+ struct mali_attribute_packed *out,
+ struct panfrost_shader_state *stage,
+ struct panfrost_shader_state *other,
+ struct panfrost_shader_state *xfb,
+ unsigned present,
+ unsigned max_xfb,
+ unsigned *streamout_offsets,
+ unsigned quirks,
+ unsigned *gen_offsets,
+ enum mali_format *gen_formats,
+ unsigned *gen_stride,
+ unsigned idx,
+ bool should_alloc,
+ bool is_fragment)
+{
+ gl_varying_slot loc = stage->varyings_loc[idx];
+ enum mali_format format = stage->varyings[idx];
+
+ /* Override format to match linkage */
+ if (!should_alloc && gen_formats[idx])
+ format = gen_formats[idx];
+
+ if (has_point_coord(stage->point_sprite_mask, loc)) {
+ pan_emit_vary_special(out, present, PAN_VARY_PNTCOORD, quirks);
+ } else if (panfrost_xfb_captured(xfb, loc, max_xfb)) {
+ struct pipe_stream_output *o = pan_get_so(&xfb->stream_output, loc);
+ pan_emit_vary_xfb(out, present, max_xfb, streamout_offsets, quirks, format, *o);
+ } else if (loc == VARYING_SLOT_POS) {
+ if (is_fragment)
+ pan_emit_vary_special(out, present, PAN_VARY_FRAGCOORD, quirks);
+ else
+ pan_emit_vary_special(out, present, PAN_VARY_POSITION, quirks);
+ } else if (loc == VARYING_SLOT_PSIZ) {
+ pan_emit_vary_special(out, present, PAN_VARY_PSIZ, quirks);
+ } else if (loc == VARYING_SLOT_PNTC) {
+ pan_emit_vary_special(out, present, PAN_VARY_PNTCOORD, quirks);
+ } else if (loc == VARYING_SLOT_FACE) {
+ pan_emit_vary_special(out, present, PAN_VARY_FACE, quirks);
+ } else {
+ pan_emit_general_varying(out, other, xfb, loc, format, present,
+ quirks, gen_offsets, gen_formats, gen_stride,
+ idx, should_alloc);
+ }
}
static void
ctx->streamout.targets[i]);
}
- struct mali_attr_meta *ovs = (struct mali_attr_meta *)trans.cpu;
- struct mali_attr_meta *ofs = ovs + vs->varying_count;
+ struct mali_attribute_packed *ovs = (struct mali_attribute_packed *)trans.cpu;
+ struct mali_attribute_packed *ofs = ovs + vs->varying_count;
for (unsigned i = 0; i < vs->varying_count; i++) {
- ovs[i] = panfrost_emit_varying(vs, fs, vs, present,
+ panfrost_emit_varying(ovs + i, vs, fs, vs, present,
ctx->streamout.num_targets, streamout_offsets,
dev->quirks,
gen_offsets, gen_formats, &gen_stride, i, true, false);
}
for (unsigned i = 0; i < fs->varying_count; i++) {
- ofs[i] = panfrost_emit_varying(fs, vs, vs, present,
+ panfrost_emit_varying(ofs + i, fs, vs, vs, present,
ctx->streamout.num_targets, streamout_offsets,
dev->quirks,
gen_offsets, gen_formats, &gen_stride, i, false, true);
projects / mesa.git / blobdiff