Merge remote branch 'origin/master' into pipe-video

[mesa.git] / src / gallium / drivers / r600 / evergreend.h

diff --git a/src/gallium/drivers/r600/evergreend.h b/src/gallium/drivers/r600/evergreend.h
index e265348a19c11a1d4059937806bea5fe95070667..a337916c0981de887225d8f1d17349f4e131f59d 100644 (file)
--- a/src/gallium/drivers/r600/evergreend.h
+++ b/src/gallium/drivers/r600/evergreend.h
@@ -686,6 +686,9 @@
 #define   S_02880C_Z_EXPORT_ENABLE(x)                  (((x) & 0x1) << 0)
 #define   G_02880C_Z_EXPORT_ENABLE(x)                  (((x) >> 0) & 0x1)
 #define   C_02880C_Z_EXPORT_ENABLE                     0xFFFFFFFE
+#define   S_02880C_STENCIL_EXPORT_ENABLE(x)            (((x) & 0x1) << 1)
+#define   G_02880C_STENCIL_EXPORT_ENABLE(x)            (((x) >> 1) & 0x1)
+#define   C_02880C_STENCIL_EXPORT_ENABLE               0xFFFFFFFD
 #define   S_02880C_Z_ORDER(x)                          (((x) & 0x3) << 4)
 #define   G_02880C_Z_ORDER(x)                          (((x) >> 4) & 0x3)
 #define   C_02880C_Z_ORDER                             0xFFFFFCFF
@@ -984,9 +987,6 @@
 #define   S_030010_ENDIAN_SWAP(x)                      (((x) & 0x3) << 12)
 #define   G_030010_ENDIAN_SWAP(x)                      (((x) >> 12) & 0x3)
 #define   C_030010_ENDIAN_SWAP                         0xFFFFCFFF
-#define   S_030010_REQUEST_SIZE(x)                     (((x) & 0x3) << 14)
-#define   G_030010_REQUEST_SIZE(x)                     (((x) >> 14) & 0x3)
-#define   C_030010_REQUEST_SIZE                        0xFFFF3FFF
 #define   S_030010_DST_SEL_X(x)                        (((x) & 0x7) << 16)
 #define   G_030010_DST_SEL_X(x)                        (((x) >> 16) & 0x7)
 #define   C_030010_DST_SEL_X                           0xFFF8FFFF
@@ -1050,45 +1050,6 @@
 #define   S_030008_DATA_FORMAT(x)                      (((x) & 0x3F) << 20)
 #define   G_030008_DATA_FORMAT(x)                      (((x) >> 20) & 0x3F)
 #define   C_030008_DATA_FORMAT                         0xFC0FFFFF
-#define     V_030008_FMT_INVALID                     0x00000000
-#define     V_030008_FMT_8                           0x00000001
-#define     V_030008_FMT_4_4                         0x00000002
-#define     V_030008_FMT_3_3_2                       0x00000003
-#define     V_030008_FMT_16                          0x00000005
-#define     V_030008_FMT_16_FLOAT                    0x00000006
-#define     V_030008_FMT_8_8                         0x00000007
-#define     V_030008_FMT_5_6_5                       0x00000008
-#define     V_030008_FMT_6_5_5                       0x00000009
-#define     V_030008_FMT_1_5_5_5                     0x0000000A
-#define     V_030008_FMT_4_4_4_4                     0x0000000B
-#define     V_030008_FMT_5_5_5_1                     0x0000000C
-#define     V_030008_FMT_32                          0x0000000D
-#define     V_030008_FMT_32_FLOAT                    0x0000000E
-#define     V_030008_FMT_16_16                       0x0000000F
-#define     V_030008_FMT_16_16_FLOAT                 0x00000010
-#define     V_030008_FMT_8_24                        0x00000011
-#define     V_030008_FMT_8_24_FLOAT                  0x00000012
-#define     V_030008_FMT_24_8                        0x00000013
-#define     V_030008_FMT_24_8_FLOAT                  0x00000014
-#define     V_030008_FMT_10_11_11                    0x00000015
-#define     V_030008_FMT_10_11_11_FLOAT              0x00000016
-#define     V_030008_FMT_11_11_10                    0x00000017
-#define     V_030008_FMT_11_11_10_FLOAT              0x00000018
-#define     V_030008_FMT_2_10_10_10                  0x00000019
-#define     V_030008_FMT_8_8_8_8                     0x0000001A
-#define     V_030008_FMT_10_10_10_2                  0x0000001B
-#define     V_030008_FMT_X24_8_32_FLOAT              0x0000001C
-#define     V_030008_FMT_32_32                       0x0000001D
-#define     V_030008_FMT_32_32_FLOAT                 0x0000001E
-#define     V_030008_FMT_16_16_16_16                 0x0000001F
-#define     V_030008_FMT_16_16_16_16_FLOAT           0x00000020
-#define     V_030008_FMT_32_32_32_32                 0x00000022
-#define     V_030008_FMT_32_32_32_32_FLOAT           0x00000023
-#define     V_030008_FMT_8_8_8                       0x0000002c
-#define     V_030008_FMT_16_16_16                    0x0000002d
-#define     V_030008_FMT_16_16_16_FLOAT              0x0000002e
-#define     V_030008_FMT_32_32_32                    0x0000002f
-#define     V_030008_FMT_32_32_32_FLOAT              0x00000030
 #define   S_030008_NUM_FORMAT_ALL(x)                   (((x) & 0x3) << 26)
 #define   G_030008_NUM_FORMAT_ALL(x)                   (((x) >> 26) & 0x3)
 #define   C_030008_NUM_FORMAT_ALL                      0xF3FFFFFF
@@ -1675,6 +1636,9 @@
 #define R_028980_ALU_CONST_CACHE_VS_0                0x00028980
 #define R_028A04_PA_SU_POINT_MINMAX                  0x00028A04
 #define R_028A08_PA_SU_LINE_CNTL                     0x00028A08
+#define   S_028A08_WIDTH(x)                            (((x) & 0xFFFF) << 0)
+#define   G_028A08_WIDTH(x)                            (((x) >> 0) & 0xFFFF)
+#define   C_028A08_WIDTH                               0xFFFF0000
 #define R_028A10_VGT_OUTPUT_PATH_CNTL                0x00028A10
 #define R_028A14_VGT_HOS_CNTL                        0x00028A14
 #define R_028A18_VGT_HOS_MAX_TESS_LEVEL              0x00028A18
@@ -1726,6 +1690,9 @@
 #define R_028C00_PA_SC_LINE_CNTL                     0x00028C00
 #define R_028C04_PA_SC_AA_CONFIG                     0x00028C04
 #define R_028C08_PA_SU_VTX_CNTL                      0x00028C08
+#define   S_028C08_PIX_CENTER_HALF(x)                  (((x) & 0x1) << 0)
+#define   G_028C08_PIX_CENTER_HALF(x)                  (((x) >> 0) & 0x1)
+#define   C_028C08_PIX_CENTER_HALF                     0xFFFFFFFE
 #define R_028C0C_PA_CL_GB_VERT_CLIP_ADJ              0x00028C0C
 #define R_028C10_PA_CL_GB_VERT_DISC_ADJ              0x00028C10
 #define R_028C14_PA_CL_GB_HORZ_CLIP_ADJ              0x00028C14
@@ -1910,4 +1877,5 @@
 #define R_03CFF0_SQ_VTX_BASE_VTX_LOC                    0x03CFF0
 #define R_03CFF4_SQ_VTX_START_INST_LOC                  0x03CFF4
 
+#define R_03A200_SQ_LOOP_CONST_0                     0x3A200
 #endif