#include "r600d.h"
#include <errno.h>
-#include <byteswap.h>
+#include "util/u_bitcast.h"
#include "util/u_dump.h"
#include "util/u_memory.h"
+#include "util/u_math.h"
#include "pipe/p_shader_tokens.h"
+#include "sb/sb_public.h"
+
#define NUM_OF_CYCLES 3
#define NUM_OF_COMPONENTS 4
-static inline unsigned int r600_bytecode_get_num_operands(
- struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
+static inline bool alu_writes(struct r600_bytecode_alu *alu)
{
- return r600_isa_alu(alu->op)->src_count;
+ return alu->dst.write || alu->is_op3;
}
-int r700_bytecode_alu_build(struct r600_bytecode *bc,
- struct r600_bytecode_alu *alu, unsigned id);
+static inline unsigned int r600_bytecode_get_num_operands(const struct r600_bytecode_alu *alu)
+{
+ return r600_isa_alu(alu->op)->src_count;
+}
static struct r600_bytecode_cf *r600_bytecode_cf(void)
{
struct r600_bytecode_cf *cf = CALLOC_STRUCT(r600_bytecode_cf);
- if (cf == NULL)
+ if (!cf)
return NULL;
- LIST_INITHEAD(&cf->list);
- LIST_INITHEAD(&cf->alu);
- LIST_INITHEAD(&cf->vtx);
- LIST_INITHEAD(&cf->tex);
+ list_inithead(&cf->list);
+ list_inithead(&cf->alu);
+ list_inithead(&cf->vtx);
+ list_inithead(&cf->tex);
+ list_inithead(&cf->gds);
return cf;
}
{
struct r600_bytecode_alu *alu = CALLOC_STRUCT(r600_bytecode_alu);
- if (alu == NULL)
+ if (!alu)
return NULL;
- LIST_INITHEAD(&alu->list);
+ list_inithead(&alu->list);
return alu;
}
{
struct r600_bytecode_vtx *vtx = CALLOC_STRUCT(r600_bytecode_vtx);
- if (vtx == NULL)
+ if (!vtx)
return NULL;
- LIST_INITHEAD(&vtx->list);
+ list_inithead(&vtx->list);
return vtx;
}
{
struct r600_bytecode_tex *tex = CALLOC_STRUCT(r600_bytecode_tex);
- if (tex == NULL)
+ if (!tex)
return NULL;
- LIST_INITHEAD(&tex->list);
+ list_inithead(&tex->list);
return tex;
}
+static struct r600_bytecode_gds *r600_bytecode_gds(void)
+{
+ struct r600_bytecode_gds *gds = CALLOC_STRUCT(r600_bytecode_gds);
+
+ if (gds == NULL)
+ return NULL;
+ list_inithead(&gds->list);
+ return gds;
+}
+
static unsigned stack_entry_size(enum radeon_family chip) {
/* Wavefront size:
* 64: R600/RV670/RV770/Cypress/R740/Barts/Turks/Caicos/
void r600_bytecode_init(struct r600_bytecode *bc,
enum chip_class chip_class,
enum radeon_family family,
- enum r600_msaa_texture_mode msaa_texture_mode)
+ bool has_compressed_msaa_texturing)
{
+ static unsigned next_shader_id = 0;
+
+ bc->debug_id = ++next_shader_id;
+
if ((chip_class == R600) &&
(family != CHIP_RV670 && family != CHIP_RS780 && family != CHIP_RS880)) {
bc->ar_handling = AR_HANDLE_RV6XX;
bc->r6xx_nop_after_rel_dst = 0;
}
- LIST_INITHEAD(&bc->cf);
+ list_inithead(&bc->cf);
bc->chip_class = chip_class;
- bc->msaa_texture_mode = msaa_texture_mode;
+ bc->family = family;
+ bc->has_compressed_msaa_texturing = has_compressed_msaa_texturing;
bc->stack.entry_size = stack_entry_size(family);
}
{
struct r600_bytecode_cf *cf = r600_bytecode_cf();
- if (cf == NULL)
+ if (!cf)
return -ENOMEM;
LIST_ADDTAIL(&cf->list, &bc->cf);
if (bc->cf_last) {
if ((output->gpr + output->burst_count) == bc->cf_last->output.gpr &&
(output->array_base + output->burst_count) == bc->cf_last->output.array_base) {
- bc->cf_last->output.end_of_program |= output->end_of_program;
bc->cf_last->op = bc->cf_last->output.op = output->op;
bc->cf_last->output.gpr = output->gpr;
bc->cf_last->output.array_base = output->array_base;
} else if (output->gpr == (bc->cf_last->output.gpr + bc->cf_last->output.burst_count) &&
output->array_base == (bc->cf_last->output.array_base + bc->cf_last->output.burst_count)) {
- bc->cf_last->output.end_of_program |= output->end_of_program;
bc->cf_last->op = bc->cf_last->output.op = output->op;
bc->cf_last->output.burst_count += output->burst_count;
return 0;
return r;
bc->cf_last->op = output->op;
memcpy(&bc->cf_last->output, output, sizeof(struct r600_bytecode_output));
+ bc->cf_last->barrier = 1;
return 0;
}
+int r600_bytecode_add_pending_output(struct r600_bytecode *bc,
+ const struct r600_bytecode_output *output)
+{
+ assert(bc->n_pending_outputs + 1 < ARRAY_SIZE(bc->pending_outputs));
+ bc->pending_outputs[bc->n_pending_outputs++] = *output;
+
+ return 0;
+}
+
+void r600_bytecode_need_wait_ack(struct r600_bytecode *bc, boolean need_wait_ack)
+{
+ bc->need_wait_ack = need_wait_ack;
+}
+
+boolean r600_bytecode_get_need_wait_ack(struct r600_bytecode *bc)
+{
+ return bc->need_wait_ack;
+}
+
/* alu instructions that can ony exits once per group */
-static int is_alu_once_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
+static int is_alu_once_inst(struct r600_bytecode_alu *alu)
{
- return r600_isa_alu(alu->op)->flags & (AF_KILL | AF_PRED);
+ return r600_isa_alu(alu->op)->flags & (AF_KILL | AF_PRED) || alu->is_lds_idx_op || alu->op == ALU_OP0_GROUP_BARRIER;
}
static int is_alu_reduction_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
(r600_isa_alu_slots(bc->isa->hw_class, alu->op) == AF_4V);
}
-static int is_alu_mova_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
+static int is_alu_mova_inst(struct r600_bytecode_alu *alu)
{
return r600_isa_alu(alu->op)->flags & AF_MOVA;
}
-static int alu_uses_rel(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
+static int alu_uses_rel(struct r600_bytecode_alu *alu)
{
- unsigned num_src = r600_bytecode_get_num_operands(bc, alu);
+ unsigned num_src = r600_bytecode_get_num_operands(alu);
unsigned src;
if (alu->dst.rel) {
return 0;
}
+static int is_lds_read(int sel)
+{
+ return sel == EG_V_SQ_ALU_SRC_LDS_OQ_A_POP || sel == EG_V_SQ_ALU_SRC_LDS_OQ_B_POP;
+}
+
+static int alu_uses_lds(struct r600_bytecode_alu *alu)
+{
+ unsigned num_src = r600_bytecode_get_num_operands(alu);
+ unsigned src;
+
+ for (src = 0; src < num_src; ++src) {
+ if (is_lds_read(alu->src[src].sel)) {
+ return 1;
+ }
+ }
+ return 0;
+}
+
+static int is_alu_64bit_inst(struct r600_bytecode_alu *alu)
+{
+ const struct alu_op_info *op = r600_isa_alu(alu->op);
+ return (op->flags & AF_64);
+}
+
static int is_alu_vec_unit_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
{
unsigned slots = r600_isa_alu_slots(bc->isa->hw_class, alu->op);
return slots == AF_VS;
}
-static int is_nop_inst(struct r600_bytecode *bc, struct r600_bytecode_alu *alu)
+static int is_nop_inst(struct r600_bytecode_alu *alu)
{
return alu->op == ALU_OP0_NOP;
-}
+}
static int assign_alu_units(struct r600_bytecode *bc, struct r600_bytecode_alu *alu_first,
struct r600_bytecode_alu *assignment[5])
return 0;
}
-static int reserve_cfile(struct r600_bytecode *bc, struct alu_bank_swizzle *bs, unsigned sel, unsigned chan)
+static int reserve_cfile(const struct r600_bytecode *bc,
+ struct alu_bank_swizzle *bs, unsigned sel, unsigned chan)
{
int res, num_res = 4;
if (bc->chip_class >= R700) {
static int is_gpr(unsigned sel)
{
- return (sel >= 0 && sel <= 127);
+ return (sel <= 127);
}
/* CB constants start at 512, and get translated to a kcache index when ALU
sel <= V_SQ_ALU_SRC_LITERAL);
}
-static int check_vector(struct r600_bytecode *bc, struct r600_bytecode_alu *alu,
+static int check_vector(const struct r600_bytecode *bc, const struct r600_bytecode_alu *alu,
struct alu_bank_swizzle *bs, int bank_swizzle)
{
int r, src, num_src, sel, elem, cycle;
- num_src = r600_bytecode_get_num_operands(bc, alu);
+ num_src = r600_bytecode_get_num_operands(alu);
for (src = 0; src < num_src; src++) {
sel = alu->src[src].sel;
elem = alu->src[src].chan;
return 0;
}
-static int check_scalar(struct r600_bytecode *bc, struct r600_bytecode_alu *alu,
+static int check_scalar(const struct r600_bytecode *bc, const struct r600_bytecode_alu *alu,
struct alu_bank_swizzle *bs, int bank_swizzle)
{
int r, src, num_src, const_count, sel, elem, cycle;
- num_src = r600_bytecode_get_num_operands(bc, alu);
+ num_src = r600_bytecode_get_num_operands(alu);
for (const_count = 0, src = 0; src < num_src; ++src) {
sel = alu->src[src].sel;
elem = alu->src[src].chan;
return 0;
}
-static int check_and_set_bank_swizzle(struct r600_bytecode *bc,
+static int check_and_set_bank_swizzle(const struct r600_bytecode *bc,
struct r600_bytecode_alu *slots[5])
{
struct alu_bank_swizzle bs;
return r;
for (i = 0; i < max_slots; ++i) {
- if (prev[i] && (prev[i]->dst.write || prev[i]->is_op3) && !prev[i]->dst.rel) {
+ if (prev[i] && alu_writes(prev[i]) && !prev[i]->dst.rel) {
+
+ if (is_alu_64bit_inst(prev[i])) {
+ gpr[i] = -1;
+ continue;
+ }
+
gpr[i] = prev[i]->dst.sel;
/* cube writes more than PV.X */
if (is_alu_reduction_inst(bc, prev[i]))
for (i = 0; i < max_slots; ++i) {
struct r600_bytecode_alu *alu = slots[i];
- if(!alu)
+ if (!alu)
continue;
- num_src = r600_bytecode_get_num_operands(bc, alu);
+ if (is_alu_64bit_inst(alu))
+ continue;
+ num_src = r600_bytecode_get_num_operands(alu);
for (src = 0; src < num_src; ++src) {
if (!is_gpr(alu->src[src].sel) || alu->src[src].rel)
continue;
return 0;
}
-void r600_bytecode_special_constants(uint32_t value, unsigned *sel, unsigned *neg)
+void r600_bytecode_special_constants(uint32_t value, unsigned *sel, unsigned *neg, unsigned abs)
{
switch(value) {
case 0:
break;
case 0xBF800000: /* -1.0f */
*sel = V_SQ_ALU_SRC_1;
- *neg ^= 1;
+ *neg ^= !abs;
break;
case 0xBF000000: /* -0.5f */
*sel = V_SQ_ALU_SRC_0_5;
- *neg ^= 1;
+ *neg ^= !abs;
break;
default:
*sel = V_SQ_ALU_SRC_LITERAL;
}
/* compute how many literal are needed */
-static int r600_bytecode_alu_nliterals(struct r600_bytecode *bc, struct r600_bytecode_alu *alu,
+static int r600_bytecode_alu_nliterals(struct r600_bytecode_alu *alu,
uint32_t literal[4], unsigned *nliteral)
{
- unsigned num_src = r600_bytecode_get_num_operands(bc, alu);
+ unsigned num_src = r600_bytecode_get_num_operands(alu);
unsigned i, j;
for (i = 0; i < num_src; ++i) {
return 0;
}
-static void r600_bytecode_alu_adjust_literals(struct r600_bytecode *bc,
- struct r600_bytecode_alu *alu,
- uint32_t literal[4], unsigned nliteral)
+static void r600_bytecode_alu_adjust_literals(struct r600_bytecode_alu *alu,
+ uint32_t literal[4], unsigned nliteral)
{
- unsigned num_src = r600_bytecode_get_num_operands(bc, alu);
+ unsigned num_src = r600_bytecode_get_num_operands(alu);
unsigned i, j;
for (i = 0; i < num_src; ++i) {
if (prev[i]) {
if (prev[i]->pred_sel)
return 0;
- if (is_alu_once_inst(bc, prev[i]))
+ if (is_alu_once_inst(prev[i]))
return 0;
}
if (slots[i]) {
if (slots[i]->pred_sel)
return 0;
- if (is_alu_once_inst(bc, slots[i]))
+ if (is_alu_once_inst(slots[i]))
return 0;
}
}
/* check number of literals */
if (prev[i]) {
- if (r600_bytecode_alu_nliterals(bc, prev[i], literal, &nliteral))
+ if (r600_bytecode_alu_nliterals(prev[i], literal, &nliteral))
return 0;
- if (r600_bytecode_alu_nliterals(bc, prev[i], prev_literal, &prev_nliteral))
+ if (r600_bytecode_alu_nliterals(prev[i], prev_literal, &prev_nliteral))
return 0;
- if (is_alu_mova_inst(bc, prev[i])) {
+ if (is_alu_mova_inst(prev[i])) {
if (have_rel)
return 0;
have_mova = 1;
}
- if (alu_uses_rel(bc, prev[i])) {
+ if (alu_uses_rel(prev[i])) {
if (have_mova) {
return 0;
}
have_rel = 1;
}
+ if (alu_uses_lds(prev[i]))
+ return 0;
- num_once_inst += is_alu_once_inst(bc, prev[i]);
+ num_once_inst += is_alu_once_inst(prev[i]);
}
- if (slots[i] && r600_bytecode_alu_nliterals(bc, slots[i], literal, &nliteral))
+ if (slots[i] && r600_bytecode_alu_nliterals(slots[i], literal, &nliteral))
return 0;
/* Let's check used slots. */
} else if (prev[i] && slots[i]) {
if (max_slots == 5 && result[4] == NULL && prev[4] == NULL && slots[4] == NULL) {
/* Trans unit is still free try to use it. */
- if (is_alu_any_unit_inst(bc, slots[i])) {
+ if (is_alu_any_unit_inst(bc, slots[i]) && !alu_uses_lds(slots[i])) {
result[i] = prev[i];
result[4] = slots[i];
} else if (is_alu_any_unit_inst(bc, prev[i])) {
if (slots[i]->dst.sel == prev[i]->dst.sel &&
- (slots[i]->dst.write == 1 || slots[i]->is_op3) &&
- (prev[i]->dst.write == 1 || prev[i]->is_op3))
+ alu_writes(slots[i]) &&
+ alu_writes(prev[i]))
return 0;
result[i] = slots[i];
if (max_slots == 5 && slots[i] && prev[4] &&
slots[i]->dst.sel == prev[4]->dst.sel &&
slots[i]->dst.chan == prev[4]->dst.chan &&
- (slots[i]->dst.write == 1 || slots[i]->is_op3) &&
- (prev[4]->dst.write == 1 || prev[4]->is_op3))
+ alu_writes(slots[i]) &&
+ alu_writes(prev[4]))
return 0;
result[i] = slots[i];
}
alu = slots[i];
- num_once_inst += is_alu_once_inst(bc, alu);
+ num_once_inst += is_alu_once_inst(alu);
/* don't reschedule NOPs */
- if (is_nop_inst(bc, alu))
+ if (is_nop_inst(alu))
return 0;
- if (is_alu_mova_inst(bc, alu)) {
+ if (is_alu_mova_inst(alu)) {
if (have_rel) {
return 0;
}
have_mova = 1;
}
- if (alu_uses_rel(bc, alu)) {
+ if (alu_uses_rel(alu)) {
if (have_mova) {
return 0;
}
have_rel = 1;
}
+ if (alu->op == ALU_OP0_SET_CF_IDX0 ||
+ alu->op == ALU_OP0_SET_CF_IDX1)
+ return 0; /* data hazard with MOVA */
+
/* Let's check source gprs */
- num_src = r600_bytecode_get_num_operands(bc, alu);
+ num_src = r600_bytecode_get_num_operands(alu);
for (src = 0; src < num_src; ++src) {
/* Constants don't matter. */
continue;
for (j = 0; j < max_slots; ++j) {
- if (!prev[j] || !(prev[j]->dst.write || prev[j]->is_op3))
+ if (!prev[j] || !alu_writes(prev[j]))
continue;
/* If it's relative then we can't determin which gpr is really used. */
/* we'll keep kcache sets sorted by bank & addr */
static int r600_bytecode_alloc_kcache_line(struct r600_bytecode *bc,
struct r600_bytecode_kcache *kcache,
- unsigned bank, unsigned line)
+ unsigned bank, unsigned line, unsigned index_mode)
{
int i, kcache_banks = bc->chip_class >= EVERGREEN ? 4 : 2;
kcache[i].mode = V_SQ_CF_KCACHE_LOCK_1;
kcache[i].bank = bank;
kcache[i].addr = line;
+ kcache[i].index_mode = index_mode;
return 0;
}
kcache[i].mode = V_SQ_CF_KCACHE_LOCK_1;
kcache[i].bank = bank;
kcache[i].addr = line;
+ kcache[i].index_mode = index_mode;
return 0;
}
}
int i, r;
for (i = 0; i < 3; i++) {
- unsigned bank, line, sel = alu->src[i].sel;
+ unsigned bank, line, sel = alu->src[i].sel, index_mode;
if (sel < 512)
continue;
bank = alu->src[i].kc_bank;
+ assert(bank < R600_MAX_HW_CONST_BUFFERS);
line = (sel-512)>>4;
+ index_mode = alu->src[i].kc_rel ? 1 : 0; // V_SQ_CF_INDEX_0 / V_SQ_CF_INDEX_NONE
- if ((r = r600_bytecode_alloc_kcache_line(bc, kcache, bank, line)))
+ if ((r = r600_bytecode_alloc_kcache_line(bc, kcache, bank, line, index_mode)))
return r;
}
return 0;
}
-static int r600_bytecode_assign_kcache_banks(struct r600_bytecode *bc,
+static int r600_bytecode_assign_kcache_banks(
struct r600_bytecode_alu *alu,
struct r600_bytecode_kcache * kcache)
{
memcpy(bc->cf_last->kcache, kcache, 4 * sizeof(struct r600_bytecode_kcache));
}
- /* if we actually used more than 2 kcache sets - use ALU_EXTENDED on eg+ */
- if (kcache[2].mode != V_SQ_CF_KCACHE_NOP) {
+ /* if we actually used more than 2 kcache sets, or have relative indexing - use ALU_EXTENDED on eg+ */
+ if (kcache[2].mode != V_SQ_CF_KCACHE_NOP ||
+ kcache[0].index_mode || kcache[1].index_mode || kcache[2].index_mode || kcache[3].index_mode) {
if (bc->chip_class < EVERGREEN)
return -ENOMEM;
bc->cf_last->eg_alu_extended = 1;
struct r600_bytecode_alu *lalu;
int i, r;
- if (nalu == NULL)
+ if (!nalu)
return -ENOMEM;
memcpy(nalu, alu, sizeof(struct r600_bytecode_alu));
+ if (alu->is_op3) {
+ /* will fail later since alu does not support it. */
+ assert(!alu->src[0].abs && !alu->src[1].abs && !alu->src[2].abs);
+ }
+
if (bc->cf_last != NULL && bc->cf_last->op != type) {
/* check if we could add it anyway */
if (bc->cf_last->op == CF_OP_ALU &&
}
bc->cf_last->op = type;
+ /* Load index register if required */
+ if (bc->chip_class >= EVERGREEN) {
+ for (i = 0; i < 3; i++)
+ if (nalu->src[i].kc_bank && nalu->src[i].kc_rel)
+ egcm_load_index_reg(bc, 0, true);
+ }
+
/* Check AR usage and load it if required */
for (i = 0; i < 3; i++)
if (nalu->src[i].rel && !bc->ar_loaded)
}
if (nalu->src[i].sel == V_SQ_ALU_SRC_LITERAL)
r600_bytecode_special_constants(nalu->src[i].value,
- &nalu->src[i].sel, &nalu->src[i].neg);
+ &nalu->src[i].sel, &nalu->src[i].neg, nalu->src[i].abs);
}
if (nalu->dst.sel >= bc->ngpr) {
bc->ngpr = nalu->dst.sel + 1;
for (i = 0, nliteral = 0; i < max_slots; i++) {
if (slots[i]) {
- r = r600_bytecode_alu_nliterals(bc, slots[i], literal, &nliteral);
+ r = r600_bytecode_alu_nliterals(slots[i], literal, &nliteral);
if (r)
return r;
}
if (nalu->dst.rel && bc->r6xx_nop_after_rel_dst)
insert_nop_r6xx(bc);
+ /* Might need to insert spill write ops after current clause */
+ if (nalu->last && bc->n_pending_outputs) {
+ while (bc->n_pending_outputs) {
+ r = r600_bytecode_add_output(bc, &bc->pending_outputs[--bc->n_pending_outputs]);
+ if (r)
+ return r;
+ }
+ }
+
return 0;
}
static inline boolean last_inst_was_not_vtx_fetch(struct r600_bytecode *bc)
{
return !((r600_isa_cf(bc->cf_last->op)->flags & CF_FETCH) &&
- (bc->chip_class == CAYMAN ||
- bc->cf_last->op != CF_OP_TEX));
+ bc->cf_last->op != CF_OP_GDS &&
+ (bc->chip_class == CAYMAN ||
+ bc->cf_last->op != CF_OP_TEX));
}
-int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx)
+static int r600_bytecode_add_vtx_internal(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx,
+ bool use_tc)
{
struct r600_bytecode_vtx *nvtx = r600_bytecode_vtx();
int r;
- if (nvtx == NULL)
+ if (!nvtx)
return -ENOMEM;
memcpy(nvtx, vtx, sizeof(struct r600_bytecode_vtx));
+ /* Load index register if required */
+ if (bc->chip_class >= EVERGREEN) {
+ if (vtx->buffer_index_mode)
+ egcm_load_index_reg(bc, vtx->buffer_index_mode - 1, false);
+ }
+
/* cf can contains only alu or only vtx or only tex */
if (bc->cf_last == NULL ||
last_inst_was_not_vtx_fetch(bc) ||
switch (bc->chip_class) {
case R600:
case R700:
- case EVERGREEN:
bc->cf_last->op = CF_OP_VTX;
break;
+ case EVERGREEN:
+ if (use_tc)
+ bc->cf_last->op = CF_OP_TEX;
+ else
+ bc->cf_last->op = CF_OP_VTX;
+ break;
case CAYMAN:
bc->cf_last->op = CF_OP_TEX;
break;
return 0;
}
+int r600_bytecode_add_vtx(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx)
+{
+ return r600_bytecode_add_vtx_internal(bc, vtx, false);
+}
+
+int r600_bytecode_add_vtx_tc(struct r600_bytecode *bc, const struct r600_bytecode_vtx *vtx)
+{
+ return r600_bytecode_add_vtx_internal(bc, vtx, true);
+}
+
int r600_bytecode_add_tex(struct r600_bytecode *bc, const struct r600_bytecode_tex *tex)
{
struct r600_bytecode_tex *ntex = r600_bytecode_tex();
int r;
- if (ntex == NULL)
+ if (!ntex)
return -ENOMEM;
memcpy(ntex, tex, sizeof(struct r600_bytecode_tex));
+ /* Load index register if required */
+ if (bc->chip_class >= EVERGREEN) {
+ if (tex->sampler_index_mode || tex->resource_index_mode)
+ egcm_load_index_reg(bc, 1, false);
+ }
+
/* we can't fetch data und use it as texture lookup address in the same TEX clause */
if (bc->cf_last != NULL &&
bc->cf_last->op == CF_OP_TEX) {
return 0;
}
+int r600_bytecode_add_gds(struct r600_bytecode *bc, const struct r600_bytecode_gds *gds)
+{
+ struct r600_bytecode_gds *ngds = r600_bytecode_gds();
+ int r;
+
+ if (ngds == NULL)
+ return -ENOMEM;
+ memcpy(ngds, gds, sizeof(struct r600_bytecode_gds));
+
+ if (bc->chip_class >= EVERGREEN) {
+ if (gds->uav_index_mode)
+ egcm_load_index_reg(bc, gds->uav_index_mode - 1, false);
+ }
+
+ if (bc->cf_last == NULL ||
+ bc->cf_last->op != CF_OP_GDS ||
+ bc->force_add_cf) {
+ r = r600_bytecode_add_cf(bc);
+ if (r) {
+ free(ngds);
+ return r;
+ }
+ bc->cf_last->op = CF_OP_GDS;
+ }
+
+ LIST_ADDTAIL(&ngds->list, &bc->cf_last->gds);
+ bc->cf_last->ndw += 4; /* each GDS uses 4 dwords */
+ if ((bc->cf_last->ndw / 4) >= r600_bytecode_num_tex_and_vtx_instructions(bc))
+ bc->force_add_cf = 1;
+ return 0;
+}
+
int r600_bytecode_add_cfinst(struct r600_bytecode *bc, unsigned op)
{
int r;
+
+ /* Emit WAIT_ACK before control flow to ensure pending writes are always acked. */
+ if (op != CF_OP_MEM_SCRATCH && bc->need_wait_ack) {
+ bc->need_wait_ack = false;
+ r = r600_bytecode_add_cfinst(bc, CF_OP_WAIT_ACK);
+ }
+
r = r600_bytecode_add_cf(bc);
if (r)
return r;
/* common to all 3 families */
static int r600_bytecode_vtx_build(struct r600_bytecode *bc, struct r600_bytecode_vtx *vtx, unsigned id)
{
- bc->bytecode[id] = S_SQ_VTX_WORD0_BUFFER_ID(vtx->buffer_id) |
+ if (r600_isa_fetch(vtx->op)->flags & FF_MEM)
+ return r700_bytecode_fetch_mem_build(bc, vtx, id);
+ bc->bytecode[id] = S_SQ_VTX_WORD0_VTX_INST(r600_isa_fetch_opcode(bc->isa->hw_class, vtx->op)) |
+ S_SQ_VTX_WORD0_BUFFER_ID(vtx->buffer_id) |
S_SQ_VTX_WORD0_FETCH_TYPE(vtx->fetch_type) |
S_SQ_VTX_WORD0_SRC_GPR(vtx->src_gpr) |
S_SQ_VTX_WORD0_SRC_SEL_X(vtx->src_sel_x);
S_SQ_VTX_WORD1_GPR_DST_GPR(vtx->dst_gpr);
bc->bytecode[id] = S_SQ_VTX_WORD2_OFFSET(vtx->offset)|
S_SQ_VTX_WORD2_ENDIAN_SWAP(vtx->endian);
+ if (bc->chip_class >= EVERGREEN)
+ bc->bytecode[id] |= ((vtx->buffer_index_mode & 0x3) << 21); // S_SQ_VTX_WORD2_BIM(vtx->buffer_index_mode);
if (bc->chip_class < CAYMAN)
bc->bytecode[id] |= S_SQ_VTX_WORD2_MEGA_FETCH(1);
id++;
/* common to all 3 families */
static int r600_bytecode_tex_build(struct r600_bytecode *bc, struct r600_bytecode_tex *tex, unsigned id)
{
- bc->bytecode[id++] = S_SQ_TEX_WORD0_TEX_INST(
+ bc->bytecode[id] = S_SQ_TEX_WORD0_TEX_INST(
r600_isa_fetch_opcode(bc->isa->hw_class, tex->op)) |
EG_S_SQ_TEX_WORD0_INST_MOD(tex->inst_mod) |
S_SQ_TEX_WORD0_RESOURCE_ID(tex->resource_id) |
S_SQ_TEX_WORD0_SRC_GPR(tex->src_gpr) |
S_SQ_TEX_WORD0_SRC_REL(tex->src_rel);
+ if (bc->chip_class >= EVERGREEN)
+ bc->bytecode[id] |= ((tex->sampler_index_mode & 0x3) << 27) | // S_SQ_TEX_WORD0_SIM(tex->sampler_index_mode);
+ ((tex->resource_index_mode & 0x3) << 25); // S_SQ_TEX_WORD0_RIM(tex->resource_index_mode)
+ id++;
bc->bytecode[id++] = S_SQ_TEX_WORD1_DST_GPR(tex->dst_gpr) |
S_SQ_TEX_WORD1_DST_REL(tex->dst_rel) |
S_SQ_TEX_WORD1_DST_SEL_X(tex->dst_sel_x) |
S_SQ_ALU_WORD0_LAST(alu->last);
if (alu->is_op3) {
+ assert(!alu->src[0].abs && !alu->src[1].abs && !alu->src[2].abs);
bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
S_SQ_ALU_WORD1_DST_REL(alu->dst.rel) |
*bytecode++ = S_SQ_CF_WORD0_ADDR(cf->addr >> 1);
*bytecode++ = S_SQ_CF_WORD1_CF_INST(r600_isa_cf_opcode(ISA_CC_R600, cf->op)) |
S_SQ_CF_WORD1_BARRIER(1) |
- S_SQ_CF_WORD1_COUNT((cf->ndw / 4) - 1);
+ S_SQ_CF_WORD1_COUNT((cf->ndw / 4) - 1)|
+ S_SQ_CF_WORD1_END_OF_PROGRAM(cf->end_of_program);
}
/* common for r600/r700 - eg in eg_asm.c */
bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) |
- S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type);
+ S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type) |
+ S_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(cf->output.index_gpr);
bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) |
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_X(cf->output.swizzle_x) |
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Y(cf->output.swizzle_y) |
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_Z(cf->output.swizzle_z) |
S_SQ_CF_ALLOC_EXPORT_WORD1_SWIZ_SEL_W(cf->output.swizzle_w) |
- S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->output.barrier) |
+ S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->barrier) |
S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode) |
- S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->output.end_of_program);
- } else if (cfop->flags & CF_STRM) {
+ S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program);
+ } else if (cfop->flags & CF_MEM) {
bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD0_RW_GPR(cf->output.gpr) |
S_SQ_CF_ALLOC_EXPORT_WORD0_ELEM_SIZE(cf->output.elem_size) |
S_SQ_CF_ALLOC_EXPORT_WORD0_ARRAY_BASE(cf->output.array_base) |
- S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type);
+ S_SQ_CF_ALLOC_EXPORT_WORD0_TYPE(cf->output.type) |
+ S_SQ_CF_ALLOC_EXPORT_WORD0_INDEX_GPR(cf->output.index_gpr);
bc->bytecode[id++] = S_SQ_CF_ALLOC_EXPORT_WORD1_BURST_COUNT(cf->output.burst_count - 1) |
- S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->output.barrier) |
+ S_SQ_CF_ALLOC_EXPORT_WORD1_BARRIER(cf->barrier) |
S_SQ_CF_ALLOC_EXPORT_WORD1_CF_INST(opcode) |
- S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->output.end_of_program) |
+ S_SQ_CF_ALLOC_EXPORT_WORD1_END_OF_PROGRAM(cf->end_of_program) |
S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(cf->output.array_size) |
S_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(cf->output.comp_mask);
} else {
bc->bytecode[id++] = S_SQ_CF_WORD1_CF_INST(opcode) |
S_SQ_CF_WORD1_BARRIER(1) |
S_SQ_CF_WORD1_COND(cf->cond) |
- S_SQ_CF_WORD1_POP_COUNT(cf->pop_count);
+ S_SQ_CF_WORD1_POP_COUNT(cf->pop_count) |
+ S_SQ_CF_WORD1_END_OF_PROGRAM(cf->end_of_program);
}
return 0;
}
struct r600_bytecode_alu *alu;
struct r600_bytecode_vtx *vtx;
struct r600_bytecode_tex *tex;
+ struct r600_bytecode_gds *gds;
uint32_t literal[4];
unsigned nliteral;
unsigned addr;
int i, r;
- if (!bc->nstack) // If not 0, Stack_size already provided by llvm
- bc->nstack = bc->stack.max_entries;
-
- if (bc->type == TGSI_PROCESSOR_VERTEX && !bc->nstack) {
- bc->nstack = 1;
+ if (!bc->nstack) { // If not 0, Stack_size already provided by llvm
+ if (bc->stack.max_entries)
+ bc->nstack = bc->stack.max_entries;
+ else if (bc->type == PIPE_SHADER_VERTEX ||
+ bc->type == PIPE_SHADER_TESS_EVAL ||
+ bc->type == PIPE_SHADER_TESS_CTRL)
+ bc->nstack = 1;
}
/* first path compute addr of each CF block */
bc->ndw = cf->addr + cf->ndw;
}
free(bc->bytecode);
- bc->bytecode = calloc(1, bc->ndw * 4);
+ bc->bytecode = calloc(4, bc->ndw);
if (bc->bytecode == NULL)
return -ENOMEM;
LIST_FOR_EACH_ENTRY(cf, &bc->cf, list) {
nliteral = 0;
memset(literal, 0, sizeof(literal));
LIST_FOR_EACH_ENTRY(alu, &cf->alu, list) {
- r = r600_bytecode_alu_nliterals(bc, alu, literal, &nliteral);
+ r = r600_bytecode_alu_nliterals(alu, literal, &nliteral);
if (r)
return r;
- r600_bytecode_alu_adjust_literals(bc, alu, literal, nliteral);
- r600_bytecode_assign_kcache_banks(bc, alu, cf->kcache);
+ r600_bytecode_alu_adjust_literals(alu, literal, nliteral);
+ r600_bytecode_assign_kcache_banks(alu, cf->kcache);
switch(bc->chip_class) {
case R600:
r = r600_bytecode_alu_build(bc, alu, addr);
break;
case R700:
- case EVERGREEN: /* eg alu is same encoding as r700 */
- case CAYMAN:
r = r700_bytecode_alu_build(bc, alu, addr);
break;
+ case EVERGREEN:
+ case CAYMAN:
+ r = eg_bytecode_alu_build(bc, alu, addr);
+ break;
default:
R600_ERR("unknown chip class %d.\n", bc->chip_class);
return -EINVAL;
return r;
addr += 4;
}
+ } else if (cf->op == CF_OP_GDS) {
+ assert(bc->chip_class >= EVERGREEN);
+ LIST_FOR_EACH_ENTRY(gds, &cf->gds, list) {
+ r = eg_bytecode_gds_build(bc, gds, addr);
+ if (r)
+ return r;
+ addr += 4;
+ }
} else if (cf->op == CF_OP_TEX) {
LIST_FOR_EACH_ENTRY(vtx, &cf->vtx, list) {
assert(bc->chip_class >= EVERGREEN);
struct r600_bytecode_alu *alu = NULL, *next_alu;
struct r600_bytecode_tex *tex = NULL, *next_tex;
struct r600_bytecode_tex *vtx = NULL, *next_vtx;
+ struct r600_bytecode_gds *gds = NULL, *next_gds;
LIST_FOR_EACH_ENTRY_SAFE(alu, next_alu, &cf->alu, list) {
free(alu);
}
- LIST_INITHEAD(&cf->alu);
+ list_inithead(&cf->alu);
LIST_FOR_EACH_ENTRY_SAFE(tex, next_tex, &cf->tex, list) {
free(tex);
}
- LIST_INITHEAD(&cf->tex);
+ list_inithead(&cf->tex);
LIST_FOR_EACH_ENTRY_SAFE(vtx, next_vtx, &cf->vtx, list) {
free(vtx);
}
- LIST_INITHEAD(&cf->vtx);
+ list_inithead(&cf->vtx);
+
+ LIST_FOR_EACH_ENTRY_SAFE(gds, next_gds, &cf->gds, list) {
+ free(gds);
+ }
+
+ list_inithead(&cf->gds);
free(cf);
}
- LIST_INITHEAD(&cf->list);
+ list_inithead(&cf->list);
}
static int print_swizzle(unsigned swz)
reg_char = 'T';
}
- if (alu->dst.write || alu->is_op3) {
+ if (alu_writes(alu)) {
o += fprintf(stderr, "%c", reg_char);
o += print_sel(alu->dst.sel, alu->dst.rel, alu->index_mode, 0);
} else {
need_sel = 0;
need_chan = 0;
switch (sel) {
+ case EG_V_SQ_ALU_SRC_LDS_DIRECT_A:
+ o += fprintf(stderr, "LDS_A[0x%08X]", src->value);
+ break;
+ case EG_V_SQ_ALU_SRC_LDS_DIRECT_B:
+ o += fprintf(stderr, "LDS_B[0x%08X]", src->value);
+ break;
+ case EG_V_SQ_ALU_SRC_LDS_OQ_A:
+ o += fprintf(stderr, "LDS_OQ_A");
+ need_chan = 1;
+ break;
+ case EG_V_SQ_ALU_SRC_LDS_OQ_B:
+ o += fprintf(stderr, "LDS_OQ_B");
+ need_chan = 1;
+ break;
+ case EG_V_SQ_ALU_SRC_LDS_OQ_A_POP:
+ o += fprintf(stderr, "LDS_OQ_A_POP");
+ need_chan = 1;
+ break;
+ case EG_V_SQ_ALU_SRC_LDS_OQ_B_POP:
+ o += fprintf(stderr, "LDS_OQ_B_POP");
+ need_chan = 1;
+ break;
+ case EG_V_SQ_ALU_SRC_TIME_LO:
+ o += fprintf(stderr, "TIME_LO");
+ break;
+ case EG_V_SQ_ALU_SRC_TIME_HI:
+ o += fprintf(stderr, "TIME_HI");
+ break;
+ case EG_V_SQ_ALU_SRC_SE_ID:
+ o += fprintf(stderr, "SE_ID");
+ break;
+ case EG_V_SQ_ALU_SRC_SIMD_ID:
+ o += fprintf(stderr, "SIMD_ID");
+ break;
+ case EG_V_SQ_ALU_SRC_HW_WAVE_ID:
+ o += fprintf(stderr, "HW_WAVE_ID");
+ break;
case V_SQ_ALU_SRC_PS:
o += fprintf(stderr, "PS");
break;
need_chan = 1;
break;
case V_SQ_ALU_SRC_LITERAL:
- o += fprintf(stderr, "[0x%08X %f]", src->value, *(float*)&src->value);
+ o += fprintf(stderr, "[0x%08X %f]", src->value, u_bitcast_u2f(src->value));
break;
case V_SQ_ALU_SRC_0_5:
o += fprintf(stderr, "0.5");
void r600_bytecode_disasm(struct r600_bytecode *bc)
{
+ const char *index_mode[] = {"CF_INDEX_NONE", "CF_INDEX_0", "CF_INDEX_1"};
static int index = 0;
struct r600_bytecode_cf *cf = NULL;
struct r600_bytecode_alu *alu = NULL;
struct r600_bytecode_vtx *vtx = NULL;
struct r600_bytecode_tex *tex = NULL;
+ struct r600_bytecode_gds *gds = NULL;
unsigned i, id, ngr = 0, last;
uint32_t literal[4];
if (cf->kcache[i].mode) {
int c_start = (cf->kcache[i].addr << 4);
int c_end = c_start + (cf->kcache[i].mode << 4);
- fprintf(stderr, "KC%d[CB%d:%d-%d] ",
- i, cf->kcache[i].bank, c_start, c_end);
+ fprintf(stderr, "KC%d[CB%d:%d-%d%s%s] ",
+ i, cf->kcache[i].bank, c_start, c_end,
+ cf->kcache[i].index_mode ? " " : "",
+ cf->kcache[i].index_mode ? index_mode[cf->kcache[i].index_mode] : "");
}
}
fprintf(stderr, "\n");
fprintf(stderr, "%04d %08X %08X %s ", id, bc->bytecode[id],
bc->bytecode[id + 1], cfop->name);
fprintf(stderr, "%d @%d ", cf->ndw / 4, cf->addr);
+ if (cf->vpm)
+ fprintf(stderr, "VPM ");
+ if (cf->end_of_program)
+ fprintf(stderr, "EOP ");
fprintf(stderr, "\n");
+
} else if (cfop->flags & CF_EXP) {
int o = 0;
const char *exp_type[] = {"PIXEL", "POS ", "PARAM"};
print_indent(o, 67);
fprintf(stderr, " ES:%X ", cf->output.elem_size);
- if (!cf->output.barrier)
+ if (cf->mark)
+ fprintf(stderr, "MARK ");
+ if (!cf->barrier)
fprintf(stderr, "NO_BARRIER ");
- if (cf->output.end_of_program)
+ if (cf->end_of_program)
fprintf(stderr, "EOP ");
fprintf(stderr, "\n");
- } else if (r600_isa_cf(cf->op)->flags & CF_STRM) {
+ } else if (r600_isa_cf(cf->op)->flags & CF_MEM) {
int o = 0;
const char *exp_type[] = {"WRITE", "WRITE_IND", "WRITE_ACK",
"WRITE_IND_ACK"};
bc->bytecode[id], bc->bytecode[id + 1], cfop->name);
o += print_indent(o, 43);
o += fprintf(stderr, "%s ", exp_type[cf->output.type]);
+
+ if (r600_isa_cf(cf->op)->flags & CF_RAT) {
+ o += fprintf(stderr, "RAT%d", cf->rat.id);
+ if (cf->rat.index_mode) {
+ o += fprintf(stderr, "[IDX%d]", cf->rat.index_mode - 1);
+ }
+ o += fprintf(stderr, " INST: %d ", cf->rat.inst);
+ }
+
if (cf->output.burst_count > 1) {
o += fprintf(stderr, "%d-%d ", cf->output.array_base,
cf->output.array_base + cf->output.burst_count - 1);
o += print_swizzle(7);
}
+ if (cf->output.type == V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_WRITE_IND ||
+ cf->output.type == V_SQ_CF_ALLOC_EXPORT_WORD0_SQ_EXPORT_READ_IND)
+ o += fprintf(stderr, " R%d", cf->output.index_gpr);
+
o += print_indent(o, 67);
fprintf(stderr, " ES:%i ", cf->output.elem_size);
if (cf->output.array_size != 0xFFF)
fprintf(stderr, "AS:%i ", cf->output.array_size);
- if (!cf->output.barrier)
+ if (cf->mark)
+ fprintf(stderr, "MARK ");
+ if (!cf->barrier)
fprintf(stderr, "NO_BARRIER ");
- if (cf->output.end_of_program)
+ if (cf->end_of_program)
fprintf(stderr, "EOP ");
+
+ if (cf->output.mark)
+ fprintf(stderr, "MARK ");
+
fprintf(stderr, "\n");
} else {
fprintf(stderr, "%04d %08X %08X %s ", id, bc->bytecode[id],
fprintf(stderr, "CND:%X ", cf->cond);
if (cf->pop_count)
fprintf(stderr, "POP:%X ", cf->pop_count);
+ if (cf->count && (cfop->flags & CF_EMIT))
+ fprintf(stderr, "STREAM%d ", cf->count);
+ if (cf->vpm)
+ fprintf(stderr, "VPM ");
+ if (cf->end_of_program)
+ fprintf(stderr, "EOP ");
fprintf(stderr, "\n");
}
}
const struct alu_op_info *aop = r600_isa_alu(alu->op);
int o = 0;
- r600_bytecode_alu_nliterals(bc, alu, literal, &nliteral);
+ r600_bytecode_alu_nliterals(alu, literal, &nliteral);
o += fprintf(stderr, " %04d %08X %08X ", id, bc->bytecode[id], bc->bytecode[id+1]);
if (last)
o += fprintf(stderr, "%4d ", ++ngr);
o += fprintf(stderr, ", RID:%d", tex->resource_id);
o += fprintf(stderr, ", SID:%d ", tex->sampler_id);
+ if (tex->sampler_index_mode)
+ fprintf(stderr, "SQ_%s ", index_mode[tex->sampler_index_mode]);
+
if (tex->lod_bias)
fprintf(stderr, "LB:%d ", tex->lod_bias);
o += fprintf(stderr, ", R%d.", vtx->src_gpr);
o += print_swizzle(vtx->src_sel_x);
+ if (r600_isa_fetch(vtx->op)->flags & FF_MEM)
+ o += print_swizzle(vtx->src_sel_y);
if (vtx->offset)
fprintf(stderr, " +%db", vtx->offset);
if (bc->chip_class < CAYMAN && vtx->mega_fetch_count)
fprintf(stderr, "MFC:%d ", vtx->mega_fetch_count);
+ if (bc->chip_class >= EVERGREEN && vtx->buffer_index_mode)
+ fprintf(stderr, "SQ_%s ", index_mode[vtx->buffer_index_mode]);
+
+ if (r600_isa_fetch(vtx->op)->flags & FF_MEM) {
+ if (vtx->uncached)
+ fprintf(stderr, "UNCACHED ");
+ if (vtx->indexed)
+ fprintf(stderr, "INDEXED:%d ", vtx->indexed);
+
+ fprintf(stderr, "ELEM_SIZE:%d ", vtx->elem_size);
+ if (vtx->burst_count)
+ fprintf(stderr, "BURST_COUNT:%d ", vtx->burst_count);
+ fprintf(stderr, "ARRAY_BASE:%d ", vtx->array_base);
+ fprintf(stderr, "ARRAY_SIZE:%d ", vtx->array_size);
+ }
+
fprintf(stderr, "UCF:%d ", vtx->use_const_fields);
fprintf(stderr, "FMT(DTA:%d ", vtx->data_format);
fprintf(stderr, "NUM:%d ", vtx->num_format_all);
id += 4;
}
+
+ LIST_FOR_EACH_ENTRY(gds, &cf->gds, list) {
+ int o = 0;
+ o += fprintf(stderr, " %04d %08X %08X %08X ", id, bc->bytecode[id],
+ bc->bytecode[id + 1], bc->bytecode[id + 2]);
+
+ o += fprintf(stderr, "%s ", r600_isa_fetch(gds->op)->name);
+
+ if (gds->op != FETCH_OP_TF_WRITE) {
+ o += fprintf(stderr, "R%d.", gds->dst_gpr);
+ o += print_swizzle(gds->dst_sel_x);
+ o += print_swizzle(gds->dst_sel_y);
+ o += print_swizzle(gds->dst_sel_z);
+ o += print_swizzle(gds->dst_sel_w);
+ }
+
+ o += fprintf(stderr, ", R%d.", gds->src_gpr);
+ o += print_swizzle(gds->src_sel_x);
+ o += print_swizzle(gds->src_sel_y);
+ o += print_swizzle(gds->src_sel_z);
+
+ if (gds->op != FETCH_OP_TF_WRITE) {
+ o += fprintf(stderr, ", R%d.", gds->src_gpr2);
+ }
+ if (gds->alloc_consume) {
+ o += fprintf(stderr, " UAV: %d", gds->uav_id);
+ if (gds->uav_index_mode)
+ o += fprintf(stderr, "[%s]", index_mode[gds->uav_index_mode]);
+ }
+ fprintf(stderr, "\n");
+ id += 4;
+ }
}
fprintf(stderr, "--------------------------------------\n");
*format_comp = 0;
*endian = ENDIAN_NONE;
+ if (pformat == PIPE_FORMAT_R11G11B10_FLOAT) {
+ *format = FMT_10_11_11_FLOAT;
+ *endian = r600_endian_swap(32);
+ return;
+ }
+
+ if (pformat == PIPE_FORMAT_B5G6R5_UNORM) {
+ *format = FMT_5_6_5;
+ *endian = r600_endian_swap(16);
+ return;
+ }
+
+ if (pformat == PIPE_FORMAT_B5G5R5A1_UNORM) {
+ *format = FMT_1_5_5_5;
+ *endian = r600_endian_swap(16);
+ return;
+ }
+
+ if (pformat == PIPE_FORMAT_A1B5G5R5_UNORM) {
+ *format = FMT_5_5_5_1;
+ return;
+ }
+
desc = util_format_description(pformat);
if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) {
goto out_unknown;
/* Signed ints */
case UTIL_FORMAT_TYPE_SIGNED:
switch (desc->channel[i].size) {
+ case 4:
+ switch (desc->nr_channels) {
+ case 2:
+ *format = FMT_4_4;
+ break;
+ case 4:
+ *format = FMT_4_4_4_4;
+ break;
+ }
+ break;
case 8:
switch (desc->nr_channels) {
case 1:
struct r600_bytecode bc;
struct r600_bytecode_vtx vtx;
const struct util_format_description *desc;
- unsigned fetch_resource_start = rctx->chip_class >= EVERGREEN ? 0 : 160;
+ unsigned fetch_resource_start = rctx->b.chip_class >= EVERGREEN ? 0 : 160;
unsigned format, num_format, format_comp, endian;
uint32_t *bytecode;
int i, j, r, fs_size;
struct r600_fetch_shader *shader;
+ unsigned no_sb = rctx->screen->b.debug_flags & DBG_NO_SB;
+ unsigned sb_disasm = !no_sb || (rctx->screen->b.debug_flags & DBG_SB_DISASM);
assert(count < 32);
memset(&bc, 0, sizeof(bc));
- r600_bytecode_init(&bc, rctx->chip_class, rctx->family,
- rctx->screen->msaa_texture_support);
+ r600_bytecode_init(&bc, rctx->b.chip_class, rctx->b.family,
+ rctx->screen->has_compressed_msaa_texturing);
bc.isa = rctx->isa;
for (i = 0; i < count; i++) {
if (elements[i].instance_divisor > 1) {
- if (rctx->chip_class == CAYMAN) {
+ if (rctx->b.chip_class == CAYMAN) {
for (j = 0; j < 4; j++) {
struct r600_bytecode_alu alu;
memset(&alu, 0, sizeof(alu));
&format, &num_format, &format_comp, &endian);
desc = util_format_description(elements[i].src_format);
- if (desc == NULL) {
+ if (!desc) {
r600_bytecode_clear(&bc);
R600_ERR("unknown format %d\n", elements[i].src_format);
return NULL;
memset(&vtx, 0, sizeof(vtx));
vtx.buffer_id = elements[i].vertex_buffer_index + fetch_resource_start;
- vtx.fetch_type = elements[i].instance_divisor ? 1 : 0;
+ vtx.fetch_type = elements[i].instance_divisor ? SQ_VTX_FETCH_INSTANCE_DATA : SQ_VTX_FETCH_VERTEX_DATA;
vtx.src_gpr = elements[i].instance_divisor > 1 ? i + 1 : 0;
vtx.src_sel_x = elements[i].instance_divisor ? 3 : 0;
vtx.mega_fetch_count = 0x1F;
vtx.data_format = format;
vtx.num_format_all = num_format;
vtx.format_comp_all = format_comp;
- vtx.srf_mode_all = 1;
vtx.offset = elements[i].src_offset;
vtx.endian = endian;
return NULL;
}
- if (rctx->screen->debug_flags & DBG_FS) {
+ if (rctx->screen->b.debug_flags & DBG_FS) {
fprintf(stderr, "--------------------------------------------------------------\n");
fprintf(stderr, "Vertex elements state:\n");
for (i = 0; i < count; i++) {
fprintf(stderr, "\n");
}
- r600_bytecode_disasm(&bc);
- fprintf(stderr, "______________________________________________________________\n");
+ if (!sb_disasm) {
+ r600_bytecode_disasm(&bc);
+
+ fprintf(stderr, "______________________________________________________________\n");
+ } else {
+ r600_sb_bytecode_process(rctx, &bc, NULL, 1 /*dump*/, 0 /*optimize*/);
+ }
}
fs_size = bc.ndw*4;
return NULL;
}
- u_suballocator_alloc(rctx->allocator_fetch_shader, fs_size, &shader->offset,
+ u_suballocator_alloc(rctx->allocator_fetch_shader, fs_size, 256,
+ &shader->offset,
(struct pipe_resource**)&shader->buffer);
if (!shader->buffer) {
r600_bytecode_clear(&bc);
return NULL;
}
- bytecode = r600_buffer_mmap_sync_with_rings(rctx, shader->buffer, PIPE_TRANSFER_WRITE | PIPE_TRANSFER_UNSYNCHRONIZED);
+ bytecode = r600_buffer_map_sync_with_rings
+ (&rctx->b, shader->buffer,
+ PIPE_TRANSFER_WRITE | PIPE_TRANSFER_UNSYNCHRONIZED | RADEON_TRANSFER_TEMPORARY);
bytecode += shader->offset / 4;
if (R600_BIG_ENDIAN) {
for (i = 0; i < fs_size / 4; ++i) {
- bytecode[i] = bswap_32(bc.bytecode[i]);
+ bytecode[i] = util_cpu_to_le32(bc.bytecode[i]);
}
} else {
memcpy(bytecode, bc.bytecode, fs_size);
}
- rctx->ws->buffer_unmap(shader->buffer->cs_buf);
+ rctx->b.ws->buffer_unmap(shader->buffer->buf);
r600_bytecode_clear(&bc);
return shader;
}
}
+#if 0
void r600_bytecode_export_read(struct r600_bytecode *bc,
struct r600_bytecode_output *output, uint32_t word0, uint32_t word1)
{
output->array_size = G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_ARRAY_SIZE(word1);
output->comp_mask = G_SQ_CF_ALLOC_EXPORT_WORD1_BUF_COMP_MASK(word1);
}
+#endif
projects / mesa.git / blobdiff