#include "util/list.h"
#include "util/u_draw_quad.h"
#include "util/u_memory.h"
-#include "util/u_format_s3tc.h"
+#include "util/format/u_format_s3tc.h"
#include "util/u_upload_mgr.h"
#include "util/os_time.h"
#include "vl/vl_decoder.h"
#include <inttypes.h>
#include <sys/utsname.h>
-#ifndef HAVE_LLVM
-#define HAVE_LLVM 0
-#endif
-
-#if HAVE_LLVM
+#ifdef LLVM_AVAILABLE
#include <llvm-c/TargetMachine.h>
#endif
} gfx_unflushed;
};
-/*
- * shader binary helpers.
- */
-void radeon_shader_binary_init(struct ac_shader_binary *b)
-{
- memset(b, 0, sizeof(*b));
-}
-
-void radeon_shader_binary_clean(struct ac_shader_binary *b)
-{
- if (!b)
- return;
- FREE(b->code);
- FREE(b->config);
- FREE(b->rodata);
- FREE(b->global_symbol_offsets);
- FREE(b->relocs);
- FREE(b->disasm_string);
- FREE(b->llvm_ir_string);
-}
-
/*
* pipe_context
*/
* engine busy while uploads are being submitted.
*/
num_dw++; /* for emit_wait_idle below */
- if (!ctx->ws->cs_check_space(ctx->dma.cs, num_dw) ||
+ if (!ctx->ws->cs_check_space(ctx->dma.cs, num_dw, false) ||
ctx->dma.cs->used_vram + ctx->dma.cs->used_gart > 64 * 1024 * 1024 ||
!radeon_cs_memory_below_limit(ctx->screen, ctx->dma.cs, vram, gtt)) {
ctx->dma.flush(ctx, PIPE_FLUSH_ASYNC, NULL);
void r600_preflush_suspend_features(struct r600_common_context *ctx)
{
/* suspend queries */
- if (!LIST_IS_EMPTY(&ctx->active_queries))
+ if (!list_is_empty(&ctx->active_queries))
r600_suspend_queries(ctx);
ctx->streamout.suspended = false;
}
/* resume queries */
- if (!LIST_IS_EMPTY(&ctx->active_queries))
+ if (!list_is_empty(&ctx->active_queries))
r600_resume_queries(ctx);
}
-static void r600_add_fence_dependency(struct r600_common_context *rctx,
- struct pipe_fence_handle *fence)
-{
- struct radeon_winsys *ws = rctx->ws;
-
- if (rctx->dma.cs)
- ws->cs_add_fence_dependency(rctx->dma.cs, fence, 0);
- ws->cs_add_fence_dependency(rctx->gfx.cs, fence, 0);
-}
-
static void r600_fence_server_sync(struct pipe_context *ctx,
struct pipe_fence_handle *fence)
{
- struct r600_common_context *rctx = (struct r600_common_context *)ctx;
- struct r600_multi_fence *rfence = (struct r600_multi_fence *)fence;
-
- /* Only amdgpu needs to handle fence dependencies (for fence imports).
- * radeon synchronizes all rings by default and will not implement
+ /* radeon synchronizes all rings by default and will not implement
* fence imports.
*/
- if (rctx->screen->info.drm_major == 2)
- return;
-
- /* Only imported fences need to be handled by fence_server_sync,
- * because the winsys handles synchronizations automatically for BOs
- * within the process.
- *
- * Simply skip unflushed fences here, and the winsys will drop no-op
- * dependencies (i.e. dependencies within the same ring).
- */
- if (rfence->gfx_unflushed.ctx)
- return;
-
- /* All unflushed commands will not start execution before
- * this fence dependency is signalled.
- *
- * Should we flush the context to allow more GPU parallelism?
- */
- if (rfence->sdma)
- r600_add_fence_dependency(rctx, rfence->sdma);
- if (rfence->gfx)
- r600_add_fence_dependency(rctx, rfence->gfx);
}
static void r600_flush_from_st(struct pipe_context *ctx,
static enum pipe_reset_status r600_get_reset_status(struct pipe_context *ctx)
{
struct r600_common_context *rctx = (struct r600_common_context *)ctx;
- unsigned latest = rctx->ws->query_value(rctx->ws,
- RADEON_GPU_RESET_COUNTER);
- if (rctx->gpu_reset_counter == latest)
- return PIPE_NO_RESET;
-
- rctx->gpu_reset_counter = latest;
- return PIPE_UNKNOWN_CONTEXT_RESET;
+ return rctx->ws->ctx_query_reset_status(rctx->ctx);
}
static void r600_set_debug_callback(struct pipe_context *ctx,
else
rctx->b.buffer_subdata = r600_buffer_subdata;
- if (rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 43) {
- rctx->b.get_device_reset_status = r600_get_reset_status;
- rctx->gpu_reset_counter =
- rctx->ws->query_value(rctx->ws,
- RADEON_GPU_RESET_COUNTER);
- }
-
+ rctx->b.get_device_reset_status = r600_get_reset_status;
rctx->b.set_device_reset_callback = r600_set_device_reset_callback;
r600_init_context_texture_functions(rctx);
*rdst = rsrc;
}
-static boolean r600_fence_finish(struct pipe_screen *screen,
- struct pipe_context *ctx,
- struct pipe_fence_handle *fence,
- uint64_t timeout)
+static bool r600_fence_finish(struct pipe_screen *screen,
+ struct pipe_context *ctx,
+ struct pipe_fence_handle *fence,
+ uint64_t timeout)
{
struct radeon_winsys *rws = ((struct r600_common_screen*)screen)->ws;
struct r600_multi_fence *rfence = (struct r600_multi_fence *)fence;
info->device_memory_evicted =
ws->query_value(ws, RADEON_NUM_BYTES_MOVED) / 1024;
- if (rscreen->info.drm_major == 3 && rscreen->info.drm_minor >= 4)
- info->nr_device_memory_evictions =
- ws->query_value(ws, RADEON_NUM_EVICTIONS);
- else
- /* Just return the number of evicted 64KB pages. */
- info->nr_device_memory_evictions = info->device_memory_evicted / 64;
+ /* Just return the number of evicted 64KB pages. */
+ info->nr_device_memory_evictions = info->device_memory_evicted / 64;
}
struct pipe_resource *r600_resource_create_common(struct pipe_screen *screen,
snprintf(rscreen->renderer_string, sizeof(rscreen->renderer_string),
"%s (%sDRM %i.%i.%i%s"
-#if HAVE_LLVM > 0
+#ifdef LLVM_AVAILABLE
", LLVM " MESA_LLVM_VERSION_STRING
#endif
")",
projects / mesa.git / blobdiff