gallium/util: replace pipe_thread with thrd_t
[mesa.git] / src / gallium / drivers / radeon / r600_pipe_common.h
index 9118b6bcf846306ec286e07a78088e204a876e03..35168844fbf12d88e10327be31d03a6560adc267 100644 (file)
 
 #include <stdio.h>
 
+#include "amd/common/ac_binary.h"
+
 #include "radeon/radeon_winsys.h"
 
+#include "util/disk_cache.h"
 #include "util/u_blitter.h"
 #include "util/list.h"
 #include "util/u_range.h"
@@ -49,6 +52,7 @@
 #define R600_RESOURCE_FLAG_FLUSHED_DEPTH       (PIPE_RESOURCE_FLAG_DRV_PRIV << 1)
 #define R600_RESOURCE_FLAG_FORCE_TILING                (PIPE_RESOURCE_FLAG_DRV_PRIV << 2)
 #define R600_RESOURCE_FLAG_DISABLE_DCC         (PIPE_RESOURCE_FLAG_DRV_PRIV << 3)
+#define R600_RESOURCE_FLAG_UNMAPPABLE          (PIPE_RESOURCE_FLAG_DRV_PRIV << 4)
 
 #define R600_CONTEXT_STREAMOUT_FLUSH           (1u << 0)
 /* Pipeline & streamout query controls. */
@@ -126,45 +130,8 @@ struct r600_perfcounters;
 struct tgsi_shader_info;
 struct r600_qbo_state;
 
-struct radeon_shader_reloc {
-       char name[32];
-       uint64_t offset;
-};
-
-struct radeon_shader_binary {
-       /** Shader code */
-       unsigned char *code;
-       unsigned code_size;
-
-       /** Config/Context register state that accompanies this shader.
-        * This is a stream of dword pairs.  First dword contains the
-        * register address, the second dword contains the value.*/
-       unsigned char *config;
-       unsigned config_size;
-
-       /** The number of bytes of config information for each global symbol.
-        */
-       unsigned config_size_per_symbol;
-
-       /** Constant data accessed by the shader.  This will be uploaded
-        * into a constant buffer. */
-       unsigned char *rodata;
-       unsigned rodata_size;
-
-       /** List of symbol offsets for the shader */
-       uint64_t *global_symbol_offsets;
-       unsigned global_symbol_count;
-
-       struct radeon_shader_reloc *relocs;
-       unsigned reloc_count;
-
-       /** Disassembled shader in a string. */
-       char *disasm_string;
-       char *llvm_ir_string;
-};
-
-void radeon_shader_binary_init(struct radeon_shader_binary *b);
-void radeon_shader_binary_clean(struct radeon_shader_binary *b);
+void radeon_shader_binary_init(struct ac_shader_binary *b);
+void radeon_shader_binary_clean(struct ac_shader_binary *b);
 
 /* Only 32-bit buffer allocations are supported, gallium doesn't support more
  * at the moment.
@@ -315,6 +282,7 @@ struct r600_surface {
        bool alphatest_bypass;
        bool export_16bpc;
        bool color_is_int8;
+       bool color_is_int10;
 
        /* Color registers. */
        unsigned cb_color_info;
@@ -359,6 +327,9 @@ struct r600_mmio_counter {
 
 union r600_mmio_counters {
        struct {
+               /* For global GPU load including SDMA. */
+               struct r600_mmio_counter gpu;
+
                /* GRBM_STATUS */
                struct r600_mmio_counter spi;
                struct r600_mmio_counter gui;
@@ -377,6 +348,15 @@ union r600_mmio_counters {
 
                /* SRBM_STATUS2 */
                struct r600_mmio_counter sdma;
+
+               /* CP_STAT */
+               struct r600_mmio_counter pfp;
+               struct r600_mmio_counter meq;
+               struct r600_mmio_counter me;
+               struct r600_mmio_counter surf_sync;
+               struct r600_mmio_counter dma;
+               struct r600_mmio_counter scratch_ram;
+               struct r600_mmio_counter ce;
        } named;
        unsigned array[0];
 };
@@ -391,6 +371,8 @@ struct r600_common_screen {
        bool                            has_cp_dma;
        bool                            has_streamout;
 
+       struct disk_cache               *disk_shader_cache;
+
        struct slab_parent_pool         pool_transfers;
 
        /* Texture filter settings. */
@@ -399,7 +381,7 @@ struct r600_common_screen {
        /* Auxiliary context. Mainly used to initialize resources.
         * It must be locked prior to using and flushed before unlocking. */
        struct pipe_context             *aux_context;
-       pipe_mutex                      aux_context_lock;
+       mtx_t                           aux_context_lock;
 
        /* This must be in the screen, because UE4 uses one context for
         * compilation and another one for rendering.
@@ -412,8 +394,8 @@ struct r600_common_screen {
        unsigned                        num_shader_cache_hits;
 
        /* GPU load thread. */
-       pipe_mutex                      gpu_load_mutex;
-       pipe_thread                     gpu_load_thread;
+       mtx_t                           gpu_load_mutex;
+       thrd_t                          gpu_load_thread;
        union r600_mmio_counters        mmio_counters;
        volatile unsigned               gpu_load_stop_thread; /* bool */
 
@@ -422,12 +404,14 @@ struct r600_common_screen {
        /* Performance counters. */
        struct r600_perfcounters        *perfcounters;
 
-       /* If pipe_screen wants to re-emit the framebuffer state of all
-        * contexts, it should atomically increment this. Each context will
-        * compare this with its own last known value of the counter before
-        * drawing and re-emit the framebuffer state accordingly.
+       /* If pipe_screen wants to recompute and re-emit the framebuffer,
+        * sampler, and image states of all contexts, it should atomically
+        * increment this.
+        *
+        * Each context will compare this with its own last known value of
+        * the counter before drawing and re-emit the states accordingly.
         */
-       unsigned                        dirty_fb_counter;
+       unsigned                        dirty_tex_counter;
 
        /* Atomically increment this counter when an existing texture's
         * metadata is enabled or disabled in a way that requires changing
@@ -435,12 +419,6 @@ struct r600_common_screen {
         */
        unsigned                        compressed_colortex_counter;
 
-       /* Atomically increment this counter when an existing texture's
-        * backing buffer or tile mode parameters have changed that requires
-        * recomputation of shader descriptors.
-        */
-       unsigned                        dirty_tex_descriptor_counter;
-
        struct {
                /* Context flags to set so that all writes from earlier jobs
                 * in the CP are seen by L2 clients.
@@ -559,11 +537,9 @@ struct r600_common_context {
        unsigned                        num_gfx_cs_flushes;
        unsigned                        initial_gfx_cs_size;
        unsigned                        gpu_reset_counter;
-       unsigned                        last_dirty_fb_counter;
+       unsigned                        last_dirty_tex_counter;
        unsigned                        last_compressed_colortex_counter;
-       unsigned                        last_dirty_tex_descriptor_counter;
 
-       struct u_upload_mgr             *uploader;
        struct u_suballocator           *allocator_zeroed_memory;
        struct slab_child_pool          pool_transfers;
 
@@ -712,7 +688,7 @@ struct pipe_resource *r600_buffer_create(struct pipe_screen *screen,
                                         const struct pipe_resource *templ,
                                         unsigned alignment);
 struct pipe_resource * r600_aligned_buffer_create(struct pipe_screen *screen,
-                                                 unsigned bind,
+                                                 unsigned flags,
                                                  unsigned usage,
                                                  unsigned size,
                                                  unsigned alignment);