radeonsi: implement ARB_shader_group_vote
[mesa.git] / src / gallium / drivers / radeonsi / si_pipe.c
index 277fa28641655fbedfe5fcd8cfad8d4157293843..8aae11d3be457ad914576e2b256e95e979ec8a02 100644 (file)
@@ -421,8 +421,12 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 
        case PIPE_CAP_INT64:
        case PIPE_CAP_INT64_DIVMOD:
+       case PIPE_CAP_TGSI_CLOCK:
                return HAVE_LLVM >= 0x0309;
 
+       case PIPE_CAP_TGSI_VOTE:
+               return HAVE_LLVM >= 0x0400;
+
        case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
                return !SI_BIG_ENDIAN && sscreen->b.info.has_userptr;
 
@@ -452,6 +456,8 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
                return HAVE_LLVM >= 0x0309 ? 4 : 0;
 
        case PIPE_CAP_GLSL_FEATURE_LEVEL:
+               if (sscreen->b.chip_class >= GFX9)
+                       return 140;
                if (si_have_tgsi_compute(sscreen))
                        return 450;
                return HAVE_LLVM >= 0x0309 ? 420 : 410;
@@ -477,7 +483,6 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
        case PIPE_CAP_VERTEXID_NOBASE:
        case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
-       case PIPE_CAP_TGSI_VOTE:
        case PIPE_CAP_MAX_WINDOW_RECTANGLES:
        case PIPE_CAP_NATIVE_FENCE_FD:
        case PIPE_CAP_TGSI_FS_FBFETCH:
@@ -497,7 +502,8 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
                return 30;
 
        case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
-               return PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600;
+               return sscreen->b.chip_class <= VI ?
+                       PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 : 0;
 
        /* Stream output. */
        case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
@@ -575,9 +581,12 @@ static int si_get_shader_param(struct pipe_screen* pscreen,
        {
        case PIPE_SHADER_FRAGMENT:
        case PIPE_SHADER_VERTEX:
+               break;
        case PIPE_SHADER_GEOMETRY:
        case PIPE_SHADER_TESS_CTRL:
        case PIPE_SHADER_TESS_EVAL:
+               if (sscreen->b.chip_class >= GFX9)
+                       return 0;
                break;
        case PIPE_SHADER_COMPUTE:
                switch (param) {
@@ -731,6 +740,7 @@ static bool si_init_gs_info(struct si_screen *sscreen)
        case CHIP_POLARIS10:
        case CHIP_POLARIS11:
        case CHIP_POLARIS12:
+       case CHIP_VEGA10:
                sscreen->gs_table_depth = 32;
                return true;
        default:
@@ -751,7 +761,9 @@ static void si_handle_env_var_force_family(struct si_screen *sscreen)
                        /* Override family and chip_class. */
                        sscreen->b.family = sscreen->b.info.family = i;
 
-                       if (i >= CHIP_TONGA)
+                       if (i >= CHIP_VEGA10)
+                               sscreen->b.chip_class = sscreen->b.info.chip_class = GFX9;
+                       else if (i >= CHIP_TONGA)
                                sscreen->b.chip_class = sscreen->b.info.chip_class = VI;
                        else if (i >= CHIP_BONAIRE)
                                sscreen->b.chip_class = sscreen->b.info.chip_class = CIK;
@@ -836,6 +848,19 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
 
        sscreen->b.has_cp_dma = true;
        sscreen->b.has_streamout = true;
+
+       /* Some chips have RB+ registers, but don't support RB+. Those must
+        * always disable it.
+        */
+       if (sscreen->b.family == CHIP_STONEY ||
+           sscreen->b.chip_class >= GFX9) {
+               sscreen->b.has_rbplus = true;
+
+               sscreen->b.rbplus_allowed =
+                       !(sscreen->b.debug_flags & DBG_NO_RB_PLUS) &&
+                       sscreen->b.family == CHIP_STONEY;
+       }
+
        (void) mtx_init(&sscreen->shader_parts_mutex, mtx_plain);
        sscreen->use_monolithic_shaders =
                (sscreen->b.debug_flags & DBG_MONOLITHIC_SHADERS) != 0;