radeonsi: make cs_preamble_state optional

[mesa.git] / src / gallium / drivers / radeonsi / si_pipe.c

diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 99fa2b40c7a8bbce47b8886f01bb27db60839b4c..e366b6b5458bd1c1aad5af8cac8ded5ab1d781c4 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -94,7 +94,8 @@ static const struct debug_named_value debug_options[] = {
    /* 3D engine options: */
    {"nogfx", DBG(NO_GFX), "Disable graphics. Only multimedia compute paths can be used."},
    {"nongg", DBG(NO_NGG), "Disable NGG and use the legacy pipeline."},
-   {"nggc", DBG(ALWAYS_NGG_CULLING), "Always use NGG culling even when it can hurt."},
+   {"nggc", DBG(ALWAYS_NGG_CULLING_ALL), "Always use NGG culling even when it can hurt."},
+   {"nggctess", DBG(ALWAYS_NGG_CULLING_TESS), "Always use NGG culling for tessellation."},
    {"nonggc", DBG(NO_NGG_CULLING), "Disable NGG culling."},
    {"alwayspd", DBG(ALWAYS_PD), "Always enable the primitive discard compute shader."},
    {"pd", DBG(PD), "Enable the primitive discard compute shader for large draw calls."},
@@ -194,7 +195,8 @@ static void si_destroy_context(struct pipe_context *context)
    si_resource_reference(&sctx->wait_mem_scratch, NULL);
    si_resource_reference(&sctx->small_prim_cull_info_buf, NULL);
 
-   si_pm4_free_state(sctx, sctx->cs_preamble_state, ~0);
+   if (sctx->cs_preamble_state)
+      si_pm4_free_state(sctx, sctx->cs_preamble_state, ~0);
    if (sctx->cs_preamble_gs_rings)
       si_pm4_free_state(sctx, sctx->cs_preamble_gs_rings, ~0);
    for (i = 0; i < ARRAY_SIZE(sctx->vgt_shader_config); i++)
@@ -322,7 +324,7 @@ static enum pipe_reset_status si_get_reset_status(struct pipe_context *ctx)
    enum pipe_reset_status status = sctx->ws->ctx_query_reset_status(sctx->ctx);
 
    if (status != PIPE_NO_RESET) {
-               /* Call the gallium frontend to set a no-op API dispatch. */
+      /* Call the gallium frontend to set a no-op API dispatch. */
       if (sctx->device_reset_callback.reset) {
          sctx->device_reset_callback.reset(sctx->device_reset_callback.data, status);
       }
@@ -599,13 +601,12 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign
    }
 
    if (sctx->chip_class >= GFX9 || si_compute_prim_discard_enabled(sctx)) {
-      sctx->wait_mem_scratch = si_resource(pipe_buffer_create(screen, 0, PIPE_USAGE_DEFAULT, 8));
+      sctx->wait_mem_scratch =
+           si_aligned_buffer_create(screen, SI_RESOURCE_FLAG_UNMAPPABLE,
+                                    PIPE_USAGE_DEFAULT, 8,
+                                    sscreen->info.tcc_cache_line_size);
       if (!sctx->wait_mem_scratch)
          goto fail;
-
-      /* Initialize the memory. */
-      si_cp_write_data(sctx, sctx->wait_mem_scratch, 0, 4, V_370_MEM, V_370_ME,
-                       &sctx->wait_mem_number);
    }
 
    /* GFX7 cannot unbind a constant buffer (S_BUFFER_LOAD doesn't skip loads
@@ -666,8 +667,16 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign
    pipe_buffer_write(&sctx->b, sctx->sample_pos_buffer, 0, sizeof(sctx->sample_positions),
                      &sctx->sample_positions);
 
-   /* this must be last */
+   /* The remainder of this function initializes the gfx CS and must be last. */
+   assert(sctx->gfx_cs->current.cdw == 0);
    si_begin_new_gfx_cs(sctx);
+   assert(sctx->gfx_cs->current.cdw == sctx->initial_gfx_cs_size);
+
+   /* Initialize per-context buffers. */
+   if (sctx->wait_mem_scratch) {
+      si_cp_write_data(sctx, sctx->wait_mem_scratch, 0, 4, V_370_MEM, V_370_ME,
+                       &sctx->wait_mem_number);
+   }
 
    if (sctx->chip_class == GFX7) {
       /* Clear the NULL constant buffer, because loads should return zeros.
@@ -678,6 +687,8 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, unsign
       si_clear_buffer(sctx, sctx->null_const_buf.buffer, 0, sctx->null_const_buf.buffer->width0,
                       &clear_value, 4, SI_COHERENCY_SHADER, true);
    }
+
+   sctx->initial_gfx_cs_size = sctx->gfx_cs->current.cdw;
    return &sctx->b;
 fail:
    fprintf(stderr, "radeonsi: Failed to create a context.\n");
@@ -1071,7 +1082,7 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws,
    unsigned max_offchip_buffers_per_se;
 
    if (sscreen->info.chip_class >= GFX10)
-      max_offchip_buffers_per_se = 256;
+      max_offchip_buffers_per_se = 128;
    /* Only certain chips can use the maximum value. */
    else if (sscreen->info.family == CHIP_VEGA12 || sscreen->info.family == CHIP_VEGA20)
       max_offchip_buffers_per_se = double_offchip_buffers ? 128 : 64;
@@ -1129,8 +1140,10 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws,
    sscreen->use_ngg = sscreen->info.chip_class >= GFX10 && sscreen->info.family != CHIP_NAVI14 &&
                       !(sscreen->debug_flags & DBG(NO_NGG));
    sscreen->use_ngg_culling = sscreen->use_ngg && !(sscreen->debug_flags & DBG(NO_NGG_CULLING));
-   sscreen->always_use_ngg_culling =
-      sscreen->use_ngg_culling && sscreen->debug_flags & DBG(ALWAYS_NGG_CULLING);
+   sscreen->always_use_ngg_culling_all =
+      sscreen->use_ngg_culling && sscreen->debug_flags & DBG(ALWAYS_NGG_CULLING_ALL);
+   sscreen->always_use_ngg_culling_tess =
+      sscreen->use_ngg_culling && sscreen->debug_flags & DBG(ALWAYS_NGG_CULLING_TESS);
    sscreen->use_ngg_streamout = false;
 
    /* Only enable primitive binning on APUs by default. */
@@ -1206,11 +1219,15 @@ static struct pipe_screen *radeonsi_screen_create_impl(struct radeon_winsys *ws,
    sscreen->compute_wave_size = 64;
 
    if (sscreen->info.chip_class >= GFX10) {
-      /* Pixels shaders: Wave64 is recommended.
-       * Compute shaders: There are piglit failures with Wave32.
+      /* Pixel shaders: Wave64 is always fastest.
+       * Vertex shaders: Wave64 is probably better, because:
+       * - greater chance of L0 cache hits, because more threads are assigned
+       *   to the same CU
+       * - scalar instructions are only executed once for 64 threads instead of twice
+       * - VGPR allocation granularity is half of Wave32, so 1 Wave64 can
+       *   sometimes use fewer VGPRs than 2 Wave32
+       * - TessMark X64 with NGG culling is faster with Wave64
        */
-      sscreen->ge_wave_size = 32;
-
       if (sscreen->debug_flags & DBG(W32_GE))
          sscreen->ge_wave_size = 32;
       if (sscreen->debug_flags & DBG(W32_PS))