util: rename PIPE_ARCH_*_ENDIAN to UTIL_ARCH_*_ENDIAN
[mesa.git] / src / gallium / drivers / radeonsi / si_pipe.h
index 2606052f378981af9ff28ed2c04fc5b55eae6aaa..f313e565d5ff30c721733fd204bb52171544321a 100644 (file)
@@ -32,7 +32,7 @@
 #include "util/u_idalloc.h"
 #include "util/u_threaded_context.h"
 
-#if PIPE_ARCH_BIG_ENDIAN
+#if UTIL_ARCH_BIG_ENDIAN
 #define SI_BIG_ENDIAN 1
 #else
 #define SI_BIG_ENDIAN 0
@@ -760,7 +760,7 @@ struct si_shader_ctx_state {
  */
 union si_vgt_param_key {
        struct {
-#if PIPE_ARCH_LITTLE_ENDIAN
+#if UTIL_ARCH_LITTLE_ENDIAN
                unsigned prim:4;
                unsigned uses_instancing:1;
                unsigned multi_instances_smaller_than_primgroup:1;
@@ -771,7 +771,7 @@ union si_vgt_param_key {
                unsigned tess_uses_prim_id:1;
                unsigned uses_gs:1;
                unsigned _pad:32 - SI_NUM_VGT_PARAM_KEY_BITS;
-#else /* PIPE_ARCH_BIG_ENDIAN */
+#else /* UTIL_ARCH_BIG_ENDIAN */
                unsigned _pad:32 - SI_NUM_VGT_PARAM_KEY_BITS;
                unsigned uses_gs:1;
                unsigned tess_uses_prim_id:1;
@@ -795,13 +795,13 @@ union si_vgt_param_key {
  */
 union si_vgt_stages_key {
        struct {
-#if PIPE_ARCH_LITTLE_ENDIAN
+#if UTIL_ARCH_LITTLE_ENDIAN
                unsigned tess:1;
                unsigned gs:1;
                unsigned ngg:1; /* gfx10+ */
                unsigned streamout:1; /* only used with NGG */
                unsigned _pad:32 - SI_NUM_VGT_STAGES_KEY_BITS;
-#else /* PIPE_ARCH_BIG_ENDIAN */
+#else /* UTIL_ARCH_BIG_ENDIAN */
                unsigned _pad:32 - SI_NUM_VGT_STAGES_KEY_BITS;
                unsigned streamout:1;
                unsigned ngg:1;