* must be less than 32, so that a 32-bit bitmask of used inputs or outputs
* can be calculated.
*/
-unsigned si_shader_io_get_unique_index_patch(unsigned semantic_name, unsigned index)
+unsigned si_shader_io_get_unique_index_patch(unsigned semantic)
{
- switch (semantic_name) {
- case TGSI_SEMANTIC_TESSOUTER:
+ switch (semantic) {
+ case VARYING_SLOT_TESS_LEVEL_OUTER:
return 0;
- case TGSI_SEMANTIC_TESSINNER:
+ case VARYING_SLOT_TESS_LEVEL_INNER:
return 1;
- case TGSI_SEMANTIC_PATCH:
- assert(index < 30);
- return 2 + index;
-
default:
- assert(!"invalid semantic name");
+ if (semantic >= VARYING_SLOT_PATCH0 && semantic < VARYING_SLOT_PATCH0 + 30)
+ return 2 + (semantic - VARYING_SLOT_PATCH0);
+
+ assert(!"invalid semantic");
return 0;
}
}
* less than 64, so that a 64-bit bitmask of used inputs or outputs can be
* calculated.
*/
-unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index, unsigned is_varying)
+unsigned si_shader_io_get_unique_index(unsigned semantic, bool is_varying)
{
- switch (semantic_name) {
- case TGSI_SEMANTIC_POSITION:
+ switch (semantic) {
+ case VARYING_SLOT_POS:
return 0;
- case TGSI_SEMANTIC_GENERIC:
+ default:
/* Since some shader stages use the the highest used IO index
* to determine the size to allocate for inputs/outputs
* (in LDS, tess and GS rings). GENERIC should be placed right
* after POSITION to make that size as small as possible.
*/
- if (index < SI_MAX_IO_GENERIC)
- return 1 + index;
+ if (semantic >= VARYING_SLOT_VAR0 &&
+ semantic < VARYING_SLOT_VAR0 + SI_MAX_IO_GENERIC)
+ return 1 + (semantic - VARYING_SLOT_VAR0);
assert(!"invalid generic index");
return 0;
- case TGSI_SEMANTIC_FOG:
+ case VARYING_SLOT_FOGC:
return SI_MAX_IO_GENERIC + 1;
- case TGSI_SEMANTIC_COLOR:
- assert(index < 2);
- return SI_MAX_IO_GENERIC + 2 + index;
- case TGSI_SEMANTIC_BCOLOR:
- assert(index < 2);
+ case VARYING_SLOT_COL0:
+ return SI_MAX_IO_GENERIC + 2;
+ case VARYING_SLOT_COL1:
+ return SI_MAX_IO_GENERIC + 3;
+ case VARYING_SLOT_BFC0:
/* If it's a varying, COLOR and BCOLOR alias. */
if (is_varying)
- return SI_MAX_IO_GENERIC + 2 + index;
+ return SI_MAX_IO_GENERIC + 2;
else
- return SI_MAX_IO_GENERIC + 4 + index;
- case TGSI_SEMANTIC_TEXCOORD:
- assert(index < 8);
- return SI_MAX_IO_GENERIC + 6 + index;
+ return SI_MAX_IO_GENERIC + 4;
+ case VARYING_SLOT_BFC1:
+ if (is_varying)
+ return SI_MAX_IO_GENERIC + 3;
+ else
+ return SI_MAX_IO_GENERIC + 5;
+ case VARYING_SLOT_TEX0:
+ case VARYING_SLOT_TEX1:
+ case VARYING_SLOT_TEX2:
+ case VARYING_SLOT_TEX3:
+ case VARYING_SLOT_TEX4:
+ case VARYING_SLOT_TEX5:
+ case VARYING_SLOT_TEX6:
+ case VARYING_SLOT_TEX7:
+ return SI_MAX_IO_GENERIC + 6 + (semantic - VARYING_SLOT_TEX0);
/* These are rarely used between LS and HS or ES and GS. */
- case TGSI_SEMANTIC_CLIPDIST:
- assert(index < 2);
- return SI_MAX_IO_GENERIC + 6 + 8 + index;
- case TGSI_SEMANTIC_CLIPVERTEX:
+ case VARYING_SLOT_CLIP_DIST0:
+ return SI_MAX_IO_GENERIC + 6 + 8;
+ case VARYING_SLOT_CLIP_DIST1:
+ return SI_MAX_IO_GENERIC + 6 + 8 + 1;
+ case VARYING_SLOT_CLIP_VERTEX:
return SI_MAX_IO_GENERIC + 6 + 8 + 2;
- case TGSI_SEMANTIC_PSIZE:
+ case VARYING_SLOT_PSIZ:
return SI_MAX_IO_GENERIC + 6 + 8 + 3;
/* These can't be written by LS, HS, and ES. */
- case TGSI_SEMANTIC_LAYER:
+ case VARYING_SLOT_LAYER:
return SI_MAX_IO_GENERIC + 6 + 8 + 4;
- case TGSI_SEMANTIC_VIEWPORT_INDEX:
+ case VARYING_SLOT_VIEWPORT:
return SI_MAX_IO_GENERIC + 6 + 8 + 5;
- case TGSI_SEMANTIC_PRIMID:
+ case VARYING_SLOT_PRIMITIVE_ID:
STATIC_ASSERT(SI_MAX_IO_GENERIC + 6 + 8 + 6 <= 63);
return SI_MAX_IO_GENERIC + 6 + 8 + 6;
- default:
- fprintf(stderr, "invalid semantic name = %u\n", semantic_name);
- assert(!"invalid semantic name");
- return 0;
}
}
struct pipe_stream_output_info *so)
{
if (ctx->screen->use_ngg_streamout) {
- if (ctx->type == PIPE_SHADER_TESS_EVAL)
+ if (ctx->stage == MESA_SHADER_TESS_EVAL)
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL);
return;
}
if (so->num_outputs) {
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->streamout_config);
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->streamout_write_index);
- } else if (ctx->type == PIPE_SHADER_TESS_EVAL) {
+ } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL);
}
return 0;
}
- const unsigned *properties = shader->selector->info.properties;
- unsigned max_work_group_size = properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] *
- properties[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT] *
- properties[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH];
+ uint16_t *local_size = shader->selector->info.base.cs.local_size;
+ unsigned max_work_group_size = (uint32_t)local_size[0] *
+ (uint32_t)local_size[1] *
+ (uint32_t)local_size[2];
if (!max_work_group_size) {
/* This is a variable group size compute shader,
{
enum ac_arg_type const_shader_buf_type;
- if (ctx->shader->selector->info.const_buffers_declared == 1 &&
- ctx->shader->selector->info.shader_buffers_declared == 0)
+ if (ctx->shader->selector->info.base.num_ubos == 1 &&
+ ctx->shader->selector->info.base.num_ssbos == 0)
const_shader_buf_type = AC_ARG_CONST_FLOAT_PTR;
else
const_shader_buf_type = AC_ARG_CONST_DESC_PTR;
enum
{
/* Convenient merged shader definitions. */
- SI_SHADER_MERGED_VERTEX_TESSCTRL = PIPE_SHADER_TYPES,
+ SI_SHADER_MERGED_VERTEX_TESSCTRL = MESA_ALL_SHADER_STAGES,
SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY,
};
unsigned i, num_return_sgprs;
unsigned num_returns = 0;
unsigned num_prolog_vgprs = 0;
- unsigned type = ctx->type;
- unsigned vs_blit_property = shader->selector->info.properties[TGSI_PROPERTY_VS_BLIT_SGPRS_AMD];
+ unsigned stage = ctx->stage;
memset(&ctx->args, 0, sizeof(ctx->args));
/* Set MERGED shaders. */
if (ctx->screen->info.chip_class >= GFX9) {
- if (shader->key.as_ls || type == PIPE_SHADER_TESS_CTRL)
- type = SI_SHADER_MERGED_VERTEX_TESSCTRL; /* LS or HS */
- else if (shader->key.as_es || shader->key.as_ngg || type == PIPE_SHADER_GEOMETRY)
- type = SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY;
+ if (shader->key.as_ls || stage == MESA_SHADER_TESS_CTRL)
+ stage = SI_SHADER_MERGED_VERTEX_TESSCTRL; /* LS or HS */
+ else if (shader->key.as_es || shader->key.as_ngg || stage == MESA_SHADER_GEOMETRY)
+ stage = SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY;
}
- switch (type) {
- case PIPE_SHADER_VERTEX:
+ switch (stage) {
+ case MESA_SHADER_VERTEX:
declare_global_desc_pointers(ctx);
- if (vs_blit_property) {
- declare_vs_blit_inputs(ctx, vs_blit_property);
+ if (shader->selector->info.base.vs.blit_sgprs_amd) {
+ declare_vs_blit_inputs(ctx, shader->selector->info.base.vs.blit_sgprs_amd);
/* VGPRs */
declare_vs_input_vgprs(ctx, &num_prolog_vgprs, ngg_cull_shader);
}
break;
- case PIPE_SHADER_TESS_CTRL: /* GFX6-GFX8 */
+ case MESA_SHADER_TESS_CTRL: /* GFX6-GFX8 */
declare_global_desc_pointers(ctx);
declare_per_stage_desc_pointers(ctx, true);
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_layout);
case SI_SHADER_MERGED_VERTEX_TESSCTRL:
/* Merged stages have 8 system SGPRs at the beginning. */
/* SPI_SHADER_USER_DATA_ADDR_LO/HI_HS */
- declare_per_stage_desc_pointers(ctx, ctx->type == PIPE_SHADER_TESS_CTRL);
+ declare_per_stage_desc_pointers(ctx, ctx->stage == MESA_SHADER_TESS_CTRL);
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_offset);
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->merged_wave_info);
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_factor_offset);
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); /* unused */
declare_global_desc_pointers(ctx);
- declare_per_stage_desc_pointers(ctx, ctx->type == PIPE_SHADER_VERTEX);
+ declare_per_stage_desc_pointers(ctx, ctx->stage == MESA_SHADER_VERTEX);
declare_vs_specific_input_sgprs(ctx);
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->tcs_offchip_layout);
ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.tcs_patch_id);
ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.tcs_rel_ids);
- if (ctx->type == PIPE_SHADER_VERTEX) {
+ if (ctx->stage == MESA_SHADER_VERTEX) {
declare_vs_input_vgprs(ctx, &num_prolog_vgprs, ngg_cull_shader);
/* LS return values are inputs to the TCS main shader part. */
case SI_SHADER_MERGED_VERTEX_OR_TESSEVAL_GEOMETRY:
/* Merged stages have 8 system SGPRs at the beginning. */
/* SPI_SHADER_USER_DATA_ADDR_LO/HI_GS */
- declare_per_stage_desc_pointers(ctx, ctx->type == PIPE_SHADER_GEOMETRY);
+ declare_per_stage_desc_pointers(ctx, ctx->stage == MESA_SHADER_GEOMETRY);
if (ctx->shader->key.as_ngg)
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->gs_tg_info);
NULL); /* unused (SPI_SHADER_PGM_LO/HI_GS >> 24) */
declare_global_desc_pointers(ctx);
- if (ctx->type != PIPE_SHADER_VERTEX || !vs_blit_property) {
+ if (ctx->stage != MESA_SHADER_VERTEX || !shader->selector->info.base.vs.blit_sgprs_amd) {
declare_per_stage_desc_pointers(
- ctx, (ctx->type == PIPE_SHADER_VERTEX || ctx->type == PIPE_SHADER_TESS_EVAL));
+ ctx, (ctx->stage == MESA_SHADER_VERTEX || ctx->stage == MESA_SHADER_TESS_EVAL));
}
- if (ctx->type == PIPE_SHADER_VERTEX) {
- if (vs_blit_property)
- declare_vs_blit_inputs(ctx, vs_blit_property);
+ if (ctx->stage == MESA_SHADER_VERTEX) {
+ if (shader->selector->info.base.vs.blit_sgprs_amd)
+ declare_vs_blit_inputs(ctx, shader->selector->info.base.vs.blit_sgprs_amd);
else
declare_vs_specific_input_sgprs(ctx);
} else {
/* Declare as many input SGPRs as the VS has. */
}
- if (ctx->type == PIPE_SHADER_VERTEX)
+ if (ctx->stage == MESA_SHADER_VERTEX)
declare_vb_descriptor_input_sgprs(ctx);
/* VGPRs (first GS, then VS/TES) */
ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.gs_invocation_id);
ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->gs_vtx45_offset);
- if (ctx->type == PIPE_SHADER_VERTEX) {
+ if (ctx->stage == MESA_SHADER_VERTEX) {
declare_vs_input_vgprs(ctx, &num_prolog_vgprs, ngg_cull_shader);
- } else if (ctx->type == PIPE_SHADER_TESS_EVAL) {
+ } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
declare_tes_input_vgprs(ctx, ngg_cull_shader);
}
if ((ctx->shader->key.as_es || ngg_cull_shader) &&
- (ctx->type == PIPE_SHADER_VERTEX || ctx->type == PIPE_SHADER_TESS_EVAL)) {
+ (ctx->stage == MESA_SHADER_VERTEX || ctx->stage == MESA_SHADER_TESS_EVAL)) {
unsigned num_user_sgprs, num_vgprs;
- if (ctx->type == PIPE_SHADER_VERTEX) {
+ if (ctx->stage == MESA_SHADER_VERTEX) {
/* For the NGG cull shader, add 1 SGPR to hold
* the vertex buffer pointer.
*/
}
break;
- case PIPE_SHADER_TESS_EVAL:
+ case MESA_SHADER_TESS_EVAL:
declare_global_desc_pointers(ctx);
declare_per_stage_desc_pointers(ctx, true);
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->vs_state_bits);
declare_tes_input_vgprs(ctx, ngg_cull_shader);
break;
- case PIPE_SHADER_GEOMETRY:
+ case MESA_SHADER_GEOMETRY:
declare_global_desc_pointers(ctx);
declare_per_stage_desc_pointers(ctx, true);
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, &ctx->gs2vs_offset);
ac_add_arg(&ctx->args, AC_ARG_VGPR, 1, AC_ARG_INT, &ctx->args.gs_invocation_id);
break;
- case PIPE_SHADER_FRAGMENT:
+ case MESA_SHADER_FRAGMENT:
declare_global_desc_pointers(ctx);
declare_per_stage_desc_pointers(ctx, true);
si_add_arg_checked(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL, SI_PARAM_ALPHA_REF);
returns[i] = ctx->ac.f32;
break;
- case PIPE_SHADER_COMPUTE:
+ case MESA_SHADER_COMPUTE:
declare_global_desc_pointers(ctx);
declare_per_stage_desc_pointers(ctx, true);
if (shader->selector->info.uses_grid_size)
ac_add_arg(&ctx->args, AC_ARG_SGPR, 3, AC_ARG_INT, &ctx->args.num_work_groups);
if (shader->selector->info.uses_block_size &&
- shader->selector->info.properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] == 0)
+ shader->selector->info.base.cs.local_size[0] == 0)
ac_add_arg(&ctx->args, AC_ARG_SGPR, 3, AC_ARG_INT, &ctx->block_size);
unsigned cs_user_data_dwords =
- shader->selector->info.properties[TGSI_PROPERTY_CS_USER_DATA_COMPONENTS_AMD];
+ shader->selector->info.base.cs.user_data_components_amd;
if (cs_user_data_dwords) {
ac_add_arg(&ctx->args, AC_ARG_SGPR, cs_user_data_dwords, AC_ARG_INT, &ctx->cs_user_data);
}
}
/* Images in user SGPRs. */
for (unsigned i = 0; i < shader->selector->cs_num_images_in_user_sgprs; i++) {
- unsigned num_sgprs = shader->selector->info.image_buffers & (1 << i) ? 4 : 8;
+ unsigned num_sgprs = shader->selector->info.base.image_buffers & (1 << i) ? 4 : 8;
while (ctx->args.num_sgprs_used % num_sgprs != 0)
ac_add_arg(&ctx->args, AC_ARG_SGPR, 1, AC_ARG_INT, NULL);
si_get_max_workgroup_size(shader));
/* Reserve register locations for VGPR inputs the PS prolog may need. */
- if (ctx->type == PIPE_SHADER_FRAGMENT && !ctx->shader->is_monolithic) {
+ if (ctx->stage == MESA_SHADER_FRAGMENT && !ctx->shader->is_monolithic) {
ac_llvm_add_target_dep_function_attr(
ctx->main_fn, "InitialPSInputAddr",
S_0286D0_PERSP_SAMPLE_ENA(1) | S_0286D0_PERSP_CENTER_ENA(1) |
assert(shader->info.num_input_vgprs >= num_prolog_vgprs);
shader->info.num_input_vgprs -= num_prolog_vgprs;
- if (shader->key.as_ls || ctx->type == PIPE_SHADER_TESS_CTRL) {
+ if (shader->key.as_ls || ctx->stage == MESA_SHADER_TESS_CTRL) {
if (USE_LDS_SYMBOLS && LLVM_VERSION_MAJOR >= 9) {
/* The LSHS size is not known until draw time, so we append it
* at the end of whatever LDS use there may be in the rest of
/* Unlike radv, we override these arguments in the prolog, so to the
* API shader they appear as normal arguments.
*/
- if (ctx->type == PIPE_SHADER_VERTEX) {
+ if (ctx->stage == MESA_SHADER_VERTEX) {
ctx->abi.vertex_id = ac_get_arg(&ctx->ac, ctx->args.vertex_id);
ctx->abi.instance_id = ac_get_arg(&ctx->ac, ctx->args.instance_id);
- } else if (ctx->type == PIPE_SHADER_FRAGMENT) {
+ } else if (ctx->stage == MESA_SHADER_FRAGMENT) {
ctx->abi.persp_centroid = ac_get_arg(&ctx->ac, ctx->args.persp_centroid);
ctx->abi.linear_centroid = ac_get_arg(&ctx->ac, ctx->args.linear_centroid);
}
static void si_shader_dump_disassembly(struct si_screen *screen,
const struct si_shader_binary *binary,
- enum pipe_shader_type shader_type, unsigned wave_size,
+ gl_shader_stage stage, unsigned wave_size,
struct pipe_debug_callback *debug, const char *name,
FILE *file)
{
if (!ac_rtld_open(&rtld_binary, (struct ac_rtld_open_info){
.info = &screen->info,
- .shader_type = tgsi_processor_to_shader_stage(shader_type),
+ .shader_type = stage,
.wave_size = wave_size,
.num_parts = 1,
.elf_ptrs = &binary->elf_buffer,
const struct ac_shader_config *conf = &shader->config;
if (screen->options.debug_disassembly)
- si_shader_dump_disassembly(screen, &shader->binary, shader->selector->type,
+ si_shader_dump_disassembly(screen, &shader->binary, shader->selector->info.stage,
si_get_shader_wave_size(shader), debug, "main", NULL);
pipe_debug_message(debug, SHADER_INFO,
{
const struct ac_shader_config *conf = &shader->config;
- if (!check_debug_option || si_can_dump_shader(sscreen, shader->selector->type)) {
+ if (!check_debug_option || si_can_dump_shader(sscreen, shader->selector->info.stage)) {
if (shader->selector->info.stage == MESA_SHADER_FRAGMENT) {
fprintf(file,
"*** SHADER CONFIG ***\n"
void si_shader_dump(struct si_screen *sscreen, struct si_shader *shader,
struct pipe_debug_callback *debug, FILE *file, bool check_debug_option)
{
- enum pipe_shader_type shader_type = shader->selector->type;
+ gl_shader_stage stage = shader->selector->info.stage;
- if (!check_debug_option || si_can_dump_shader(sscreen, shader_type))
+ if (!check_debug_option || si_can_dump_shader(sscreen, stage))
si_dump_shader_key(shader, file);
if (!check_debug_option && shader->binary.llvm_ir_string) {
}
if (!check_debug_option ||
- (si_can_dump_shader(sscreen, shader_type) && !(sscreen->debug_flags & DBG(NO_ASM)))) {
+ (si_can_dump_shader(sscreen, stage) && !(sscreen->debug_flags & DBG(NO_ASM)))) {
unsigned wave_size = si_get_shader_wave_size(shader);
fprintf(file, "\n%s:\n", si_get_shader_name(shader));
if (shader->prolog)
- si_shader_dump_disassembly(sscreen, &shader->prolog->binary, shader_type, wave_size, debug,
+ si_shader_dump_disassembly(sscreen, &shader->prolog->binary, stage, wave_size, debug,
"prolog", file);
if (shader->previous_stage)
- si_shader_dump_disassembly(sscreen, &shader->previous_stage->binary, shader_type,
+ si_shader_dump_disassembly(sscreen, &shader->previous_stage->binary, stage,
wave_size, debug, "previous stage", file);
if (shader->prolog2)
- si_shader_dump_disassembly(sscreen, &shader->prolog2->binary, shader_type, wave_size,
+ si_shader_dump_disassembly(sscreen, &shader->prolog2->binary, stage, wave_size,
debug, "prolog2", file);
- si_shader_dump_disassembly(sscreen, &shader->binary, shader_type, wave_size, debug, "main",
+ si_shader_dump_disassembly(sscreen, &shader->binary, stage, wave_size, debug, "main",
file);
if (shader->epilog)
- si_shader_dump_disassembly(sscreen, &shader->epilog->binary, shader_type, wave_size, debug,
+ si_shader_dump_disassembly(sscreen, &shader->epilog->binary, stage, wave_size, debug,
"epilog", file);
fprintf(file, "\n");
}
struct si_shader_info *info = &shader->selector->info;
unsigned skip_vs_optim_mask = 0;
- if ((ctx->type != PIPE_SHADER_VERTEX && ctx->type != PIPE_SHADER_TESS_EVAL) ||
+ if ((ctx->stage != MESA_SHADER_VERTEX && ctx->stage != MESA_SHADER_TESS_EVAL) ||
shader->key.as_ls || shader->key.as_es)
return;
/* Optimizing these outputs is not possible, since they might be overriden
* at runtime with S_028644_PT_SPRITE_TEX. */
for (int i = 0; i < info->num_outputs; i++) {
- if (info->output_semantic_name[i] == TGSI_SEMANTIC_PCOORD ||
- info->output_semantic_name[i] == TGSI_SEMANTIC_TEXCOORD) {
+ if (info->output_semantic[i] == VARYING_SLOT_PNTC ||
+ (info->output_semantic[i] >= VARYING_SLOT_TEX0 &&
+ info->output_semantic[i] <= VARYING_SLOT_TEX7)) {
skip_vs_optim_mask |= 1u << shader->info.vs_output_param_offset[i];
}
}
const struct si_shader_info *info = &sel->info;
ctx->shader = shader;
- ctx->type = sel->type;
+ ctx->stage = sel->info.stage;
- ctx->num_const_buffers = util_last_bit(info->const_buffers_declared);
- ctx->num_shader_buffers = util_last_bit(info->shader_buffers_declared);
+ ctx->num_const_buffers = info->base.num_ubos;
+ ctx->num_shader_buffers = info->base.num_ssbos;
- ctx->num_samplers = util_last_bit(info->samplers_declared);
- ctx->num_images = util_last_bit(info->images_declared);
+ ctx->num_samplers = util_last_bit(info->base.textures_used);
+ ctx->num_images = info->base.num_images;
si_llvm_init_resource_callbacks(ctx);
- switch (ctx->type) {
- case PIPE_SHADER_VERTEX:
+ switch (ctx->stage) {
+ case MESA_SHADER_VERTEX:
si_llvm_init_vs_callbacks(ctx, ngg_cull_shader);
break;
- case PIPE_SHADER_TESS_CTRL:
+ case MESA_SHADER_TESS_CTRL:
si_llvm_init_tcs_callbacks(ctx);
break;
- case PIPE_SHADER_TESS_EVAL:
+ case MESA_SHADER_TESS_EVAL:
si_llvm_init_tes_callbacks(ctx, ngg_cull_shader);
break;
- case PIPE_SHADER_GEOMETRY:
+ case MESA_SHADER_GEOMETRY:
si_llvm_init_gs_callbacks(ctx);
break;
- case PIPE_SHADER_FRAGMENT:
+ case MESA_SHADER_FRAGMENT:
si_llvm_init_ps_callbacks(ctx);
break;
- case PIPE_SHADER_COMPUTE:
+ case MESA_SHADER_COMPUTE:
ctx->abi.load_local_group_size = si_llvm_get_block_size;
break;
default:
si_create_function(ctx, ngg_cull_shader);
- if (ctx->shader->key.as_es || ctx->type == PIPE_SHADER_GEOMETRY)
+ if (ctx->shader->key.as_es || ctx->stage == MESA_SHADER_GEOMETRY)
si_preload_esgs_ring(ctx);
- if (ctx->type == PIPE_SHADER_GEOMETRY)
+ if (ctx->stage == MESA_SHADER_GEOMETRY)
si_preload_gs_rings(ctx);
- else if (ctx->type == PIPE_SHADER_TESS_EVAL)
+ else if (ctx->stage == MESA_SHADER_TESS_EVAL)
si_llvm_preload_tes_rings(ctx);
- if (ctx->type == PIPE_SHADER_TESS_CTRL && sel->info.tessfactors_are_def_in_all_invocs) {
+ if (ctx->stage == MESA_SHADER_TESS_CTRL && sel->info.tessfactors_are_def_in_all_invocs) {
for (unsigned i = 0; i < 6; i++) {
ctx->invoc0_tess_factors[i] = ac_build_alloca_undef(&ctx->ac, ctx->ac.i32, "");
}
}
- if (ctx->type == PIPE_SHADER_GEOMETRY) {
+ if (ctx->stage == MESA_SHADER_GEOMETRY) {
for (unsigned i = 0; i < 4; i++) {
ctx->gs_next_vertex[i] = ac_build_alloca(&ctx->ac, ctx->ac.i32, "");
}
}
}
- if (ctx->type != PIPE_SHADER_GEOMETRY && (shader->key.as_ngg && !shader->key.as_es)) {
+ if (ctx->stage != MESA_SHADER_GEOMETRY && (shader->key.as_ngg && !shader->key.as_es)) {
/* Unconditionally declare scratch space base for streamout and
* vertex compaction. Whether space is actually allocated is
* determined during linking / PM4 creation.
*/
if (ctx->screen->info.chip_class >= GFX9) {
if (!shader->is_monolithic && (shader->key.as_es || shader->key.as_ls) &&
- (ctx->type == PIPE_SHADER_TESS_EVAL ||
- (ctx->type == PIPE_SHADER_VERTEX &&
+ (ctx->stage == MESA_SHADER_TESS_EVAL ||
+ (ctx->stage == MESA_SHADER_VERTEX &&
!si_vs_needs_prolog(sel, &shader->key.part.vs.prolog, &shader->key, ngg_cull_shader)))) {
si_init_exec_from_input(ctx, ctx->merged_wave_info, 0);
- } else if (ctx->type == PIPE_SHADER_TESS_CTRL || ctx->type == PIPE_SHADER_GEOMETRY ||
+ } else if (ctx->stage == MESA_SHADER_TESS_CTRL || ctx->stage == MESA_SHADER_GEOMETRY ||
(shader->key.as_ngg && !shader->key.as_es)) {
LLVMValueRef thread_enabled;
bool nested_barrier;
- if (!shader->is_monolithic || (ctx->type == PIPE_SHADER_TESS_EVAL && shader->key.as_ngg &&
+ if (!shader->is_monolithic || (ctx->stage == MESA_SHADER_TESS_EVAL && shader->key.as_ngg &&
!shader->key.as_es && !shader->key.opt.ngg_culling))
ac_init_exec_full_mask(&ctx->ac);
- if ((ctx->type == PIPE_SHADER_VERTEX || ctx->type == PIPE_SHADER_TESS_EVAL) &&
+ if ((ctx->stage == MESA_SHADER_VERTEX || ctx->stage == MESA_SHADER_TESS_EVAL) &&
shader->key.as_ngg && !shader->key.as_es && !shader->key.opt.ngg_culling) {
gfx10_ngg_build_sendmsg_gs_alloc_req(ctx);
gfx10_ngg_build_export_prim(ctx, NULL, NULL);
}
- if (ctx->type == PIPE_SHADER_TESS_CTRL || ctx->type == PIPE_SHADER_GEOMETRY) {
- if (ctx->type == PIPE_SHADER_GEOMETRY && shader->key.as_ngg) {
+ if (ctx->stage == MESA_SHADER_TESS_CTRL || ctx->stage == MESA_SHADER_GEOMETRY) {
+ if (ctx->stage == MESA_SHADER_GEOMETRY && shader->key.as_ngg) {
gfx10_ngg_gs_emit_prologue(ctx);
nested_barrier = false;
} else {
return sel->nir;
} else if (sel->nir_binary) {
struct pipe_screen *screen = &sel->screen->b;
- const void *options = screen->get_compiler_options(screen, PIPE_SHADER_IR_NIR, sel->type);
+ const void *options = screen->get_compiler_options(screen, PIPE_SHADER_IR_NIR,
+ pipe_shader_type_from_mesa(sel->info.stage));
struct blob_reader blob_reader;
blob_reader_init(&blob_reader, sel->nir_binary, sel->nir_size);
return false;
}
- if (shader->is_monolithic && ctx.type == PIPE_SHADER_VERTEX) {
+ if (shader->is_monolithic && ctx.stage == MESA_SHADER_VERTEX) {
LLVMValueRef parts[4];
unsigned num_parts = 0;
bool has_prolog = false;
if (ctx.shader->key.opt.vs_as_prim_discard_cs)
si_build_prim_discard_compute_shader(&ctx);
- } else if (shader->is_monolithic && ctx.type == PIPE_SHADER_TESS_EVAL && ngg_cull_main_fn) {
+ } else if (shader->is_monolithic && ctx.stage == MESA_SHADER_TESS_EVAL && ngg_cull_main_fn) {
LLVMValueRef parts[2];
parts[0] = ngg_cull_main_fn;
parts[1] = ctx.main_fn;
si_build_wrapper_function(&ctx, parts, 2, 0, 0);
- } else if (shader->is_monolithic && ctx.type == PIPE_SHADER_TESS_CTRL) {
+ } else if (shader->is_monolithic && ctx.stage == MESA_SHADER_TESS_CTRL) {
if (sscreen->info.chip_class >= GFX9) {
struct si_shader_selector *ls = shader->key.part.tcs.ls;
LLVMValueRef parts[4];
/* Reset the shader context. */
ctx.shader = shader;
- ctx.type = PIPE_SHADER_TESS_CTRL;
+ ctx.stage = MESA_SHADER_TESS_CTRL;
si_build_wrapper_function(&ctx, parts + !vs_needs_prolog, 4 - !vs_needs_prolog,
vs_needs_prolog, vs_needs_prolog ? 2 : 1);
si_build_wrapper_function(&ctx, parts, 2, 0, 0);
}
- } else if (shader->is_monolithic && ctx.type == PIPE_SHADER_GEOMETRY) {
+ } else if (shader->is_monolithic && ctx.stage == MESA_SHADER_GEOMETRY) {
if (ctx.screen->info.chip_class >= GFX9) {
struct si_shader_selector *es = shader->key.part.gs.es;
LLVMValueRef es_prolog = NULL;
/* Reset the shader context. */
ctx.shader = shader;
- ctx.type = PIPE_SHADER_GEOMETRY;
+ ctx.stage = MESA_SHADER_GEOMETRY;
/* Prepare the array of shader parts. */
LLVMValueRef parts[4];
si_build_wrapper_function(&ctx, parts, 2, 1, 0);
}
- } else if (shader->is_monolithic && ctx.type == PIPE_SHADER_FRAGMENT) {
+ } else if (shader->is_monolithic && ctx.stage == MESA_SHADER_FRAGMENT) {
si_llvm_build_monolithic_ps(&ctx, shader);
}
/* Post-optimization transformations and analysis. */
si_optimize_vs_outputs(&ctx);
- if ((debug && debug->debug_message) || si_can_dump_shader(sscreen, ctx.type)) {
+ if ((debug && debug->debug_message) || si_can_dump_shader(sscreen, ctx.stage)) {
ctx.shader->info.private_mem_vgprs = ac_count_scratch_private_memory(ctx.main_fn);
}
/* Compile to bytecode. */
if (!si_compile_llvm(sscreen, &shader->binary, &shader->config, compiler, &ctx.ac, debug,
- ctx.type, si_get_shader_name(shader),
+ ctx.stage, si_get_shader_name(shader),
si_should_optimize_less(compiler, shader->selector))) {
si_llvm_dispose(&ctx);
fprintf(stderr, "LLVM failed to compile shader\n");
/* Dump NIR before doing NIR->LLVM conversion in case the
* conversion fails. */
- if (si_can_dump_shader(sscreen, sel->type) && !(sscreen->debug_flags & DBG(NO_NIR))) {
+ if (si_can_dump_shader(sscreen, sel->info.stage) &&
+ !(sscreen->debug_flags & DBG(NO_NIR))) {
nir_print_shader(nir, stderr);
si_dump_streamout(&sel->so);
}
*/
static struct si_shader_part *
si_get_shader_part(struct si_screen *sscreen, struct si_shader_part **list,
- enum pipe_shader_type type, bool prolog, union si_shader_part_key *key,
+ gl_shader_stage stage, bool prolog, union si_shader_part_key *key,
struct ac_llvm_compiler *compiler, struct pipe_debug_callback *debug,
void (*build)(struct si_shader_context *, union si_shader_part_key *),
const char *name)
struct si_shader shader = {};
shader.selector = &sel;
- switch (type) {
- case PIPE_SHADER_VERTEX:
+ switch (stage) {
+ case MESA_SHADER_VERTEX:
shader.key.as_ls = key->vs_prolog.as_ls;
shader.key.as_es = key->vs_prolog.as_es;
shader.key.as_ngg = key->vs_prolog.as_ngg;
(key->vs_prolog.gs_fast_launch_tri_strip ? SI_NGG_CULL_GS_FAST_LAUNCH_TRI_STRIP : 0);
shader.key.opt.vs_as_prim_discard_cs = key->vs_prolog.as_prim_discard_cs;
break;
- case PIPE_SHADER_TESS_CTRL:
+ case MESA_SHADER_TESS_CTRL:
assert(!prolog);
shader.key.part.tcs.epilog = key->tcs_epilog.states;
break;
- case PIPE_SHADER_GEOMETRY:
+ case MESA_SHADER_GEOMETRY:
assert(prolog);
shader.key.as_ngg = key->gs_prolog.as_ngg;
break;
- case PIPE_SHADER_FRAGMENT:
+ case MESA_SHADER_FRAGMENT:
if (prolog)
shader.key.part.ps.prolog = key->ps_prolog.states;
else
struct si_shader_context ctx;
si_llvm_context_init(&ctx, sscreen, compiler,
- si_get_wave_size(sscreen, tgsi_processor_to_shader_stage(type),
+ si_get_wave_size(sscreen, stage,
shader.key.as_ngg, shader.key.as_es,
shader.key.opt.ngg_culling & SI_NGG_CULL_GS_FAST_LAUNCH_ALL,
shader.key.opt.vs_as_prim_discard_cs));
ctx.shader = &shader;
- ctx.type = type;
+ ctx.stage = stage;
build(&ctx, key);
si_llvm_optimize_module(&ctx);
if (!si_compile_llvm(sscreen, &result->binary, &result->config, compiler, &ctx.ac, debug,
- ctx.type, name, false)) {
+ ctx.stage, name, false)) {
FREE(result);
result = NULL;
goto out;
&prolog_key);
shader->prolog =
- si_get_shader_part(sscreen, &sscreen->vs_prologs, PIPE_SHADER_VERTEX, true, &prolog_key,
+ si_get_shader_part(sscreen, &sscreen->vs_prologs, MESA_SHADER_VERTEX, true, &prolog_key,
compiler, debug, si_llvm_build_vs_prolog, "Vertex Shader Prolog");
return shader->prolog != NULL;
}
memset(&epilog_key, 0, sizeof(epilog_key));
epilog_key.tcs_epilog.states = shader->key.part.tcs.epilog;
- shader->epilog = si_get_shader_part(sscreen, &sscreen->tcs_epilogs, PIPE_SHADER_TESS_CTRL, false,
+ shader->epilog = si_get_shader_part(sscreen, &sscreen->tcs_epilogs, MESA_SHADER_TESS_CTRL, false,
&epilog_key, compiler, debug, si_llvm_build_tcs_epilog,
"Tessellation Control Shader Epilog");
return shader->epilog != NULL;
prolog_key.gs_prolog.as_ngg = shader->key.as_ngg;
shader->prolog2 =
- si_get_shader_part(sscreen, &sscreen->gs_prologs, PIPE_SHADER_GEOMETRY, true, &prolog_key,
+ si_get_shader_part(sscreen, &sscreen->gs_prologs, MESA_SHADER_GEOMETRY, true, &prolog_key,
compiler, debug, si_llvm_build_gs_prolog, "Geometry Shader Prolog");
return shader->prolog2 != NULL;
}
key->ps_prolog.ancillary_vgpr_index = shader->info.ancillary_vgpr_index;
if (info->colors_read) {
- unsigned *color = shader->selector->color_attr_index;
+ ubyte *color = shader->selector->color_attr_index;
if (shader->key.part.ps.prolog.color_two_side) {
/* BCOLORs are stored after the last input. */
key->ps_prolog.color_attr_index[i] = color[i];
- if (shader->key.part.ps.prolog.flatshade_colors && interp == TGSI_INTERPOLATE_COLOR)
- interp = TGSI_INTERPOLATE_CONSTANT;
+ if (shader->key.part.ps.prolog.flatshade_colors && interp == INTERP_MODE_COLOR)
+ interp = INTERP_MODE_FLAT;
switch (interp) {
- case TGSI_INTERPOLATE_CONSTANT:
+ case INTERP_MODE_FLAT:
key->ps_prolog.color_interp_vgpr_index[i] = -1;
break;
- case TGSI_INTERPOLATE_PERSPECTIVE:
- case TGSI_INTERPOLATE_COLOR:
+ case INTERP_MODE_SMOOTH:
+ case INTERP_MODE_COLOR:
/* Force the interpolation location for colors here. */
if (shader->key.part.ps.prolog.force_persp_sample_interp)
location = TGSI_INTERPOLATE_LOC_SAMPLE;
assert(0);
}
break;
- case TGSI_INTERPOLATE_LINEAR:
+ case INTERP_MODE_NOPERSPECTIVE:
/* Force the interpolation location for colors here. */
if (shader->key.part.ps.prolog.force_linear_sample_interp)
location = TGSI_INTERPOLATE_LOC_SAMPLE;
/* The prolog is a no-op if these aren't set. */
if (si_need_ps_prolog(&prolog_key)) {
shader->prolog =
- si_get_shader_part(sscreen, &sscreen->ps_prologs, PIPE_SHADER_FRAGMENT, true, &prolog_key,
+ si_get_shader_part(sscreen, &sscreen->ps_prologs, MESA_SHADER_FRAGMENT, true, &prolog_key,
compiler, debug, si_llvm_build_ps_prolog, "Fragment Shader Prolog");
if (!shader->prolog)
return false;
si_get_ps_epilog_key(shader, &epilog_key);
shader->epilog =
- si_get_shader_part(sscreen, &sscreen->ps_epilogs, PIPE_SHADER_FRAGMENT, false, &epilog_key,
+ si_get_shader_part(sscreen, &sscreen->ps_epilogs, MESA_SHADER_FRAGMENT, false, &epilog_key,
compiler, debug, si_llvm_build_ps_epilog, "Fragment Shader Epilog");
if (!shader->epilog)
return false;
projects / mesa.git / blobdiff