radeonsi/nir: always lower ballot masks as 64-bit, codegen handles it
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_internal.h
index b4bee5e22e236238d2742a0a33f43c3720587698..b576d94a63f2488376be1d88c6a38013de30dccc 100644 (file)
@@ -112,7 +112,8 @@ struct si_shader_context {
        LLVMValueRef *imms;
        unsigned imms_num;
 
-       struct lp_build_if_state merged_wrap_if_state;
+       LLVMBasicBlockRef merged_wrap_if_entry_block;
+       int merged_wrap_if_label;
 
        struct tgsi_array_info *temp_arrays;
        LLVMValueRef *temp_array_allocas;
@@ -278,9 +279,10 @@ LLVMValueRef si_llvm_bound_index(struct si_shader_context *ctx,
 void si_llvm_context_init(struct si_shader_context *ctx,
                          struct si_screen *sscreen,
                          struct ac_llvm_compiler *compiler,
-                         unsigned wave_size);
-void si_llvm_context_set_tgsi(struct si_shader_context *ctx,
-                             struct si_shader *shader);
+                         unsigned wave_size,
+                         unsigned ballot_mask_bits);
+void si_llvm_context_set_ir(struct si_shader_context *ctx,
+                           struct si_shader *shader);
 
 void si_llvm_create_func(struct si_shader_context *ctx,
                         const char *name,