static LLVMValueRef get_rel_patch_id(struct si_shader_context *ctx)
{
- switch (ctx->type) {
- case PIPE_SHADER_TESS_CTRL:
+ switch (ctx->stage) {
+ case MESA_SHADER_TESS_CTRL:
return si_unpack_param(ctx, ctx->args.tcs_rel_ids, 0, 8);
- case PIPE_SHADER_TESS_EVAL:
+ case MESA_SHADER_TESS_EVAL:
return ac_get_arg(&ctx->ac, ctx->tes_rel_patch_id);
default:
static unsigned get_tcs_out_vertex_dw_stride_constant(struct si_shader_context *ctx)
{
- assert(ctx->type == PIPE_SHADER_TESS_CTRL);
+ assert(ctx->stage == MESA_SHADER_TESS_CTRL);
if (ctx->shader->key.mono.u.ff_tcs_inputs_to_copy)
return util_last_bit64(ctx->shader->key.mono.u.ff_tcs_inputs_to_copy) * 4;
: 0;
/* If !tcs_out_vertices, it's either the fixed-func TCS or the TCS epilog. */
- if (ctx->type == PIPE_SHADER_TESS_CTRL && tcs_out_vertices)
+ if (ctx->stage == MESA_SHADER_TESS_CTRL && tcs_out_vertices)
return LLVMConstInt(ctx->ac.i32, tcs_out_vertices, 0);
return si_unpack_param(ctx, ctx->tcs_offchip_layout, 6, 6);
{
unsigned stride;
- switch (ctx->type) {
- case PIPE_SHADER_VERTEX:
+ switch (ctx->stage) {
+ case MESA_SHADER_VERTEX:
stride = ctx->shader->selector->lshs_vertex_stride / 4;
return LLVMConstInt(ctx->ac.i32, stride, 0);
- case PIPE_SHADER_TESS_CTRL:
+ case MESA_SHADER_TESS_CTRL:
if (ctx->screen->info.chip_class >= GFX9 && ctx->shader->is_monolithic) {
stride = ctx->shader->key.part.tcs.ls->lshs_vertex_stride / 4;
return LLVMConstInt(ctx->ac.i32, stride, 0);
LLVMValueRef vertex_index, LLVMValueRef param_index,
unsigned const_index, unsigned location,
unsigned driver_location, unsigned component,
- unsigned num_components, bool is_patch,
+ unsigned num_components, bool unused,
bool is_compact, bool load_input)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
index = info->output_semantic_index[driver_location];
}
+ bool is_patch = vertex_index == NULL;
assert((name == TGSI_SEMANTIC_PATCH || name == TGSI_SEMANTIC_TESSINNER ||
name == TGSI_SEMANTIC_TESSOUTER) == is_patch);
LLVMValueRef vertex_index, LLVMValueRef param_index,
unsigned const_index, unsigned location,
unsigned driver_location, unsigned component,
- unsigned num_components, bool is_patch, bool is_compact,
+ unsigned num_components, bool unused, bool is_compact,
bool load_input)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
ubyte index = info->input_semantic_index[driver_location];
assert((name == TGSI_SEMANTIC_PATCH || name == TGSI_SEMANTIC_TESSINNER ||
- name == TGSI_SEMANTIC_TESSOUTER) == is_patch);
+ name == TGSI_SEMANTIC_TESSOUTER) == (vertex_index == NULL));
base = ac_get_arg(&ctx->ac, ctx->tcs_offchip_offset);
static void si_nir_store_output_tcs(struct ac_shader_abi *abi, const struct nir_variable *var,
LLVMValueRef vertex_index, LLVMValueRef param_index,
- unsigned const_index, LLVMValueRef src, unsigned writemask)
+ unsigned const_index, LLVMValueRef src, unsigned writemask,
+ unsigned component, unsigned driver_location)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
struct si_shader_info *info = &ctx->shader->selector->info;
- const unsigned component = var->data.location_frac;
- unsigned driver_location = var->data.driver_location;
LLVMValueRef dw_addr, stride;
LLVMValueRef buffer, base, addr;
LLVMValueRef values[8];
- bool skip_lds_store;
bool is_tess_factor = false, is_tess_inner = false;
driver_location = driver_location / 4;
if (!param_index)
param_index = LLVMConstInt(ctx->ac.i32, const_index, 0);
- const bool is_patch = var->data.patch || var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
- var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
+ const bool is_patch = vertex_index == NULL;
/* Invalid SPIR-V can cause this. */
if ((name == TGSI_SEMANTIC_PATCH || name == TGSI_SEMANTIC_TESSINNER ||
dw_addr = get_tcs_out_current_patch_offset(ctx);
dw_addr = get_dw_address_from_generic_indices(ctx, stride, dw_addr, vertex_index, param_index,
name, index);
-
- skip_lds_store = !info->reads_pervertex_outputs;
} else {
dw_addr = get_tcs_out_current_patch_data_offset(ctx);
dw_addr = get_dw_address_from_generic_indices(ctx, NULL, dw_addr, vertex_index, param_index,
name, index);
- skip_lds_store = !info->reads_perpatch_outputs;
-
if (is_const && const_index == 0) {
int name = info->output_semantic_name[driver_location];
/* Always write tess factors into LDS for the TCS epilog. */
if (name == TGSI_SEMANTIC_TESSINNER || name == TGSI_SEMANTIC_TESSOUTER) {
- /* The epilog doesn't read LDS if invocation 0 defines tess factors. */
- skip_lds_store = !info->reads_tessfactor_outputs &&
- ctx->shader->selector->info.tessfactors_are_def_in_all_invocs;
is_tess_factor = true;
is_tess_inner = name == TGSI_SEMANTIC_TESSINNER;
}
}
/* Skip LDS stores if there is no LDS read of this output. */
- if (!skip_lds_store)
+ if (info->output_readmask[driver_location + chan / 4] & (1 << (chan % 4)) ||
+ /* The epilog reads LDS if invocation 0 doesn't define tess factors. */
+ (is_tess_factor &&
+ !ctx->shader->selector->info.tessfactors_are_def_in_all_invocs))
lshs_lds_store(ctx, chan, dw_addr, value);
value = ac_to_integer(&ctx->ac, value);
static LLVMValueRef si_load_patch_vertices_in(struct ac_shader_abi *abi)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
- if (ctx->type == PIPE_SHADER_TESS_CTRL)
+ if (ctx->stage == MESA_SHADER_TESS_CTRL)
return si_unpack_param(ctx, ctx->tcs_out_lds_layout, 13, 6);
- else if (ctx->type == PIPE_SHADER_TESS_EVAL)
+ else if (ctx->stage == MESA_SHADER_TESS_EVAL)
return get_num_tcs_out_vertices(ctx);
else
unreachable("invalid shader stage for TGSI_SEMANTIC_VERTICESIN");
if (ctx->shader->key.as_es)
ctx->abi.emit_outputs = si_llvm_emit_es_epilogue;
else if (ngg_cull_shader)
- ctx->abi.emit_outputs = gfx10_emit_ngg_culling_epilogue_4x_wave32;
+ ctx->abi.emit_outputs = gfx10_emit_ngg_culling_epilogue;
else if (ctx->shader->key.as_ngg)
ctx->abi.emit_outputs = gfx10_emit_ngg_epilogue;
else
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