break;
case nir_intrinsic_load_local_group_size:
/* The block size is translated to IMM with a fixed block size. */
- if (info->properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] == 0)
+ if (info->base.cs.local_size[0] == 0)
info->uses_block_size = true;
break;
case nir_intrinsic_load_local_invocation_id:
info->stage = nir->info.stage;
if (nir->info.stage == MESA_SHADER_TESS_EVAL) {
- info->properties[TGSI_PROPERTY_TES_VERTEX_ORDER_CW] = !nir->info.tess.ccw;
-
if (info->base.tess.primitive_mode == GL_ISOLINES)
info->base.tess.primitive_mode = GL_LINES;
}
- if (nir->info.stage == MESA_SHADER_GEOMETRY) {
- info->properties[TGSI_PROPERTY_GS_INPUT_PRIM] = nir->info.gs.input_primitive;
- info->properties[TGSI_PROPERTY_GS_OUTPUT_PRIM] = nir->info.gs.output_primitive;
- info->properties[TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES] = nir->info.gs.vertices_out;
- info->properties[TGSI_PROPERTY_GS_INVOCATIONS] = nir->info.gs.invocations;
- }
-
if (nir->info.stage == MESA_SHADER_FRAGMENT) {
- info->properties[TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL] =
- nir->info.fs.early_fragment_tests | nir->info.fs.post_depth_coverage;
- info->properties[TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE] = nir->info.fs.post_depth_coverage;
-
- if (nir->info.fs.pixel_center_integer) {
- info->properties[TGSI_PROPERTY_FS_COORD_PIXEL_CENTER] = TGSI_FS_COORD_PIXEL_CENTER_INTEGER;
- }
-
- if (nir->info.fs.depth_layout != FRAG_DEPTH_LAYOUT_NONE) {
- switch (nir->info.fs.depth_layout) {
- case FRAG_DEPTH_LAYOUT_ANY:
- info->properties[TGSI_PROPERTY_FS_DEPTH_LAYOUT] = TGSI_FS_DEPTH_LAYOUT_ANY;
- break;
- case FRAG_DEPTH_LAYOUT_GREATER:
- info->properties[TGSI_PROPERTY_FS_DEPTH_LAYOUT] = TGSI_FS_DEPTH_LAYOUT_GREATER;
- break;
- case FRAG_DEPTH_LAYOUT_LESS:
- info->properties[TGSI_PROPERTY_FS_DEPTH_LAYOUT] = TGSI_FS_DEPTH_LAYOUT_LESS;
- break;
- case FRAG_DEPTH_LAYOUT_UNCHANGED:
- info->properties[TGSI_PROPERTY_FS_DEPTH_LAYOUT] = TGSI_FS_DEPTH_LAYOUT_UNCHANGED;
- break;
- default:
- unreachable("Unknow depth layout");
- }
- }
+ /* post_depth_coverage implies early_fragment_tests */
+ info->base.fs.early_fragment_tests |= info->base.fs.post_depth_coverage;
info->color_interpolate[0] = nir->info.fs.color0_interp;
info->color_interpolate[1] = nir->info.fs.color1_interp;
TGSI_INTERPOLATE_LOC_CENTER;
}
- if (gl_shader_stage_is_compute(nir->info.stage)) {
- info->properties[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH] = nir->info.cs.local_size[0];
- info->properties[TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT] = nir->info.cs.local_size[1];
- info->properties[TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH] = nir->info.cs.local_size[2];
- info->properties[TGSI_PROPERTY_CS_USER_DATA_COMPONENTS_AMD] =
- nir->info.cs.user_data_components_amd;
- }
-
info->constbuf0_num_slots = nir->num_uniforms;
info->shader_buffers_declared = u_bit_consecutive(0, nir->info.num_ssbos);
info->const_buffers_declared = u_bit_consecutive(0, nir->info.num_ubos);