radeonsi: rename num_memory_instructions -> num_memory_stores
[mesa.git] / src / gallium / drivers / radeonsi / si_shader_nir.c
index 067c7768ddedbe3b060b1cef8468d9e6142a6e4a..c95e949c6af6d5a2841d996c400bbc206b4a0ac7 100644 (file)
@@ -303,15 +303,6 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info
          }
          break;
       }
-      case nir_intrinsic_load_vertex_id:
-         info->uses_vertexid = 1;
-         break;
-      case nir_intrinsic_load_vertex_id_zero_base:
-         info->uses_vertexid_nobase = 1;
-         break;
-      case nir_intrinsic_load_base_vertex:
-         info->uses_basevertex = 1;
-         break;
       case nir_intrinsic_load_draw_id:
          info->uses_drawid = 1;
          break;
@@ -333,11 +324,11 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info
       case nir_intrinsic_bindless_image_store:
          info->uses_bindless_images = true;
          info->writes_memory = true;
-         info->num_memory_instructions++; /* we only care about stores */
+         info->num_memory_stores++;
          break;
       case nir_intrinsic_image_deref_store:
          info->writes_memory = true;
-         info->num_memory_instructions++; /* we only care about stores */
+         info->num_memory_stores++;
          break;
       case nir_intrinsic_bindless_image_atomic_add:
       case nir_intrinsic_bindless_image_atomic_imin:
@@ -351,7 +342,7 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info
       case nir_intrinsic_bindless_image_atomic_comp_swap:
          info->uses_bindless_images = true;
          info->writes_memory = true;
-         info->num_memory_instructions++; /* we only care about stores */
+         info->num_memory_stores++;
          break;
       case nir_intrinsic_image_deref_atomic_add:
       case nir_intrinsic_image_deref_atomic_imin:
@@ -366,7 +357,7 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info
       case nir_intrinsic_image_deref_atomic_inc_wrap:
       case nir_intrinsic_image_deref_atomic_dec_wrap:
          info->writes_memory = true;
-         info->num_memory_instructions++; /* we only care about stores */
+         info->num_memory_stores++;
          break;
       case nir_intrinsic_store_ssbo:
       case nir_intrinsic_ssbo_atomic_add:
@@ -380,7 +371,7 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info
       case nir_intrinsic_ssbo_atomic_exchange:
       case nir_intrinsic_ssbo_atomic_comp_swap:
          info->writes_memory = true;
-         info->num_memory_instructions++; /* we only care about stores */
+         info->num_memory_stores++;
          break;
       case nir_intrinsic_load_color0:
       case nir_intrinsic_load_color1: {
@@ -406,9 +397,6 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info
                info->uses_linear_centroid = true;
             else
                info->uses_linear_center = true;
-
-            if (intr->intrinsic == nir_intrinsic_load_barycentric_at_sample)
-               info->uses_linear_opcode_interp_sample = true;
          } else {
             if (intr->intrinsic == nir_intrinsic_load_barycentric_sample)
                info->uses_persp_sample = true;
@@ -416,10 +404,9 @@ static void scan_instruction(const struct nir_shader *nir, struct si_shader_info
                info->uses_persp_centroid = true;
             else
                info->uses_persp_center = true;
-
-            if (intr->intrinsic == nir_intrinsic_load_barycentric_at_sample)
-               info->uses_persp_opcode_interp_sample = true;
          }
+         if (intr->intrinsic == nir_intrinsic_load_barycentric_at_sample)
+            info->uses_interp_at_sample = true;
          break;
       }
       case nir_intrinsic_load_input:
@@ -479,17 +466,6 @@ void si_nir_scan_shader(const struct nir_shader *nir, struct si_shader_info *inf
    }
 
    info->constbuf0_num_slots = nir->num_uniforms;
-   info->shader_buffers_declared = u_bit_consecutive(0, nir->info.num_ssbos);
-   info->const_buffers_declared = u_bit_consecutive(0, nir->info.num_ubos);
-   info->images_declared = u_bit_consecutive(0, nir->info.num_images);
-
-   info->num_written_clipdistance = nir->info.clip_distance_array_size;
-   info->num_written_culldistance = nir->info.cull_distance_array_size;
-   info->clipdist_writemask = u_bit_consecutive(0, info->num_written_clipdistance);
-   info->culldist_writemask = u_bit_consecutive(0, info->num_written_culldistance);
-
-   if (info->stage == MESA_SHADER_FRAGMENT)
-      info->uses_kill = nir->info.fs.uses_discard;
 
    if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
       info->tessfactors_are_def_in_all_invocs = ac_are_tessfactors_def_in_all_invocs(nir);