case nir_intrinsic_bindless_image_store:
info->uses_bindless_images = true;
info->writes_memory = true;
- info->num_memory_instructions++; /* we only care about stores */
+ info->num_memory_stores++;
break;
case nir_intrinsic_image_deref_store:
info->writes_memory = true;
- info->num_memory_instructions++; /* we only care about stores */
+ info->num_memory_stores++;
break;
case nir_intrinsic_bindless_image_atomic_add:
case nir_intrinsic_bindless_image_atomic_imin:
case nir_intrinsic_bindless_image_atomic_comp_swap:
info->uses_bindless_images = true;
info->writes_memory = true;
- info->num_memory_instructions++; /* we only care about stores */
+ info->num_memory_stores++;
break;
case nir_intrinsic_image_deref_atomic_add:
case nir_intrinsic_image_deref_atomic_imin:
case nir_intrinsic_image_deref_atomic_inc_wrap:
case nir_intrinsic_image_deref_atomic_dec_wrap:
info->writes_memory = true;
- info->num_memory_instructions++; /* we only care about stores */
+ info->num_memory_stores++;
break;
case nir_intrinsic_store_ssbo:
case nir_intrinsic_ssbo_atomic_add:
case nir_intrinsic_ssbo_atomic_exchange:
case nir_intrinsic_ssbo_atomic_comp_swap:
info->writes_memory = true;
- info->num_memory_instructions++; /* we only care about stores */
+ info->num_memory_stores++;
break;
case nir_intrinsic_load_color0:
case nir_intrinsic_load_color1: {
info->constbuf0_num_slots = nir->num_uniforms;
- if (info->stage == MESA_SHADER_FRAGMENT)
- info->uses_kill = nir->info.fs.uses_discard;
-
if (nir->info.stage == MESA_SHADER_TESS_CTRL) {
info->tessfactors_are_def_in_all_invocs = ac_are_tessfactors_def_in_all_invocs(nir);
}