radeonsi: fork tgsi_shader_info and tgsi_tessctrl_info

[mesa.git] / src / gallium / drivers / radeonsi / si_state.c

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index ac3d14d8f668e9030029798df92b983fa0d8eee6..9b913212e4ad9b1eaa1c6a83629b61350c804620 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -779,7 +779,7 @@ static void si_emit_clip_regs(struct si_context *sctx)
 {
        struct si_shader *vs = si_get_vs_state(sctx);
        struct si_shader_selector *vs_sel = vs->selector;
-       struct tgsi_shader_info *info = &vs_sel->info;
+       struct si_shader_info *info = &vs_sel->info;
        struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
        unsigned window_space =
           info->properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION];
@@ -919,6 +919,14 @@ static void *si_create_rs_state(struct pipe_context *ctx,
        rs->flatshade_first = state->flatshade_first;
        rs->sprite_coord_enable = state->sprite_coord_enable;
        rs->rasterizer_discard = state->rasterizer_discard;
+       rs->polygon_mode_enabled = (state->fill_front != PIPE_POLYGON_MODE_FILL &&
+                                   !(state->cull_face & PIPE_FACE_FRONT)) ||
+                                  (state->fill_back != PIPE_POLYGON_MODE_FILL &&
+                                   !(state->cull_face & PIPE_FACE_BACK));
+       rs->polygon_mode_is_lines = (state->fill_front == PIPE_POLYGON_MODE_LINE &&
+                                    !(state->cull_face & PIPE_FACE_FRONT)) ||
+                                   (state->fill_back == PIPE_POLYGON_MODE_LINE &&
+                                    !(state->cull_face & PIPE_FACE_BACK));
        rs->pa_sc_line_stipple = state->line_stipple_enable ?
                                S_028A0C_LINE_PATTERN(state->line_stipple_pattern) |
                                S_028A0C_REPEAT_COUNT(state->line_stipple_factor) : 0;
@@ -976,8 +984,7 @@ static void *si_create_rs_state(struct pipe_context *ctx,
                S_028814_POLY_OFFSET_FRONT_ENABLE(util_get_offset(state, state->fill_front)) |
                S_028814_POLY_OFFSET_BACK_ENABLE(util_get_offset(state, state->fill_back)) |
                S_028814_POLY_OFFSET_PARA_ENABLE(state->offset_point || state->offset_line) |
-               S_028814_POLY_MODE(state->fill_front != PIPE_POLYGON_MODE_FILL ||
-                                  state->fill_back != PIPE_POLYGON_MODE_FILL) |
+               S_028814_POLY_MODE(rs->polygon_mode_enabled) |
                S_028814_POLYMODE_FRONT_PTYPE(si_translate_fill(state->fill_front)) |
                S_028814_POLYMODE_BACK_PTYPE(si_translate_fill(state->fill_back)));
 
@@ -1072,9 +1079,6 @@ static void si_bind_rs_state(struct pipe_context *ctx, void *state)
            old_rs->pa_cl_clip_cntl != rs->pa_cl_clip_cntl)
                si_mark_atom_dirty(sctx, &sctx->atoms.s.clip_regs);
 
-       sctx->ia_multi_vgt_param_key.u.line_stipple_enabled =
-               rs->line_stipple_enable;
-
        if (old_rs->clip_plane_enable != rs->clip_plane_enable ||
            old_rs->rasterizer_discard != rs->rasterizer_discard ||
            old_rs->sprite_coord_enable != rs->sprite_coord_enable ||
@@ -3849,7 +3853,7 @@ si_make_buffer_descriptor(struct si_screen *screen, struct si_resource *buf,
                 *       else: swizzle_address >= NUM_RECORDS
                 */
                state[7] |= S_008F0C_FORMAT(fmt->img_format) |
-                           S_008F0C_OOB_SELECT(0) |
+                           S_008F0C_OOB_SELECT(V_008F0C_OOB_SELECT_STRUCTURED_WITH_OFFSET) |
                            S_008F0C_RESOURCE_LEVEL(1);
        } else {
                int first_non_void;
@@ -4869,7 +4873,10 @@ static void *si_create_vertex_elements(struct pipe_context *ctx,
                return NULL;
 
        v->count = count;
-       v->desc_list_byte_size = align(count * 16, SI_CPDMA_ALIGNMENT);
+
+       unsigned alloc_count = count > sscreen->num_vbos_in_user_sgprs ?
+                              count - sscreen->num_vbos_in_user_sgprs : 0;
+       v->vb_desc_list_alloc_size = align(alloc_count * 16, SI_CPDMA_ALIGNMENT);
 
        for (i = 0; i < count; ++i) {
                const struct util_format_description *desc;
@@ -5070,7 +5077,14 @@ static void si_bind_vertex_elements(struct pipe_context *ctx, void *state)
        struct si_vertex_elements *v = (struct si_vertex_elements*)state;
 
        sctx->vertex_elements = v;
-       sctx->vertex_buffers_dirty = true;
+       sctx->num_vertex_elements = v ? v->count : 0;
+
+       if (sctx->num_vertex_elements) {
+               sctx->vertex_buffers_dirty = true;
+       } else {
+               sctx->vertex_buffer_pointer_dirty = false;
+               sctx->vertex_buffer_user_sgprs_dirty = false;
+       }
 
        if (v &&
            (!old ||
@@ -5106,8 +5120,10 @@ static void si_delete_vertex_element(struct pipe_context *ctx, void *state)
        struct si_context *sctx = (struct si_context *)ctx;
        struct si_vertex_elements *v = (struct si_vertex_elements*)state;
 
-       if (sctx->vertex_elements == state)
+       if (sctx->vertex_elements == state) {
                sctx->vertex_elements = NULL;
+               sctx->num_vertex_elements = 0;
+       }
        si_resource_reference(&v->instance_divisor_factor_buffer, NULL);
        FREE(state);
 }
@@ -5118,8 +5134,9 @@ static void si_set_vertex_buffers(struct pipe_context *ctx,
 {
        struct si_context *sctx = (struct si_context *)ctx;
        struct pipe_vertex_buffer *dst = sctx->vertex_buffer + start_slot;
+       unsigned updated_mask = u_bit_consecutive(start_slot, count);
        uint32_t orig_unaligned = sctx->vertex_buffer_unaligned;
-       uint32_t unaligned = orig_unaligned;
+       uint32_t unaligned = 0;
        int i;
 
        assert(start_slot + count <= ARRAY_SIZE(sctx->vertex_buffer));
@@ -5129,14 +5146,14 @@ static void si_set_vertex_buffers(struct pipe_context *ctx,
                        const struct pipe_vertex_buffer *src = buffers + i;
                        struct pipe_vertex_buffer *dsti = dst + i;
                        struct pipe_resource *buf = src->buffer.resource;
+                       unsigned slot_bit = 1 << (start_slot + i);
 
                        pipe_resource_reference(&dsti->buffer.resource, buf);
                        dsti->buffer_offset = src->buffer_offset;
                        dsti->stride = src->stride;
+
                        if (dsti->buffer_offset & 3 || dsti->stride & 3)
-                               unaligned |= 1 << (start_slot + i);
-                       else
-                               unaligned &= ~(1 << (start_slot + i));
+                               unaligned |= slot_bit;
 
                        si_context_add_resource_size(sctx, buf);
                        if (buf)
@@ -5146,10 +5163,10 @@ static void si_set_vertex_buffers(struct pipe_context *ctx,
                for (i = 0; i < count; i++) {
                        pipe_resource_reference(&dst[i].buffer.resource, NULL);
                }
-               unaligned &= ~u_bit_consecutive(start_slot, count);
+               unaligned &= ~updated_mask;
        }
        sctx->vertex_buffers_dirty = true;
-       sctx->vertex_buffer_unaligned = unaligned;
+       sctx->vertex_buffer_unaligned = (orig_unaligned & ~updated_mask) | unaligned;
 
        /* Check whether alignment may have changed in a way that requires
         * shader changes. This check is conservative: a vertex buffer can only
@@ -5160,7 +5177,7 @@ static void si_set_vertex_buffers(struct pipe_context *ctx,
         */
        if (sctx->vertex_elements &&
            (sctx->vertex_elements->vb_alignment_check_mask &
-            (unaligned | orig_unaligned) & u_bit_consecutive(start_slot, count)))
+            (unaligned | orig_unaligned) & updated_mask))
                sctx->do_update_shaders = true;
 }
 
@@ -5664,7 +5681,7 @@ static void si_init_config(struct si_context *sctx)
                /* TODO: For culling, replace 128 with 256. */
                si_pm4_set_reg(pm4, R_030980_GE_PC_ALLOC,
                               S_030980_OVERSUB_EN(1) |
-                              S_030980_NUM_PC_LINES(128 * sscreen->info.max_se - 1));
+                              S_030980_NUM_PC_LINES(sscreen->info.pc_lines / 4 - 1));
        }
 
        if (sctx->chip_class >= GFX8) {