radeonsi: implement SAMPLEPOS fragment shader input
[mesa.git] / src / gallium / drivers / radeonsi / si_state.c
index 6d5408b1877f1889923be65c4268eb6dd8433dd3..b85a4594156992d552eeb18fa063f396415198ba 100644 (file)
@@ -1312,6 +1312,7 @@ static unsigned si_tex_dim(unsigned dim, unsigned nr_samples)
        case PIPE_TEXTURE_3D:
                return V_008F1C_SQ_RSRC_IMG_3D;
        case PIPE_TEXTURE_CUBE:
+       case PIPE_TEXTURE_CUBE_ARRAY:
                return V_008F1C_SQ_RSRC_IMG_CUBE;
        }
 }
@@ -1858,6 +1859,7 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
                                     const struct pipe_framebuffer_state *state)
 {
        struct si_context *sctx = (struct si_context *)ctx;
+       struct pipe_constant_buffer constbuf = {0};
        struct r600_surface *surf = NULL;
        struct r600_texture *rtex;
        int i;
@@ -1920,8 +1922,33 @@ static void si_set_framebuffer_state(struct pipe_context *ctx,
        sctx->framebuffer.atom.num_dw = state->nr_cbufs*15 + (8 - state->nr_cbufs)*3;
        sctx->framebuffer.atom.num_dw += state->zsbuf ? 23 : 4;
        sctx->framebuffer.atom.num_dw += 3; /* WINDOW_SCISSOR_BR */
-       sctx->framebuffer.atom.num_dw += 25; /* MSAA */
+       sctx->framebuffer.atom.num_dw += 18; /* MSAA sample locations */
        sctx->framebuffer.atom.dirty = true;
+       sctx->msaa_config.dirty = true;
+
+       /* Set sample locations as fragment shader constants. */
+       switch (sctx->framebuffer.nr_samples) {
+       case 1:
+               constbuf.user_buffer = sctx->b.sample_locations_1x;
+               break;
+       case 2:
+               constbuf.user_buffer = sctx->b.sample_locations_2x;
+               break;
+       case 4:
+               constbuf.user_buffer = sctx->b.sample_locations_4x;
+               break;
+       case 8:
+               constbuf.user_buffer = sctx->b.sample_locations_8x;
+               break;
+       case 16:
+               constbuf.user_buffer = sctx->b.sample_locations_16x;
+               break;
+       default:
+               assert(0);
+       }
+       constbuf.buffer_size = sctx->framebuffer.nr_samples * 2 * 4;
+       ctx->set_constant_buffer(ctx, PIPE_SHADER_FRAGMENT,
+                                NUM_PIPE_CONST_BUFFERS, &constbuf);
 }
 
 static void si_emit_framebuffer_state(struct si_context *sctx, struct r600_atom *atom)
@@ -2024,7 +2051,31 @@ static void si_emit_framebuffer_state(struct si_context *sctx, struct r600_atom
        r600_write_context_reg(cs, R_028208_PA_SC_WINDOW_SCISSOR_BR,
                               S_028208_BR_X(state->width) | S_028208_BR_Y(state->height));
 
-       cayman_emit_msaa_state(cs, sctx->framebuffer.nr_samples);
+       cayman_emit_msaa_sample_locs(cs, sctx->framebuffer.nr_samples);
+}
+
+static void si_emit_msaa_config(struct r600_common_context *rctx, struct r600_atom *atom)
+{
+       struct si_context *sctx = (struct si_context *)rctx;
+       struct radeon_winsys_cs *cs = sctx->b.rings.gfx.cs;
+
+       cayman_emit_msaa_config(cs, sctx->framebuffer.nr_samples,
+                               sctx->ps_iter_samples);
+}
+
+const struct r600_atom si_atom_msaa_config = { si_emit_msaa_config, 10 }; /* number of CS dwords */
+
+static void si_set_min_samples(struct pipe_context *ctx, unsigned min_samples)
+{
+       struct si_context *sctx = (struct si_context *)ctx;
+
+       if (sctx->ps_iter_samples == min_samples)
+               return;
+
+       sctx->ps_iter_samples = min_samples;
+
+       if (sctx->framebuffer.nr_samples > 1)
+               sctx->msaa_config.dirty = true;
 }
 
 /*
@@ -2173,7 +2224,7 @@ static void *si_create_fs_state(struct pipe_context *ctx,
        return si_create_shader_state(ctx, state, PIPE_SHADER_FRAGMENT);
 }
 
-#if HAVE_LLVM >= 0x0305
+#if LLVM_SUPPORTS_GEOM_SHADERS
 
 static void *si_create_gs_state(struct pipe_context *ctx,
                                const struct pipe_shader_state *state)
@@ -2203,7 +2254,7 @@ static void si_bind_vs_shader(struct pipe_context *ctx, void *state)
        sctx->vs_shader = sel;
 }
 
-#if HAVE_LLVM >= 0x0305
+#if LLVM_SUPPORTS_GEOM_SHADERS
 
 static void si_bind_gs_shader(struct pipe_context *ctx, void *state)
 {
@@ -2271,7 +2322,7 @@ static void si_delete_vs_shader(struct pipe_context *ctx, void *state)
        si_delete_shader_selector(ctx, sel);
 }
 
-#if HAVE_LLVM >= 0x0305
+#if LLVM_SUPPORTS_GEOM_SHADERS
 
 static void si_delete_gs_shader(struct pipe_context *ctx, void *state)
 {
@@ -2477,7 +2528,8 @@ static struct pipe_sampler_view *si_create_sampler_view(struct pipe_context *ctx
                depth = texture->array_size;
        } else if (texture->target == PIPE_TEXTURE_2D_ARRAY) {
                depth = texture->array_size;
-       }
+       } else if (texture->target == PIPE_TEXTURE_CUBE_ARRAY)
+               depth = texture->array_size / 6;
 
        va = r600_resource_va(ctx->screen, texture);
        va += surflevel[0].offset;
@@ -2599,16 +2651,15 @@ static void *si_create_sampler_state(struct pipe_context *ctx,
        rstate->val[0] = (S_008F30_CLAMP_X(si_tex_wrap(state->wrap_s)) |
                          S_008F30_CLAMP_Y(si_tex_wrap(state->wrap_t)) |
                          S_008F30_CLAMP_Z(si_tex_wrap(state->wrap_r)) |
-                         (state->max_anisotropy & 0x7) << 9 | /* XXX */
+                         r600_tex_aniso_filter(state->max_anisotropy) << 9 |
                          S_008F30_DEPTH_COMPARE_FUNC(si_tex_compare(state->compare_func)) |
                          S_008F30_FORCE_UNNORMALIZED(!state->normalized_coords) |
-                         aniso_flag_offset << 16 | /* XXX */
                          S_008F30_DISABLE_CUBE_WRAP(!state->seamless_cube_map));
        rstate->val[1] = (S_008F34_MIN_LOD(S_FIXED(CLAMP(state->min_lod, 0, 15), 8)) |
                          S_008F34_MAX_LOD(S_FIXED(CLAMP(state->max_lod, 0, 15), 8)));
        rstate->val[2] = (S_008F38_LOD_BIAS(S_FIXED(CLAMP(state->lod_bias, -16, 16), 8)) |
-                         S_008F38_XY_MAG_FILTER(si_tex_filter(state->mag_img_filter)) |
-                         S_008F38_XY_MIN_FILTER(si_tex_filter(state->min_img_filter)) |
+                         S_008F38_XY_MAG_FILTER(si_tex_filter(state->mag_img_filter) | aniso_flag_offset) |
+                         S_008F38_XY_MIN_FILTER(si_tex_filter(state->min_img_filter) | aniso_flag_offset) |
                          S_008F38_MIP_FILTER(si_tex_mipfilter(state->min_mip_filter)));
        rstate->val[3] = S_008F3C_BORDER_COLOR_TYPE(border_color_type);
 
@@ -2767,7 +2818,7 @@ static void si_bind_vs_sampler_states(struct pipe_context *ctx, unsigned count,
        si_set_sampler_states(sctx, pm4, count, states,
                              &sctx->samplers[PIPE_SHADER_VERTEX],
                              R_00B130_SPI_SHADER_USER_DATA_VS_0);
-#if HAVE_LLVM >= 0x0305
+#if LLVM_SUPPORTS_GEOM_SHADERS
        si_set_sampler_states(sctx, pm4, count, states,
                              &sctx->samplers[PIPE_SHADER_VERTEX],
                              R_00B330_SPI_SHADER_USER_DATA_ES_0);
@@ -2960,7 +3011,7 @@ void si_init_state_functions(struct si_context *sctx)
 {
        int i;
 
-       si_init_atom(&sctx->framebuffer.atom, &sctx->atoms.framebuffer, si_emit_framebuffer_state, 0);
+       si_init_atom(&sctx->framebuffer.atom, &sctx->atoms.s.framebuffer, si_emit_framebuffer_state, 0);
 
        sctx->b.b.create_blend_state = si_create_blend_state;
        sctx->b.b.bind_blend_state = si_bind_blend_state;
@@ -2999,7 +3050,7 @@ void si_init_state_functions(struct si_context *sctx)
        sctx->b.b.bind_fs_state = si_bind_ps_shader;
        sctx->b.b.delete_vs_state = si_delete_vs_shader;
        sctx->b.b.delete_fs_state = si_delete_ps_shader;
-#if HAVE_LLVM >= 0x0305
+#if LLVM_SUPPORTS_GEOM_SHADERS
        sctx->b.b.create_gs_state = si_create_gs_state;
        sctx->b.b.bind_gs_state = si_bind_gs_shader;
        sctx->b.b.delete_gs_state = si_delete_gs_shader;
@@ -3023,6 +3074,8 @@ void si_init_state_functions(struct si_context *sctx)
 
        sctx->b.b.texture_barrier = si_texture_barrier;
        sctx->b.b.set_polygon_stipple = si_set_polygon_stipple;
+       sctx->b.b.set_min_samples = si_set_min_samples;
+
        sctx->b.dma_copy = si_dma_copy;
        sctx->b.set_occlusion_query_state = si_set_occlusion_query_state;
        sctx->b.need_gfx_cs_space = si_need_gfx_cs_space;
@@ -3039,8 +3092,6 @@ void si_init_config(struct si_context *sctx)
 
        si_cmd_context_control(pm4);
 
-       si_pm4_set_reg(pm4, R_028A4C_PA_SC_MODE_CNTL_1, 0x0);
-
        si_pm4_set_reg(pm4, R_028A10_VGT_OUTPUT_PATH_CNTL, 0x0);
        si_pm4_set_reg(pm4, R_028A14_VGT_HOS_CNTL, 0x0);
        si_pm4_set_reg(pm4, R_028A18_VGT_HOS_MAX_TESS_LEVEL, 0x0);