radeonsi: remove redundant si_shader_info::writes_memory

[mesa.git] / src / gallium / drivers / radeonsi / si_state_shaders.c

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 400b0de6cc6e9ffb08796bc8eb54c22bb4960434..61535c133f596bce5efb574cffd629d600d7f521 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -72,7 +72,7 @@ void si_get_ir_cache_key(struct si_shader_selector *sel, bool ngg, bool es,
       shader_variant_flags |= 1 << 1;
    if (si_get_wave_size(sel->screen, sel->info.stage, ngg, es, false, false) == 32)
       shader_variant_flags |= 1 << 2;
-   if (sel->info.stage == MESA_SHADER_FRAGMENT && sel->info.uses_derivatives && sel->info.uses_kill &&
+   if (sel->info.stage == MESA_SHADER_FRAGMENT && sel->info.uses_derivatives && sel->info.base.fs.uses_discard &&
        sel->screen->debug_flags & DBG(FS_CORRECT_DERIVS_AFTER_KILL))
       shader_variant_flags |= 1 << 3;
 
@@ -1616,7 +1616,7 @@ static void si_shader_ps(struct si_screen *sscreen, struct si_shader *shader)
     * the color and Z formats to SPI_SHADER_ZERO. The hw will skip export
     * instructions if any are present.
     */
-   if ((sscreen->info.chip_class <= GFX9 || info->uses_kill ||
+   if ((sscreen->info.chip_class <= GFX9 || info->base.fs.uses_discard ||
         shader->key.part.ps.epilog.alpha_func != PIPE_FUNC_ALWAYS) &&
        !spi_shader_col_format && !info->writes_z && !info->writes_stencil &&
        !info->writes_samplemask)
@@ -1756,14 +1756,14 @@ static void si_shader_selector_key_hw_vs(struct si_context *sctx, struct si_shad
    /* Find out if PS is disabled. */
    bool ps_disabled = true;
    if (ps) {
-      bool ps_modifies_zs = ps->info.uses_kill || ps->info.writes_z || ps->info.writes_stencil ||
+      bool ps_modifies_zs = ps->info.base.fs.uses_discard || ps->info.writes_z || ps->info.writes_stencil ||
                             ps->info.writes_samplemask ||
                             sctx->queued.named.blend->alpha_to_coverage ||
                             si_get_alpha_test_func(sctx) != PIPE_FUNC_ALWAYS;
       unsigned ps_colormask = si_get_total_colormask(sctx);
 
       ps_disabled = sctx->queued.named.rasterizer->rasterizer_discard ||
-                    (!ps_colormask && !ps_modifies_zs && !ps->info.writes_memory);
+                    (!ps_colormask && !ps_modifies_zs && !ps->info.base.writes_memory);
    }
 
    /* Find out which VS outputs aren't used by the PS. */
@@ -2623,7 +2623,7 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
 
    sel->prim_discard_cs_allowed =
       sel->info.stage == MESA_SHADER_VERTEX && !sel->info.uses_bindless_images &&
-      !sel->info.uses_bindless_samplers && !sel->info.writes_memory &&
+      !sel->info.uses_bindless_samplers && !sel->info.base.writes_memory &&
       !sel->info.writes_viewport_index &&
       !sel->info.base.vs.window_space_position && !sel->so.num_outputs;
 
@@ -2745,7 +2745,7 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
          sscreen->always_use_ngg_culling_tess))) &&
       sel->info.writes_position &&
       !sel->info.writes_viewport_index && /* cull only against viewport 0 */
-      !sel->info.writes_memory && !sel->so.num_outputs &&
+      !sel->info.base.writes_memory && !sel->so.num_outputs &&
       (sel->info.stage != MESA_SHADER_VERTEX ||
        (!sel->info.base.vs.blit_sgprs_amd &&
         !sel->info.base.vs.window_space_position));
@@ -2763,7 +2763,7 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
    sel->db_shader_control = S_02880C_Z_EXPORT_ENABLE(sel->info.writes_z) |
                             S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(sel->info.writes_stencil) |
                             S_02880C_MASK_EXPORT_ENABLE(sel->info.writes_samplemask) |
-                            S_02880C_KILL_ENABLE(sel->info.uses_kill);
+                            S_02880C_KILL_ENABLE(sel->info.base.fs.uses_discard);
 
    if (sel->info.stage == MESA_SHADER_FRAGMENT) {
       switch (sel->info.base.fs.depth_layout) {
@@ -2798,8 +2798,8 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
          /* Cases 3, 4. */
          sel->db_shader_control |= S_02880C_DEPTH_BEFORE_SHADER(1) |
                                    S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z) |
-                                   S_02880C_EXEC_ON_NOOP(sel->info.writes_memory);
-      } else if (sel->info.writes_memory) {
+                                   S_02880C_EXEC_ON_NOOP(sel->info.base.writes_memory);
+      } else if (sel->info.base.writes_memory) {
          /* Case 2. */
          sel->db_shader_control |= S_02880C_Z_ORDER(V_02880C_LATE_Z) | S_02880C_EXEC_ON_HIER_FAIL(1);
       } else {
@@ -3058,7 +3058,7 @@ static void si_bind_ps_shader(struct pipe_context *ctx, void *state)
          si_mark_atom_dirty(sctx, &sctx->atoms.s.cb_render_state);
 
       if (sctx->screen->has_out_of_order_rast &&
-          (!old_sel || old_sel->info.writes_memory != sel->info.writes_memory ||
+          (!old_sel || old_sel->info.base.writes_memory != sel->info.base.writes_memory ||
            old_sel->info.base.fs.early_fragment_tests !=
               sel->info.base.fs.early_fragment_tests))
          si_mark_atom_dirty(sctx, &sctx->atoms.s.msaa_config);