shader_variant_flags |= 1 << 1;
if (si_get_wave_size(sel->screen, sel->info.stage, ngg, es, false, false) == 32)
shader_variant_flags |= 1 << 2;
- if (sel->info.stage == MESA_SHADER_FRAGMENT && sel->info.uses_derivatives && sel->info.uses_kill &&
+ if (sel->info.stage == MESA_SHADER_FRAGMENT && sel->info.uses_derivatives && sel->info.base.fs.uses_discard &&
sel->screen->debug_flags & DBG(FS_CORRECT_DERIVS_AFTER_KILL))
shader_variant_flags |= 1 << 3;
* the color and Z formats to SPI_SHADER_ZERO. The hw will skip export
* instructions if any are present.
*/
- if ((sscreen->info.chip_class <= GFX9 || info->uses_kill ||
+ if ((sscreen->info.chip_class <= GFX9 || info->base.fs.uses_discard ||
shader->key.part.ps.epilog.alpha_func != PIPE_FUNC_ALWAYS) &&
!spi_shader_col_format && !info->writes_z && !info->writes_stencil &&
!info->writes_samplemask)
struct si_shader_selector *ps = sctx->ps_shader.cso;
key->opt.clip_disable = sctx->queued.named.rasterizer->clip_plane_enable == 0 &&
- (vs->info.clipdist_writemask || vs->info.writes_clipvertex) &&
- !vs->info.culldist_writemask;
+ (vs->info.base.clip_distance_array_size || vs->info.writes_clipvertex) &&
+ !vs->info.base.cull_distance_array_size;
/* Find out if PS is disabled. */
bool ps_disabled = true;
if (ps) {
- bool ps_modifies_zs = ps->info.uses_kill || ps->info.writes_z || ps->info.writes_stencil ||
+ bool ps_modifies_zs = ps->info.base.fs.uses_discard || ps->info.writes_z || ps->info.writes_stencil ||
ps->info.writes_samplemask ||
sctx->queued.named.blend->alpha_to_coverage ||
si_get_alpha_test_func(sctx) != PIPE_FUNC_ALWAYS;
sel->info.uses_linear_sample >
1;
- if (sel->info.uses_persp_opcode_interp_sample ||
- sel->info.uses_linear_opcode_interp_sample)
+ if (sel->info.uses_interp_at_sample)
key->mono.u.ps.interpolate_at_sample_force_center = 1;
}
unsigned start, num_shaderbufs, num_constbufs, num_images, num_msaa_images, num_samplers;
num_shaderbufs = info->base.num_ssbos;
- num_constbufs = util_last_bit(info->const_buffers_declared);
+ num_constbufs = info->base.num_ubos;
/* two 8-byte images share one 16-byte slot */
num_images = align(info->base.num_images, 2);
num_msaa_images = align(util_last_bit(info->base.msaa_images), 2);
if (sctx->chip_class <= GFX9)
sel->pa_cl_vs_out_cntl = si_get_vs_out_cntl(sel, false);
- sel->clipdist_mask = sel->info.writes_clipvertex ? SIX_BITS : sel->info.clipdist_writemask;
- sel->culldist_mask = sel->info.culldist_writemask << sel->info.num_written_clipdistance;
+ sel->clipdist_mask = sel->info.writes_clipvertex ? SIX_BITS :
+ u_bit_consecutive(0, sel->info.base.clip_distance_array_size);
+ sel->culldist_mask = u_bit_consecutive(0, sel->info.base.cull_distance_array_size) <<
+ sel->info.base.clip_distance_array_size;
/* DB_SHADER_CONTROL */
sel->db_shader_control = S_02880C_Z_EXPORT_ENABLE(sel->info.writes_z) |
S_02880C_STENCIL_TEST_VAL_EXPORT_ENABLE(sel->info.writes_stencil) |
S_02880C_MASK_EXPORT_ENABLE(sel->info.writes_samplemask) |
- S_02880C_KILL_ENABLE(sel->info.uses_kill);
+ S_02880C_KILL_ENABLE(sel->info.base.fs.uses_discard);
if (sel->info.stage == MESA_SHADER_FRAGMENT) {
switch (sel->info.base.fs.depth_layout) {