r600/radeonsi: silence zero-length-bounds gcc warnings
[mesa.git] / src / gallium / drivers / radeonsi / si_uvd.c
index 0ba3b125351a8c073603bc43498288d6dbf2a50c..0f38cce0f9603bcc0dd8ccc32554d8e7c5358b0e 100644 (file)
  *
  **************************************************************************/
 
-/*
- * Authors:
- *      Christian König <christian.koenig@amd.com>
- *
- */
-
-#include "si_pipe.h"
-#include "radeon/radeon_video.h"
 #include "radeon/radeon_uvd.h"
+#include "radeon/radeon_uvd_enc.h"
 #include "radeon/radeon_vce.h"
+#include "radeon/radeon_vcn_dec.h"
+#include "radeon/radeon_vcn_enc.h"
+#include "radeon/radeon_video.h"
+#include "si_pipe.h"
+#include "util/u_video.h"
 
 /**
  * creates an video buffer with an UVD compatible memory layout
  */
 struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe,
-                                                const struct pipe_video_buffer *tmpl)
+                                                 const struct pipe_video_buffer *tmpl)
 {
-       struct si_context *ctx = (struct si_context *)pipe;
-       struct r600_texture *resources[VL_NUM_COMPONENTS] = {};
-       struct radeon_surface *surfaces[VL_NUM_COMPONENTS] = {};
-       struct pb_buffer **pbs[VL_NUM_COMPONENTS] = {};
-       const enum pipe_format *resource_formats;
-       struct pipe_video_buffer template;
-       struct pipe_resource templ;
-       unsigned i, array_size;
-
-       assert(pipe);
-
-       /* first create the needed resources as "normal" textures */
-       resource_formats = vl_video_buffer_formats(pipe->screen, tmpl->buffer_format);
-       if (!resource_formats)
-               return NULL;
-
-       array_size = tmpl->interlaced ? 2 : 1;
-       template = *tmpl;
-       template.width = align(tmpl->width, VL_MACROBLOCK_WIDTH);
-       template.height = align(tmpl->height / array_size, VL_MACROBLOCK_HEIGHT);
-
-       vl_video_buffer_template(&templ, &template, resource_formats[0], 1, array_size, PIPE_USAGE_DEFAULT, 0);
-       /* TODO: get tiling working */
-       templ.bind = PIPE_BIND_LINEAR;
-       resources[0] = (struct r600_texture *)
-               pipe->screen->resource_create(pipe->screen, &templ);
-       if (!resources[0])
-               goto error;
+   struct pipe_video_buffer vidbuf = *tmpl;
+   /* TODO: get tiling working */
+   vidbuf.bind |= PIPE_BIND_LINEAR;
 
-       if (resource_formats[1] != PIPE_FORMAT_NONE) {
-               vl_video_buffer_template(&templ, &template, resource_formats[1], 1, array_size, PIPE_USAGE_DEFAULT, 1);
-               templ.bind = PIPE_BIND_LINEAR;
-               resources[1] = (struct r600_texture *)
-                       pipe->screen->resource_create(pipe->screen, &templ);
-               if (!resources[1])
-                       goto error;
-       }
-
-       if (resource_formats[2] != PIPE_FORMAT_NONE) {
-               vl_video_buffer_template(&templ, &template, resource_formats[2], 1, array_size, PIPE_USAGE_DEFAULT, 2);
-               templ.bind = PIPE_BIND_LINEAR;
-               resources[2] = (struct r600_texture *)
-                       pipe->screen->resource_create(pipe->screen, &templ);
-               if (!resources[2])
-                       goto error;
-       }
-
-       for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
-               if (!resources[i])
-                       continue;
-
-               surfaces[i] = & resources[i]->surface;
-               pbs[i] = &resources[i]->resource.buf;
-       }
-
-       rvid_join_surfaces(ctx->b.ws, templ.bind, pbs, surfaces);
-
-       for (i = 0; i < VL_NUM_COMPONENTS; ++i) {
-               if (!resources[i])
-                       continue;
-
-               /* recreate the CS handle */
-               resources[i]->resource.cs_buf = ctx->b.ws->buffer_get_cs_handle(
-                       resources[i]->resource.buf);
-               resources[i]->resource.gpu_address = ctx->b.ws->buffer_get_virtual_address(
-                       resources[i]->resource.cs_buf);
-       }
-
-       template.height *= array_size;
-       return vl_video_buffer_create_ex2(pipe, &template, (struct pipe_resource **)resources);
-
-error:
-       for (i = 0; i < VL_NUM_COMPONENTS; ++i)
-               pipe_resource_reference((struct pipe_resource **)&resources[i], NULL);
-
-       return NULL;
+   return vl_video_buffer_create_as_resource(pipe, &vidbuf);
 }
 
 /* set the decoding target buffer offsets */
-static struct radeon_winsys_cs_handle* si_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf)
+static struct pb_buffer *si_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf)
 {
-       struct r600_texture *luma = (struct r600_texture *)buf->resources[0];
-       struct r600_texture *chroma = (struct r600_texture *)buf->resources[1];
+   struct si_screen *sscreen = (struct si_screen *)buf->base.context->screen;
+   struct si_texture *luma = (struct si_texture *)buf->resources[0];
+   struct si_texture *chroma = (struct si_texture *)buf->resources[1];
+   enum ruvd_surface_type type =
+      (sscreen->info.chip_class >= GFX9) ? RUVD_SURFACE_TYPE_GFX9 : RUVD_SURFACE_TYPE_LEGACY;
 
-       msg->body.decode.dt_field_mode = buf->base.interlaced;
+   msg->body.decode.dt_field_mode = buf->base.interlaced;
 
-       ruvd_set_dt_surfaces(msg, &luma->surface, &chroma->surface);
+   si_uvd_set_dt_surfaces(msg, &luma->surface, (chroma) ? &chroma->surface : NULL, type);
 
-       return luma->resource.cs_buf;
+   return luma->buffer.buf;
 }
 
 /* get the radeon resources for VCE */
-static void si_vce_get_buffer(struct pipe_resource *resource,
-                             struct radeon_winsys_cs_handle **handle,
-                             struct radeon_surface **surface)
+static void si_vce_get_buffer(struct pipe_resource *resource, struct pb_buffer **handle,
+                              struct radeon_surf **surface)
 {
-       struct r600_texture *res = (struct r600_texture *)resource;
+   struct si_texture *res = (struct si_texture *)resource;
 
-       if (handle)
-               *handle = res->resource.cs_buf;
+   if (handle)
+      *handle = res->buffer.buf;
 
-       if (surface)
-               *surface = &res->surface;
+   if (surface)
+      *surface = &res->surface;
 }
 
 /**
  * creates an UVD compatible decoder
  */
 struct pipe_video_codec *si_uvd_create_decoder(struct pipe_context *context,
-                                              const struct pipe_video_codec *templ)
+                                               const struct pipe_video_codec *templ)
 {
-       struct si_context *ctx = (struct si_context *)context;
-
-        if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE)
-                return rvce_create_encoder(context, templ, ctx->b.ws, si_vce_get_buffer);
-
-       return ruvd_create_decoder(context, templ, si_uvd_set_dtb);
+   struct si_context *ctx = (struct si_context *)context;
+   bool vcn = ctx->family >= CHIP_RAVEN;
+
+   if (templ->entrypoint == PIPE_VIDEO_ENTRYPOINT_ENCODE) {
+      if (vcn) {
+         return radeon_create_encoder(context, templ, ctx->ws, si_vce_get_buffer);
+      } else {
+         if (u_reduce_video_profile(templ->profile) == PIPE_VIDEO_FORMAT_HEVC)
+            return radeon_uvd_create_encoder(context, templ, ctx->ws, si_vce_get_buffer);
+         else
+            return si_vce_create_encoder(context, templ, ctx->ws, si_vce_get_buffer);
+      }
+   }
+
+   return (vcn) ? radeon_create_decoder(context, templ)
+                : si_common_uvd_create_decoder(context, templ, si_uvd_set_dtb);
 }