/**************************************************************************
*
- * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * Copyright 2007 VMware, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "pipe/p_compiler.h"
+#include "sp_limits.h"
struct softpipe_context;
/**
* Cache tile size (width and height). This needs to be a power of two.
*/
-#define TILE_SIZE 64
+#define TEX_TILE_SIZE_LOG2 5
+#define TEX_TILE_SIZE (1 << TEX_TILE_SIZE_LOG2)
-/* If we need to support > 4096, just expand this to be a 64 bit
- * union, or consider tiling in Z as well.
+#define TEX_ADDR_BITS (SP_MAX_TEXTURE_2D_LEVELS - 1 - TEX_TILE_SIZE_LOG2)
+#define TEX_Z_BITS (SP_MAX_TEXTURE_2D_LEVELS - 1)
+
+/**
+ * Texture tile address as a union for fast compares.
*/
union tex_tile_address {
struct {
- unsigned x:6; /* 4096 / TILE_SIZE */
- unsigned y:6; /* 4096 / TILE_SIZE */
- unsigned z:12; /* 4096 -- z not tiled */
+ unsigned x:TEX_ADDR_BITS; /* 16K / TILE_SIZE */
+ unsigned y:TEX_ADDR_BITS; /* 16K / TILE_SIZE */
+ unsigned z:TEX_Z_BITS; /* 16K -- z not tiled */
unsigned face:3;
unsigned level:4;
unsigned invalid:1;
} bits;
- unsigned value;
+ uint64_t value;
};
{
union tex_tile_address addr;
union {
- float color[TILE_SIZE][TILE_SIZE][4];
+ float color[TEX_TILE_SIZE][TEX_TILE_SIZE][4];
+ unsigned int colorui[TEX_TILE_SIZE][TEX_TILE_SIZE][4];
+ int colori[TEX_TILE_SIZE][TEX_TILE_SIZE][4];
} data;
};
-#define NUM_ENTRIES 50
+/*
+ * The number of cache entries.
+ * Should not be decreased to lower than 16, and even that
+ * seems too low to avoid cache thrashing in some cases (because
+ * the cache is direct mapped, see tex_cache_pos() function).
+ */
+#define NUM_TEX_TILE_ENTRIES 16
struct softpipe_tex_tile_cache
{
- struct pipe_screen *screen;
+ struct pipe_context *pipe;
struct pipe_transfer *transfer;
void *transfer_map;
- struct pipe_texture *texture; /**< if caching a texture */
+ struct pipe_resource *texture; /**< if caching a texture */
unsigned timestamp;
- struct softpipe_tex_cached_tile entries[NUM_ENTRIES];
+ struct softpipe_tex_cached_tile entries[NUM_TEX_TILE_ENTRIES];
struct pipe_transfer *tex_trans;
void *tex_trans_map;
int tex_face, tex_level, tex_z;
+ unsigned swizzle_r;
+ unsigned swizzle_g;
+ unsigned swizzle_b;
+ unsigned swizzle_a;
+ enum pipe_format format;
+
struct softpipe_tex_cached_tile *last_tile; /**< most recently retrieved tile */
};
extern struct softpipe_tex_tile_cache *
-sp_create_tex_tile_cache( struct pipe_screen *screen );
+sp_create_tex_tile_cache( struct pipe_context *pipe );
extern void
sp_destroy_tex_tile_cache(struct softpipe_tex_tile_cache *tc);
-
-extern void
-sp_tex_tile_cache_map_transfers(struct softpipe_tex_tile_cache *tc);
-
extern void
-sp_tex_tile_cache_unmap_transfers(struct softpipe_tex_tile_cache *tc);
-
-extern void
-sp_tex_tile_cache_set_texture(struct softpipe_tex_tile_cache *tc,
- struct pipe_texture *texture);
+sp_tex_tile_cache_set_sampler_view(struct softpipe_tex_tile_cache *tc,
+ struct pipe_sampler_view *view);
void
sp_tex_tile_cache_validate_texture(struct softpipe_tex_tile_cache *tc);
extern const struct softpipe_tex_cached_tile *
sp_find_cached_tile_tex(struct softpipe_tex_tile_cache *tc,
- union tex_tile_address addr );
+ union tex_tile_address addr );
static INLINE union tex_tile_address
tex_tile_address( unsigned x,
- unsigned y,
- unsigned z,
- unsigned face,
- unsigned level )
+ unsigned y,
+ unsigned z,
+ unsigned face,
+ unsigned level )
{
union tex_tile_address addr;
addr.value = 0;
- addr.bits.x = x / TILE_SIZE;
- addr.bits.y = y / TILE_SIZE;
+ addr.bits.x = x / TEX_TILE_SIZE;
+ addr.bits.y = y / TEX_TILE_SIZE;
addr.bits.z = z;
addr.bits.face = face;
addr.bits.level = level;
-
+
return addr;
}
*/
static INLINE const struct softpipe_tex_cached_tile *
sp_get_cached_tile_tex(struct softpipe_tex_tile_cache *tc,
- union tex_tile_address addr )
+ union tex_tile_address addr )
{
if (tc->last_tile->addr.value == addr.value)
return tc->last_tile;
}
-
-
-
#endif /* SP_TEX_TILE_CACHE_H */
projects / mesa.git / blobdiff