struct svga_winsys_buffer *buf;
/* Just try */
- buf = sws->buffer_create(sws, alignment, usage, size);
+ buf = SVGA_TRY_PTR(sws->buffer_create(sws, alignment, usage, size));
if (!buf) {
SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "flushing context to find %d bytes GMR\n",
size);
/* Try flushing all pending DMAs */
+ svga_retry_enter(svga);
svga_context_flush(svga, NULL);
buf = sws->buffer_create(sws, alignment, usage, size);
+ svga_retry_exit(svga);
}
return buf;
{
struct svga_winsys_screen *sws = ss->sws;
- assert(!sbuf->map.count);
+ assert(sbuf->map.count == 0);
assert(sbuf->hwbuf);
if (sbuf->hwbuf) {
sws->buffer_destroy(sws, sbuf->hwbuf);
*/
enum pipe_error
svga_buffer_create_hw_storage(struct svga_screen *ss,
- struct svga_buffer *sbuf)
+ struct svga_buffer *sbuf,
+ unsigned bind_flags)
{
assert(!sbuf->user);
if (ss->sws->have_gb_objects) {
assert(sbuf->handle || !sbuf->dma.pending);
- return svga_buffer_create_host_surface(ss, sbuf);
+ return svga_buffer_create_host_surface(ss, sbuf, bind_flags);
}
if (!sbuf->hwbuf) {
struct svga_winsys_screen *sws = ss->sws;
}
-
+/**
+ * Allocate graphics memory for vertex/index/constant/etc buffer (not
+ * textures).
+ */
enum pipe_error
svga_buffer_create_host_surface(struct svga_screen *ss,
- struct svga_buffer *sbuf)
+ struct svga_buffer *sbuf,
+ unsigned bind_flags)
{
+ enum pipe_error ret = PIPE_OK;
+
assert(!sbuf->user);
if (!sbuf->handle) {
+ boolean validated;
+
sbuf->key.flags = 0;
sbuf->key.format = SVGA3D_BUFFER;
- if (sbuf->bind_flags & PIPE_BIND_VERTEX_BUFFER) {
+ if (bind_flags & PIPE_BIND_VERTEX_BUFFER) {
sbuf->key.flags |= SVGA3D_SURFACE_HINT_VERTEXBUFFER;
sbuf->key.flags |= SVGA3D_SURFACE_BIND_VERTEX_BUFFER;
}
- if (sbuf->bind_flags & PIPE_BIND_INDEX_BUFFER) {
+ if (bind_flags & PIPE_BIND_INDEX_BUFFER) {
sbuf->key.flags |= SVGA3D_SURFACE_HINT_INDEXBUFFER;
sbuf->key.flags |= SVGA3D_SURFACE_BIND_INDEX_BUFFER;
}
- if (sbuf->bind_flags & PIPE_BIND_CONSTANT_BUFFER)
+ if (bind_flags & PIPE_BIND_CONSTANT_BUFFER)
sbuf->key.flags |= SVGA3D_SURFACE_BIND_CONSTANT_BUFFER;
- if (sbuf->bind_flags & PIPE_BIND_STREAM_OUTPUT)
+ if (bind_flags & PIPE_BIND_STREAM_OUTPUT)
sbuf->key.flags |= SVGA3D_SURFACE_BIND_STREAM_OUTPUT;
- if (sbuf->bind_flags & PIPE_BIND_SAMPLER_VIEW)
+ if (bind_flags & PIPE_BIND_SAMPLER_VIEW)
sbuf->key.flags |= SVGA3D_SURFACE_BIND_SHADER_RESOURCE;
+ if (bind_flags & PIPE_BIND_COMMAND_ARGS_BUFFER) {
+ assert(ss->sws->have_sm5);
+ sbuf->key.flags |= SVGA3D_SURFACE_DRAWINDIRECT_ARGS;
+ }
+
+ if (!bind_flags && sbuf->b.b.usage == PIPE_USAGE_STAGING) {
+ /* This surface is to be used with the
+ * SVGA3D_CMD_DX_TRANSFER_FROM_BUFFER command, and no other
+ * bind flags are allowed to be set for this surface.
+ */
+ sbuf->key.flags = SVGA3D_SURFACE_TRANSFER_FROM_BUFFER;
+ }
+
+ if (sbuf->b.b.flags & PIPE_RESOURCE_FLAG_MAP_PERSISTENT) {
+ /* This surface can be mapped persistently. We use
+ * coherent memory to avoid implementing memory barriers for
+ * persistent non-coherent memory for now.
+ */
+ sbuf->key.coherent = 1;
+ }
+
sbuf->key.size.width = sbuf->b.b.width0;
sbuf->key.size.height = 1;
sbuf->key.size.depth = 1;
sbuf->key.numMipLevels = 1;
sbuf->key.cachable = 1;
sbuf->key.arraySize = 1;
+ sbuf->key.sampleCount = 0;
- SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n", sbuf->b.b.width0);
+ SVGA_DBG(DEBUG_DMA, "surface_create for buffer sz %d\n",
+ sbuf->b.b.width0);
- sbuf->handle = svga_screen_surface_create(ss, sbuf->b.b.bind,
- sbuf->b.b.usage, &sbuf->key);
+ sbuf->handle = svga_screen_surface_create(ss, bind_flags,
+ sbuf->b.b.usage,
+ &validated, &sbuf->key);
if (!sbuf->handle)
return PIPE_ERROR_OUT_OF_MEMORY;
*/
sbuf->dma.flags.discard = TRUE;
- SVGA_DBG(DEBUG_DMA, " --> got sid %p sz %d (buffer)\n", sbuf->handle, sbuf->b.b.width0);
+ SVGA_DBG(DEBUG_DMA, " --> got sid %p sz %d (buffer)\n",
+ sbuf->handle, sbuf->b.b.width0);
+
+ /* Add the new surface to the buffer surface list */
+ ret = svga_buffer_add_host_surface(sbuf, sbuf->handle, &sbuf->key,
+ bind_flags);
+
+ if (ss->sws->have_gb_objects) {
+ /* Initialize the surface with zero */
+ ss->sws->surface_init(ss->sws, sbuf->handle, svga_surface_size(&sbuf->key),
+ sbuf->key.flags);
+ }
+ }
+
+ return ret;
+}
+
+
+/**
+ * Recreates a host surface with the new bind flags.
+ */
+enum pipe_error
+svga_buffer_recreate_host_surface(struct svga_context *svga,
+ struct svga_buffer *sbuf,
+ unsigned bind_flags)
+{
+ enum pipe_error ret = PIPE_OK;
+ struct svga_winsys_surface *old_handle = sbuf->handle;
+
+ assert(sbuf->bind_flags != bind_flags);
+ assert(old_handle);
+
+ sbuf->handle = NULL;
+
+ /* Create a new resource with the requested bind_flags */
+ ret = svga_buffer_create_host_surface(svga_screen(svga->pipe.screen),
+ sbuf, bind_flags);
+ if (ret == PIPE_OK) {
+ /* Copy the surface data */
+ assert(sbuf->handle);
+ SVGA_RETRY(svga, SVGA3D_vgpu10_BufferCopy(svga->swc, old_handle,
+ sbuf->handle,
+ 0, 0, sbuf->b.b.width0));
}
+ /* Set the new bind flags for this buffer resource */
+ sbuf->bind_flags = bind_flags;
+
+ return ret;
+}
+
+
+/**
+ * Returns TRUE if the surface bind flags is compatible with the new bind flags.
+ */
+static boolean
+compatible_bind_flags(unsigned bind_flags,
+ unsigned tobind_flags)
+{
+ if ((bind_flags & tobind_flags) == tobind_flags)
+ return TRUE;
+ else if ((bind_flags|tobind_flags) & PIPE_BIND_CONSTANT_BUFFER)
+ return FALSE;
+ else
+ return TRUE;
+}
+
+
+/**
+ * Returns a buffer surface from the surface list
+ * that has the requested bind flags or its existing bind flags
+ * can be promoted to include the new bind flags.
+ */
+static struct svga_buffer_surface *
+svga_buffer_get_host_surface(struct svga_buffer *sbuf,
+ unsigned bind_flags)
+{
+ struct svga_buffer_surface *bufsurf;
+
+ LIST_FOR_EACH_ENTRY(bufsurf, &sbuf->surfaces, list) {
+ if (compatible_bind_flags(bufsurf->bind_flags, bind_flags))
+ return bufsurf;
+ }
+ return NULL;
+}
+
+
+/**
+ * Adds the host surface to the buffer surface list.
+ */
+enum pipe_error
+svga_buffer_add_host_surface(struct svga_buffer *sbuf,
+ struct svga_winsys_surface *handle,
+ struct svga_host_surface_cache_key *key,
+ unsigned bind_flags)
+{
+ struct svga_buffer_surface *bufsurf;
+
+ bufsurf = CALLOC_STRUCT(svga_buffer_surface);
+ if (!bufsurf)
+ return PIPE_ERROR_OUT_OF_MEMORY;
+
+ bufsurf->bind_flags = bind_flags;
+ bufsurf->handle = handle;
+ bufsurf->key = *key;
+
+ /* add the surface to the surface list */
+ list_add(&bufsurf->list, &sbuf->surfaces);
+
+ /* Set the new bind flags for this buffer resource */
+ sbuf->bind_flags = bind_flags;
+
return PIPE_OK;
}
+/**
+ * Start using the specified surface for this buffer resource.
+ */
+void
+svga_buffer_bind_host_surface(struct svga_context *svga,
+ struct svga_buffer *sbuf,
+ struct svga_buffer_surface *bufsurf)
+{
+ /* Update the to-bind surface */
+ assert(bufsurf->handle);
+ assert(sbuf->handle);
+
+ /* If we are switching from stream output to other buffer,
+ * make sure to copy the buffer content.
+ */
+ if (sbuf->bind_flags & PIPE_BIND_STREAM_OUTPUT) {
+ SVGA_RETRY(svga, SVGA3D_vgpu10_BufferCopy(svga->swc, sbuf->handle,
+ bufsurf->handle,
+ 0, 0, sbuf->b.b.width0));
+ }
+
+ /* Set this surface as the current one */
+ sbuf->handle = bufsurf->handle;
+ sbuf->key = bufsurf->key;
+ sbuf->bind_flags = bufsurf->bind_flags;
+}
+
+
+/**
+ * Prepare a host surface that can be used as indicated in the
+ * tobind_flags. If the existing host surface is not created
+ * with the necessary binding flags and if the new bind flags can be
+ * combined with the existing bind flags, then we will recreate a
+ * new surface with the combined bind flags. Otherwise, we will create
+ * a surface for that incompatible bind flags.
+ * For example, if a stream output buffer is reused as a constant buffer,
+ * since constant buffer surface cannot be bound as a stream output surface,
+ * two surfaces will be created, one for stream output,
+ * and another one for constant buffer.
+ */
+enum pipe_error
+svga_buffer_validate_host_surface(struct svga_context *svga,
+ struct svga_buffer *sbuf,
+ unsigned tobind_flags)
+{
+ struct svga_buffer_surface *bufsurf;
+ enum pipe_error ret = PIPE_OK;
+
+ /* Flush any pending upload first */
+ svga_buffer_upload_flush(svga, sbuf);
+
+ /* First check from the cached buffer surface list to see if there is
+ * already a buffer surface that has the requested bind flags, or
+ * surface with compatible bind flags that can be promoted.
+ */
+ bufsurf = svga_buffer_get_host_surface(sbuf, tobind_flags);
+
+ if (bufsurf) {
+ if ((bufsurf->bind_flags & tobind_flags) == tobind_flags) {
+ /* there is a surface with the requested bind flags */
+ svga_buffer_bind_host_surface(svga, sbuf, bufsurf);
+ } else {
+
+ /* Recreate a host surface with the combined bind flags */
+ ret = svga_buffer_recreate_host_surface(svga, sbuf,
+ bufsurf->bind_flags |
+ tobind_flags);
+
+ /* Destroy the old surface */
+ svga_screen_surface_destroy(svga_screen(sbuf->b.b.screen),
+ &bufsurf->key, &bufsurf->handle);
+
+ list_del(&bufsurf->list);
+ FREE(bufsurf);
+ }
+ } else {
+ /* Need to create a new surface if the bind flags are incompatible,
+ * such as constant buffer surface & stream output surface.
+ */
+ ret = svga_buffer_recreate_host_surface(svga, sbuf,
+ tobind_flags);
+ }
+ return ret;
+}
+
+
void
svga_buffer_destroy_host_surface(struct svga_screen *ss,
struct svga_buffer *sbuf)
{
- if (sbuf->handle) {
- SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n", sbuf->handle, sbuf->b.b.width0);
- svga_screen_surface_destroy(ss, &sbuf->key, &sbuf->handle);
+ struct svga_buffer_surface *bufsurf, *next;
+
+ LIST_FOR_EACH_ENTRY_SAFE(bufsurf, next, &sbuf->surfaces, list) {
+ SVGA_DBG(DEBUG_DMA, " ungrab sid %p sz %d\n",
+ bufsurf->handle, sbuf->b.b.width0);
+ svga_screen_surface_destroy(ss, &bufsurf->key, &bufsurf->handle);
+ FREE(bufsurf);
}
}
*/
static enum pipe_error
svga_buffer_upload_gb_command(struct svga_context *svga,
- struct svga_buffer *sbuf)
+ struct svga_buffer *sbuf)
{
struct svga_winsys_context *swc = svga->swc;
SVGA3dCmdUpdateGBImage *update_cmd;
struct svga_3d_update_gb_image *whole_update_cmd = NULL;
- uint32 numBoxes = sbuf->map.num_ranges;
+ const uint32 numBoxes = sbuf->map.num_ranges;
struct pipe_resource *dummy;
- unsigned int i;
+ unsigned i;
+ if (swc->force_coherent || sbuf->key.coherent)
+ return PIPE_OK;
+
+ assert(svga_have_gb_objects(svga));
assert(numBoxes);
assert(sbuf->dma.updates == NULL);
SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
total_commands_size, 1 + numBoxes);
if (!invalidate_cmd)
- return PIPE_ERROR_OUT_OF_MEMORY;
+ return PIPE_ERROR_OUT_OF_MEMORY;
cicmd = container_of(invalidate_cmd, cicmd, body);
cicmd->header.size = sizeof(*invalidate_cmd);
- swc->surface_relocation(swc, &invalidate_cmd->image.sid, NULL, sbuf->handle,
+ swc->surface_relocation(swc, &invalidate_cmd->image.sid, NULL,
+ sbuf->handle,
(SVGA_RELOC_WRITE |
SVGA_RELOC_INTERNAL |
SVGA_RELOC_DMA));
SVGA_3D_CMD_UPDATE_GB_IMAGE,
total_commands_size, numBoxes);
if (!update_cmd)
- return PIPE_ERROR_OUT_OF_MEMORY;
+ return PIPE_ERROR_OUT_OF_MEMORY;
/* The whole_update_command is a SVGA3dCmdHeader plus the
* SVGA3dCmdUpdateGBImage command.
/* Init the first UPDATE_GB_IMAGE command */
whole_update_cmd->header.size = sizeof(*update_cmd);
swc->surface_relocation(swc, &update_cmd->image.sid, NULL, sbuf->handle,
- SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
+ SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
update_cmd->image.face = 0;
update_cmd->image.mipmap = 0;
pipe_resource_reference(&dummy, &sbuf->b.b);
SVGA_FIFOCommitAll(swc);
+ swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
sbuf->dma.flags.discard = FALSE;
+ svga->hud.num_resource_updates++;
+
return PIPE_OK;
}
/**
- * Variant of SVGA3D_BufferDMA which leaves the copy box temporarily in blank.
+ * Issue DMA commands to transfer guest memory to the host.
+ * Note that the memory segments (offset, size) will be patched in
+ * later in the svga_buffer_upload_flush() function.
*/
static enum pipe_error
-svga_buffer_upload_command(struct svga_context *svga,
- struct svga_buffer *sbuf)
+svga_buffer_upload_hb_command(struct svga_context *svga,
+ struct svga_buffer *sbuf)
{
struct svga_winsys_context *swc = svga->swc;
struct svga_winsys_buffer *guest = sbuf->hwbuf;
struct svga_winsys_surface *host = sbuf->handle;
- SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM;
+ const SVGA3dTransferType transfer = SVGA3D_WRITE_HOST_VRAM;
SVGA3dCmdSurfaceDMA *cmd;
- uint32 numBoxes = sbuf->map.num_ranges;
+ const uint32 numBoxes = sbuf->map.num_ranges;
SVGA3dCopyBox *boxes;
SVGA3dCmdSurfaceDMASuffix *pSuffix;
unsigned region_flags;
unsigned surface_flags;
struct pipe_resource *dummy;
- if (svga_have_gb_objects(svga))
- return svga_buffer_upload_gb_command(svga, sbuf);
+ assert(!svga_have_gb_objects(svga));
if (transfer == SVGA3D_WRITE_HOST_VRAM) {
region_flags = SVGA_RELOC_READ;
SVGA_FIFOCommitAll(swc);
+ swc->hints |= SVGA_HINT_FLAG_CAN_PRE_FLUSH;
sbuf->dma.flags.discard = FALSE;
+ svga->hud.num_buffer_uploads++;
+
return PIPE_OK;
}
+/**
+ * Issue commands to transfer guest memory to the host.
+ */
+static enum pipe_error
+svga_buffer_upload_command(struct svga_context *svga, struct svga_buffer *sbuf)
+{
+ if (svga_have_gb_objects(svga)) {
+ return svga_buffer_upload_gb_command(svga, sbuf);
+ } else {
+ return svga_buffer_upload_hb_command(svga, sbuf);
+ }
+}
+
+
/**
* Patch up the upload DMA command reserved by svga_buffer_upload_command
* with the final ranges.
*/
void
-svga_buffer_upload_flush(struct svga_context *svga,
- struct svga_buffer *sbuf)
+svga_buffer_upload_flush(struct svga_context *svga, struct svga_buffer *sbuf)
{
unsigned i;
struct pipe_resource *dummy;
- if (!sbuf->dma.pending) {
+ if (!sbuf->dma.pending || svga->swc->force_coherent ||
+ sbuf->key.coherent) {
//debug_printf("no dma pending on buffer\n");
return;
}
*/
if (svga_have_gb_objects(svga)) {
struct svga_3d_update_gb_image *update = sbuf->dma.updates;
+
assert(update);
for (i = 0; i < sbuf->map.num_ranges; ++i, ++update) {
assert(box->x <= sbuf->b.b.width0);
assert(box->x + box->w <= sbuf->b.b.width0);
+
+ svga->hud.num_bytes_uploaded += box->w;
+ svga->hud.num_buffer_uploads++;
}
}
else {
assert(box->x <= sbuf->b.b.width0);
assert(box->x + box->w <= sbuf->b.b.width0);
+
+ svga->hud.num_bytes_uploaded += box->w;
+ svga->hud.num_buffer_uploads++;
}
}
sbuf->map.num_ranges = 0;
assert(sbuf->head.prev && sbuf->head.next);
- LIST_DEL(&sbuf->head); /* remove from svga->dirty_buffers list */
+ list_del(&sbuf->head); /* remove from svga->dirty_buffers list */
#ifdef DEBUG
sbuf->head.next = sbuf->head.prev = NULL;
#endif
* We try to lump as many contiguous DMA transfers together as possible.
*/
void
-svga_buffer_add_range(struct svga_buffer *sbuf,
- unsigned start,
- unsigned end)
+svga_buffer_add_range(struct svga_buffer *sbuf, unsigned start, unsigned end)
{
unsigned i;
unsigned nearest_range;
/*
* Try to grow one of the ranges.
*/
-
for (i = 0; i < sbuf->map.num_ranges; ++i) {
- int left_dist;
- int right_dist;
- int dist;
-
- left_dist = start - sbuf->map.ranges[i].end;
- right_dist = sbuf->map.ranges[i].start - end;
- dist = MAX2(left_dist, right_dist);
+ const int left_dist = start - sbuf->map.ranges[i].end;
+ const int right_dist = sbuf->map.ranges[i].start - end;
+ const int dist = MAX2(left_dist, right_dist);
if (dist <= 0) {
/*
* anything. If the ranges overlap here it must surely be because
* PIPE_TRANSFER_UNSYNCHRONIZED was set.
*/
-
sbuf->map.ranges[i].start = MIN2(sbuf->map.ranges[i].start, start);
sbuf->map.ranges[i].end = MAX2(sbuf->map.ranges[i].end, end);
return;
/*
* Discontiguous ranges -- keep track of the nearest range.
*/
-
if (dist < nearest_dist) {
nearest_range = i;
nearest_dist = dist;
assert(nearest_range < SVGA_BUFFER_MAX_RANGES);
assert(nearest_range < sbuf->map.num_ranges);
- sbuf->map.ranges[nearest_range].start = MIN2(sbuf->map.ranges[nearest_range].start, start);
- sbuf->map.ranges[nearest_range].end = MAX2(sbuf->map.ranges[nearest_range].end, end);
+ sbuf->map.ranges[nearest_range].start =
+ MIN2(sbuf->map.ranges[nearest_range].start, start);
+ sbuf->map.ranges[nearest_range].end =
+ MAX2(sbuf->map.ranges[nearest_range].end, end);
}
}
* Copy the contents of the malloc buffer to a hardware buffer.
*/
static enum pipe_error
-svga_buffer_update_hw(struct svga_context *svga, struct svga_buffer *sbuf)
+svga_buffer_update_hw(struct svga_context *svga, struct svga_buffer *sbuf,
+ unsigned bind_flags)
{
assert(!sbuf->user);
if (!svga_buffer_has_hw_storage(sbuf)) {
enum pipe_error ret;
boolean retry;
void *map;
+ unsigned i;
assert(sbuf->swbuf);
if (!sbuf->swbuf)
return PIPE_ERROR;
- ret = svga_buffer_create_hw_storage(svga_screen(sbuf->b.b.screen),
- sbuf);
+ ret = svga_buffer_create_hw_storage(svga_screen(sbuf->b.b.screen), sbuf,
+ bind_flags);
if (ret != PIPE_OK)
return ret;
- pipe_mutex_lock(ss->swc_mutex);
+ mtx_lock(&ss->swc_mutex);
map = svga_buffer_hw_storage_map(svga, sbuf, PIPE_TRANSFER_WRITE, &retry);
assert(map);
assert(!retry);
if (!map) {
- pipe_mutex_unlock(ss->swc_mutex);
+ mtx_unlock(&ss->swc_mutex);
svga_buffer_destroy_hw_storage(ss, sbuf);
return PIPE_ERROR;
}
- memcpy(map, sbuf->swbuf, sbuf->b.b.width0);
+ /* Copy data from malloc'd swbuf to the new hardware buffer */
+ for (i = 0; i < sbuf->map.num_ranges; i++) {
+ unsigned start = sbuf->map.ranges[i].start;
+ unsigned len = sbuf->map.ranges[i].end - start;
+ memcpy((uint8_t *) map + start, (uint8_t *) sbuf->swbuf + start, len);
+ }
+
+ if (svga->swc->force_coherent || sbuf->key.coherent)
+ sbuf->map.num_ranges = 0;
+
svga_buffer_hw_storage_unmap(svga, sbuf);
/* This user/malloc buffer is now indistinguishable from a gpu buffer */
- assert(!sbuf->map.count);
- if (!sbuf->map.count) {
+ assert(sbuf->map.count == 0);
+ if (sbuf->map.count == 0) {
if (sbuf->user)
sbuf->user = FALSE;
else
sbuf->swbuf = NULL;
}
- pipe_mutex_unlock(ss->swc_mutex);
+ mtx_unlock(&ss->swc_mutex);
}
return PIPE_OK;
SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
for (i = 0; i < sbuf->map.num_ranges; ++i) {
- struct svga_buffer_range *range = &sbuf->map.ranges[i];
+ const struct svga_buffer_range *range = &sbuf->map.ranges[i];
unsigned offset = range->start;
unsigned size = range->end - range->start;
while (offset < range->end) {
struct svga_winsys_buffer *hwbuf;
uint8_t *map;
- enum pipe_error ret;
if (offset + size > range->end)
size = range->end - offset;
sws->buffer_unmap(sws, hwbuf);
}
- ret = SVGA3D_BufferDMA(svga->swc,
- hwbuf, sbuf->handle,
- SVGA3D_WRITE_HOST_VRAM,
- size, 0, offset, sbuf->dma.flags);
- if (ret != PIPE_OK) {
- svga_context_flush(svga, NULL);
- ret = SVGA3D_BufferDMA(svga->swc,
- hwbuf, sbuf->handle,
- SVGA3D_WRITE_HOST_VRAM,
- size, 0, offset, sbuf->dma.flags);
- assert(ret == PIPE_OK);
- }
-
+ SVGA_RETRY(svga, SVGA3D_BufferDMA(svga->swc,
+ hwbuf, sbuf->handle,
+ SVGA3D_WRITE_HOST_VRAM,
+ size, 0, offset, sbuf->dma.flags));
sbuf->dma.flags.discard = FALSE;
sws->buffer_destroy(sws, hwbuf);
* if there are mapped ranges and the data is currently in a malloc'ed buffer.
*/
struct svga_winsys_surface *
-svga_buffer_handle(struct svga_context *svga,
- struct pipe_resource *buf)
+svga_buffer_handle(struct svga_context *svga, struct pipe_resource *buf,
+ unsigned tobind_flags)
{
struct pipe_screen *screen = svga->pipe.screen;
struct svga_screen *ss = svga_screen(screen);
assert(!sbuf->user);
- if (!sbuf->handle) {
+ if (sbuf->handle) {
+ if ((sbuf->bind_flags & tobind_flags) != tobind_flags) {
+ /* If the allocated resource's bind flags do not include the
+ * requested bind flags, validate the host surface.
+ */
+ ret = svga_buffer_validate_host_surface(svga, sbuf, tobind_flags);
+ if (ret != PIPE_OK)
+ return NULL;
+ }
+ } else {
+ /* If there is no resource handle yet, then combine the buffer bind
+ * flags and the tobind_flags if they are compatible.
+ * If not, just use the tobind_flags for creating the resource handle.
+ */
+ if (compatible_bind_flags(sbuf->bind_flags, tobind_flags))
+ sbuf->bind_flags = sbuf->bind_flags | tobind_flags;
+ else
+ sbuf->bind_flags = tobind_flags;
+
+ assert((sbuf->bind_flags & tobind_flags) == tobind_flags);
+
/* This call will set sbuf->handle */
if (svga_have_gb_objects(svga)) {
- ret = svga_buffer_update_hw(svga, sbuf);
+ ret = svga_buffer_update_hw(svga, sbuf, sbuf->bind_flags);
} else {
- ret = svga_buffer_create_host_surface(ss, sbuf);
+ ret = svga_buffer_create_host_surface(ss, sbuf, sbuf->bind_flags);
}
if (ret != PIPE_OK)
- return NULL;
+ return NULL;
}
assert(sbuf->handle);
+ if (svga->swc->force_coherent || sbuf->key.coherent)
+ return sbuf->handle;
if (sbuf->map.num_ranges) {
if (!sbuf->dma.pending) {
- /*
- * No pending DMA upload yet, so insert a DMA upload command now.
- */
+ /* No pending DMA/update commands yet. */
- /*
- * Migrate the data from swbuf -> hwbuf if necessary.
- */
- ret = svga_buffer_update_hw(svga, sbuf);
+ /* Migrate the data from swbuf -> hwbuf if necessary */
+ ret = svga_buffer_update_hw(svga, sbuf, sbuf->bind_flags);
if (ret == PIPE_OK) {
- /*
- * Queue a dma command.
- */
-
- ret = svga_buffer_upload_command(svga, sbuf);
- if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
- svga_context_flush(svga, NULL);
- ret = svga_buffer_upload_command(svga, sbuf);
- assert(ret == PIPE_OK);
- }
+ /* Emit DMA or UpdateGBImage commands */
+ SVGA_RETRY_OOM(svga, ret, svga_buffer_upload_command(svga, sbuf));
if (ret == PIPE_OK) {
sbuf->dma.pending = TRUE;
assert(!sbuf->head.prev && !sbuf->head.next);
- LIST_ADDTAIL(&sbuf->head, &svga->dirty_buffers);
+ list_addtail(&sbuf->head, &svga->dirty_buffers);
}
}
else if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
}
}
- assert(!sbuf->map.num_ranges || sbuf->dma.pending);
+ assert(sbuf->map.num_ranges == 0 || sbuf->dma.pending);
return sbuf->handle;
}
-
void
svga_context_flush_buffers(struct svga_context *svga)
{
struct list_head *curr, *next;
- struct svga_buffer *sbuf;
+
+ SVGA_STATS_TIME_PUSH(svga_sws(svga), SVGA_STATS_TIME_BUFFERSFLUSH);
curr = svga->dirty_buffers.next;
next = curr->next;
- while(curr != &svga->dirty_buffers) {
- sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
+ while (curr != &svga->dirty_buffers) {
+ struct svga_buffer *sbuf = LIST_ENTRY(struct svga_buffer, curr, head);
assert(p_atomic_read(&sbuf->b.b.reference.count) != 0);
assert(sbuf->dma.pending);
curr = next;
next = curr->next;
}
+
+ SVGA_STATS_TIME_POP(svga_sws(svga));
}
projects / mesa.git / blobdiff