**********************************************************/
#include "git_sha1.h" /* For MESA_GIT_SHA1 */
-#include "util/u_format.h"
+#include "util/format/u_format.h"
#include "util/u_memory.h"
#include "util/u_inlines.h"
#include "util/u_screen.h"
#include "svga_public.h"
#include "svga_context.h"
#include "svga_format.h"
-#include "svga_msg.h"
#include "svga_screen.h"
#include "svga_tgsi.h"
#include "svga_resource_texture.h"
/* NOTE: this constant may get moved into a svga3d*.h header file */
#define SVGA3D_DX_MAX_RESOURCE_SIZE (128 * 1024 * 1024)
+#ifndef MESA_GIT_SHA1
+#define MESA_GIT_SHA1 "(unknown git revision)"
+#endif
+
#ifdef DEBUG
int SVGA_DEBUG = 0;
*/
build = "build: DEBUG;";
mutex = "mutex: " PIPE_ATOMIC ";";
-#elif defined(VMX86_STATS)
- build = "build: OPT;";
#else
build = "build: RELEASE;";
#endif
-#ifdef HAVE_LLVM
+#ifdef LLVM_AVAILABLE
llvm = "LLVM;";
#endif
- util_snprintf(name, sizeof(name), "SVGA3D; %s %s %s", build, mutex, llvm);
+ snprintf(name, sizeof(name), "SVGA3D; %s %s %s", build, mutex, llvm);
return name;
}
return 1;
case PIPE_CAP_POINT_SPRITE:
return 1;
- case PIPE_CAP_TGSI_TEXCOORD:
- return 0;
case PIPE_CAP_MAX_RENDER_TARGETS:
return svgascreen->max_color_buffers;
case PIPE_CAP_OCCLUSION_QUERY:
return 1;
- case PIPE_CAP_QUERY_TIME_ELAPSED:
- return 0;
case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
return sws->have_vgpu10;
case PIPE_CAP_TEXTURE_SWIZZLE:
return 1;
- case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
- return 0;
- case PIPE_CAP_USER_VERTEX_BUFFERS:
- return 0;
case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
return 256;
- case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
+ case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
{
- unsigned levels = SVGA_MAX_TEXTURE_LEVELS;
+ unsigned size = 1 << (SVGA_MAX_TEXTURE_LEVELS - 1);
if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
- levels = MIN2(util_logbase2(result.u) + 1, levels);
+ size = MIN2(result.u, size);
else
- levels = 12 /* 2048x2048 */;
+ size = 2048;
if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
- levels = MIN2(util_logbase2(result.u) + 1, levels);
+ size = MIN2(result.u, size);
else
- levels = 12 /* 2048x2048 */;
- return levels;
+ size = 2048;
+ return size;
}
case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
* No mechanism to query the host, and at least limited to 2048x2048 on
* certain hardware.
*/
- return MIN2(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
+ return MIN2(util_last_bit(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_SIZE)),
12 /* 2048x2048 */);
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
- return sws->have_vgpu10 ? SVGA3D_MAX_SURFACE_ARRAYSIZE : 0;
+ return sws->have_sm5 ? SVGA3D_SM5_MAX_SURFACE_ARRAYSIZE :
+ (sws->have_vgpu10 ? SVGA3D_SM4_MAX_SURFACE_ARRAYSIZE : 0);
case PIPE_CAP_BLEND_EQUATION_SEPARATE: /* req. for GL 1.5 */
return 1;
return 1;
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
return sws->have_vgpu10;
- case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
- return 0;
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
return !sws->have_vgpu10;
case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
return 1; /* The color outputs of vertex shaders are not clamped */
case PIPE_CAP_VERTEX_COLOR_CLAMPED:
- return 0; /* The driver can't clamp vertex colors */
- case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
- return 0; /* The driver can't clamp fragment colors */
+ return sws->have_vgpu10;
case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
return 1; /* expected for GL_ARB_framebuffer_object */
case PIPE_CAP_GLSL_FEATURE_LEVEL:
- return sws->have_vgpu10 ? 330 : 120;
+ if (sws->have_sm5) {
+ return 410;
+ } else if (sws->have_vgpu10) {
+ return 330;
+ } else {
+ return 120;
+ }
case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
- return sws->have_vgpu10 ? 140 : 120;
+ return sws->have_sm5 ? 410 : (sws->have_vgpu10 ? 330 : 120);
case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
- case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
return 0;
- case PIPE_CAP_SM3:
+ case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
+ case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
+ case PIPE_CAP_VERTEX_SHADER_SATURATE:
return 1;
case PIPE_CAP_DEPTH_CLIP_DISABLE:
case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
return sws->have_vgpu10 ? 4 : 0;
case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
- return sws->have_vgpu10 ? SVGA3D_MAX_STREAMOUT_DECLS : 0;
+ return sws->have_sm5 ? SVGA3D_MAX_STREAMOUT_DECLS :
+ (sws->have_vgpu10 ? SVGA3D_MAX_DX10_STREAMOUT_DECLS : 0);
case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
+ return sws->have_sm5;
case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
- return 0;
+ return sws->have_sm5;
case PIPE_CAP_TEXTURE_MULTISAMPLE:
return svgascreen->ms_samples ? 1 : 0;
return sws->have_vgpu10 ? 1024 : 0;
case PIPE_CAP_PRIMITIVE_RESTART:
+ case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
return 1; /* may be a sw fallback, depending on restart index */
case PIPE_CAP_GENERATE_MIPMAP:
case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
return 1;
- /* Unsupported features */
- case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
- case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
- case PIPE_CAP_SHADER_STENCIL_EXPORT:
- case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
+ case PIPE_CAP_CUBE_MAP_ARRAY:
case PIPE_CAP_INDEP_BLEND_FUNC:
- case PIPE_CAP_TEXTURE_BARRIER:
+ case PIPE_CAP_SAMPLE_SHADING:
+ case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
+ case PIPE_CAP_TEXTURE_QUERY_LOD:
+ return sws->have_sm4_1;
+
+ case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
+ /* SM4_1 supports only single-channel textures where as SM5 supports
+ * all four channel textures */
+ return sws->have_sm5 ? 4 :
+ (sws->have_sm4_1 ? 1 : 0);
+ case PIPE_CAP_DRAW_INDIRECT:
+ return sws->have_sm5;
case PIPE_CAP_MAX_VERTEX_STREAMS:
- case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
+ return sws->have_sm5 ? 4 : 0;
case PIPE_CAP_COMPUTE:
- case PIPE_CAP_START_INSTANCE:
- case PIPE_CAP_CUBE_MAP_ARRAY:
- case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
- case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
- case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
- case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
- case PIPE_CAP_TEXTURE_GATHER_SM5:
+ return 0;
+ case PIPE_CAP_MAX_VARYINGS:
+ return sws->have_vgpu10 ? VGPU10_MAX_FS_INPUTS : 10;
case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
- case PIPE_CAP_TEXTURE_QUERY_LOD:
- case PIPE_CAP_SAMPLE_SHADING:
- case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
- case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
- case PIPE_CAP_DRAW_INDIRECT:
- case PIPE_CAP_MULTI_DRAW_INDIRECT:
- case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
- case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
- case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
- case PIPE_CAP_SAMPLER_VIEW_TARGET:
- case PIPE_CAP_CLIP_HALFZ:
- case PIPE_CAP_VERTEXID_NOBASE:
- case PIPE_CAP_POLYGON_OFFSET_CLAMP:
- case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
- case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
- case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
- case PIPE_CAP_INVALIDATE_BUFFER:
- case PIPE_CAP_STRING_MARKER:
- case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
- case PIPE_CAP_QUERY_MEMORY_INFO:
+ return sws->have_coherent;
+
case PIPE_CAP_PCI_GROUP:
case PIPE_CAP_PCI_BUS:
case PIPE_CAP_PCI_DEVICE:
case PIPE_CAP_PCI_FUNCTION:
- case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
- case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
- case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
- case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
- case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
- case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
- case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
return 0;
case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
return 64;
case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
return 2048;
case PIPE_CAP_MAX_VIEWPORTS:
- return 1;
+ assert((!sws->have_vgpu10 && svgascreen->max_viewports == 1) ||
+ (sws->have_vgpu10 &&
+ svgascreen->max_viewports == SVGA3D_DX_MAX_VIEWPORTS));
+ return svgascreen->max_viewports;
case PIPE_CAP_ENDIANNESS:
return PIPE_ENDIAN_LITTLE;
return sws->have_vgpu10;
case PIPE_CAP_CLEAR_TEXTURE:
return sws->have_vgpu10;
+ case PIPE_CAP_DOUBLES:
+ return sws->have_sm5;
case PIPE_CAP_UMA:
- case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
- case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
- case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
- case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
- case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
- case PIPE_CAP_DEPTH_BOUNDS_TEST:
- case PIPE_CAP_TGSI_TXQS:
- case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
- case PIPE_CAP_SHAREABLE_SHADERS:
- case PIPE_CAP_DRAW_PARAMETERS:
- case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
- case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
- case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
- case PIPE_CAP_QUERY_BUFFER_OBJECT:
- case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
- case PIPE_CAP_CULL_DISTANCE:
- case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
- case PIPE_CAP_TGSI_VOTE:
- case PIPE_CAP_MAX_WINDOW_RECTANGLES:
- case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
- case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
- case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
- case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
- case PIPE_CAP_TGSI_FS_FBFETCH:
- case PIPE_CAP_TGSI_MUL_ZERO_WINS:
- case PIPE_CAP_DOUBLES:
- case PIPE_CAP_INT64:
- case PIPE_CAP_INT64_DIVMOD:
- case PIPE_CAP_TGSI_TEX_TXF_LZ:
- case PIPE_CAP_TGSI_CLOCK:
- case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
- case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
- case PIPE_CAP_TGSI_BALLOT:
- case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
- case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
- case PIPE_CAP_POST_DEPTH_COVERAGE:
- case PIPE_CAP_BINDLESS_TEXTURE:
- case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
- case PIPE_CAP_QUERY_SO_OVERFLOW:
- case PIPE_CAP_MEMOBJ:
- case PIPE_CAP_LOAD_CONSTBUF:
- case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
- case PIPE_CAP_TILE_RASTER_ORDER:
- case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
- case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
- case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
- case PIPE_CAP_CONTEXT_PRIORITY_MASK:
- case PIPE_CAP_FENCE_SIGNAL:
- case PIPE_CAP_CONSTBUF0_FLAGS:
- case PIPE_CAP_PACKED_UNIFORMS:
- case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
return 0;
+ case PIPE_CAP_TGSI_DIV:
+ return 1;
case PIPE_CAP_MAX_GS_INVOCATIONS:
return 32;
case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
return 1 << 27;
+ /* Verify this once protocol is finalized. Setting it to minimum value. */
+ case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
+ return sws->have_sm5 ? 30 : 0;
default:
return u_pipe_screen_get_param_defaults(screen, param);
}
/*
* Although PS 3.0 has some addressing abilities it can only represent
* loops that can be statically determined and unrolled. Given we can
- * only handle a subset of the cases that the state tracker already
- * does it is better to defer loop unrolling to the state tracker.
+ * only handle a subset of the cases that the gallium frontend already
+ * does it is better to defer loop unrolling to the gallium frontend.
*/
return 0;
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
case PIPE_SHADER_CAP_INTEGERS:
return 0;
case PIPE_SHADER_CAP_FP16:
+ case PIPE_SHADER_CAP_FP16_DERIVATIVES:
+ case PIPE_SHADER_CAP_INT16:
+ case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
return 0;
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
return 0;
- case PIPE_SHADER_CAP_SCALAR_ISA:
- return 1;
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
return 32;
}
case PIPE_SHADER_CAP_INTEGERS:
return 0;
case PIPE_SHADER_CAP_FP16:
+ case PIPE_SHADER_CAP_FP16_DERIVATIVES:
+ case PIPE_SHADER_CAP_INT16:
+ case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
return 0;
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
return 0;
- case PIPE_SHADER_CAP_SCALAR_ISA:
- return 1;
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
return 32;
}
assert(sws->have_vgpu10);
(void) sws; /* silence unused var warnings in non-debug builds */
- /* Only VS, GS, FS supported */
- if (shader != PIPE_SHADER_VERTEX &&
- shader != PIPE_SHADER_GEOMETRY &&
- shader != PIPE_SHADER_FRAGMENT) {
+ if ((!sws->have_sm5) &&
+ (shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL))
+ return 0;
+
+ if (shader == PIPE_SHADER_COMPUTE)
return 0;
- }
/* NOTE: we do not query the device for any caps/limits at this time */
return VGPU10_MAX_FS_INPUTS;
else if (shader == PIPE_SHADER_GEOMETRY)
return VGPU10_MAX_GS_INPUTS;
+ else if (shader == PIPE_SHADER_TESS_CTRL)
+ return VGPU11_MAX_HS_INPUT_CONTROL_POINTS;
+ else if (shader == PIPE_SHADER_TESS_EVAL)
+ return VGPU11_MAX_DS_INPUT_CONTROL_POINTS;
else
return VGPU10_MAX_VS_INPUTS;
case PIPE_SHADER_CAP_MAX_OUTPUTS:
return VGPU10_MAX_FS_OUTPUTS;
else if (shader == PIPE_SHADER_GEOMETRY)
return VGPU10_MAX_GS_OUTPUTS;
+ else if (shader == PIPE_SHADER_TESS_CTRL)
+ return VGPU11_MAX_HS_OUTPUTS;
+ else if (shader == PIPE_SHADER_TESS_EVAL)
+ return VGPU11_MAX_DS_OUTPUTS;
else
return VGPU10_MAX_VS_OUTPUTS;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_INTEGERS:
return TRUE;
case PIPE_SHADER_CAP_FP16:
+ case PIPE_SHADER_CAP_FP16_DERIVATIVES:
+ case PIPE_SHADER_CAP_INT16:
+ case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
return FALSE;
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
return 0;
- case PIPE_SHADER_CAP_SCALAR_ISA:
- return 1;
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
return 32;
default:
}
-static boolean
+static bool
svga_fence_finish(struct pipe_screen *screen,
struct pipe_context *ctx,
struct pipe_fence_handle *fence,
uint64_t timeout)
{
struct svga_winsys_screen *sws = svga_screen(screen)->sws;
- boolean retVal;
+ bool retVal;
SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_FENCEFINISH);
PIPE_DRIVER_QUERY_TYPE_UINT64),
QUERY("num-bytes-uploaded", SVGA_QUERY_NUM_BYTES_UPLOADED,
PIPE_DRIVER_QUERY_TYPE_BYTES),
+ QUERY("num-command-buffers", SVGA_QUERY_NUM_COMMAND_BUFFERS,
+ PIPE_DRIVER_QUERY_TYPE_UINT64),
QUERY("command-buffer-size", SVGA_QUERY_COMMAND_BUFFER_SIZE,
PIPE_DRIVER_QUERY_TYPE_BYTES),
QUERY("flush-time", SVGA_QUERY_FLUSH_TIME,
PIPE_DRIVER_QUERY_TYPE_UINT64),
QUERY("num-const-updates", SVGA_QUERY_NUM_CONST_UPDATES,
PIPE_DRIVER_QUERY_TYPE_UINT64),
+ QUERY("num-shader-relocations", SVGA_QUERY_NUM_SHADER_RELOCATIONS,
+ PIPE_DRIVER_QUERY_TYPE_UINT64),
+ QUERY("num-surface-relocations", SVGA_QUERY_NUM_SURFACE_RELOCATIONS,
+ PIPE_DRIVER_QUERY_TYPE_UINT64),
/* running total counters */
QUERY("memory-used", SVGA_QUERY_MEMORY_USED,
PIPE_DRIVER_QUERY_TYPE_UINT64),
QUERY("num-commands-per-draw", SVGA_QUERY_NUM_COMMANDS_PER_DRAW,
PIPE_DRIVER_QUERY_TYPE_FLOAT),
+ QUERY("shader-mem-used", SVGA_QUERY_SHADER_MEM_USED,
+ PIPE_DRIVER_QUERY_TYPE_UINT64),
};
#undef QUERY
static void
init_logging(struct pipe_screen *screen)
{
+ struct svga_screen *svgascreen = svga_screen(screen);
static const char *log_prefix = "Mesa: ";
char host_log[1000];
/* Log Version to Host */
- util_snprintf(host_log, sizeof(host_log) - strlen(log_prefix),
- "%s%s", log_prefix, svga_get_name(screen));
- svga_host_log(host_log);
+ snprintf(host_log, sizeof(host_log) - strlen(log_prefix),
+ "%s%s\n", log_prefix, svga_get_name(screen));
+ svgascreen->sws->host_log(svgascreen->sws, host_log);
- util_snprintf(host_log, sizeof(host_log) - strlen(log_prefix),
- "%s" PACKAGE_VERSION MESA_GIT_SHA1, log_prefix);
- svga_host_log(host_log);
+ snprintf(host_log, sizeof(host_log) - strlen(log_prefix),
+ "%s" PACKAGE_VERSION MESA_GIT_SHA1, log_prefix);
+ svgascreen->sws->host_log(svgascreen->sws, host_log);
/* If the SVGA_EXTRA_LOGGING env var is set, log the process's command
* line (program name and arguments).
if (debug_get_bool_option("SVGA_EXTRA_LOGGING", FALSE)) {
char cmdline[1000];
if (os_get_command_line(cmdline, sizeof(cmdline))) {
- util_snprintf(host_log, sizeof(host_log) - strlen(log_prefix),
- "%s%s", log_prefix, cmdline);
- svga_host_log(host_log);
+ snprintf(host_log, sizeof(host_log) - strlen(log_prefix),
+ "%s%s\n", log_prefix, cmdline);
+ svgascreen->sws->host_log(svgascreen->sws, host_log);
}
}
}
+/**
+ * no-op logging function to use when SVGA_NO_LOGGING is set.
+ */
+static void
+nop_host_log(struct svga_winsys_screen *sws, const char *message)
+{
+ /* nothing */
+}
+
+
static void
svga_destroy_screen( struct pipe_screen *screen )
{
goto error2;
}
+ debug_printf("%s enabled\n",
+ sws->have_sm5 ? "SM5" :
+ sws->have_sm4_1 ? "SM4_1" :
+ sws->have_vgpu10 ? "VGPU10" : "VGPU9");
+
+ debug_printf("Mesa: %s %s (%s)\n", svga_get_name(screen),
+ PACKAGE_VERSION, MESA_GIT_SHA1);
+
/*
* The D16, D24X8, and D24S8 formats always do an implicit shadow compare
* when sampled from, where as the DF16, DF24, and D24S8_INT do not. So
svgascreen->maxPointSize = 80.0F;
svgascreen->max_color_buffers = SVGA3D_DX_MAX_RENDER_TARGETS;
+ /* Multisample samples per pixel */
+ if (sws->have_sm4_1 && debug_get_bool_option("SVGA_MSAA", TRUE)) {
+ if (get_bool_cap(sws, SVGA3D_DEVCAP_MULTISAMPLE_2X, FALSE))
+ svgascreen->ms_samples |= 1 << 1;
+ if (get_bool_cap(sws, SVGA3D_DEVCAP_MULTISAMPLE_4X, FALSE))
+ svgascreen->ms_samples |= 1 << 3;
+ }
+
+ if (sws->have_sm5 && debug_get_bool_option("SVGA_MSAA", TRUE)) {
+ if (get_bool_cap(sws, SVGA3D_DEVCAP_MULTISAMPLE_8X, FALSE))
+ svgascreen->ms_samples |= 1 << 7;
+ }
+
/* Maximum number of constant buffers */
svgascreen->max_const_buffers =
get_uint_cap(sws, SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS, 1);
- assert(svgascreen->max_const_buffers <= SVGA_MAX_CONST_BUFS);
+ svgascreen->max_const_buffers = MIN2(svgascreen->max_const_buffers,
+ SVGA_MAX_CONST_BUFS);
+
+ svgascreen->haveBlendLogicops =
+ get_bool_cap(sws, SVGA3D_DEVCAP_LOGIC_BLENDOPS, FALSE);
+
+ screen->is_format_supported = svga_is_dx_format_supported;
+
+ svgascreen->max_viewports = SVGA3D_DX_MAX_VIEWPORTS;
}
else {
/* VGPU9 */
/* No multisampling */
svgascreen->ms_samples = 0;
+
+ /* Only one viewport */
+ svgascreen->max_viewports = 1;
}
/* common VGPU9 / VGPU10 caps */
svga_screen_cache_init(svgascreen);
- init_logging(screen);
+ if (debug_get_bool_option("SVGA_NO_LOGGING", FALSE) == TRUE) {
+ svgascreen->sws->host_log = nop_host_log;
+ } else {
+ init_logging(screen);
+ }
return screen;
error2:
projects / mesa.git / blobdiff