#define SVGA_FENCE_FLAG_EXEC (1 << 0)
#define SVGA_FENCE_FLAG_QUERY (1 << 1)
-#define SVGA_SURFACE_USAGE_SHARED (1 << 0)
-#define SVGA_SURFACE_USAGE_SCANOUT (1 << 1)
+#define SVGA_SURFACE_USAGE_SHARED (1 << 0)
+#define SVGA_SURFACE_USAGE_SCANOUT (1 << 1)
+#define SVGA_SURFACE_USAGE_COHERENT (1 << 2)
#define SVGA_QUERY_FLAG_SET (1 << 0)
#define SVGA_QUERY_FLAG_REF (1 << 1)
**/
boolean have_gb_objects;
+ boolean force_coherent;
/**
* Map a guest-backed surface.
struct svga_winsys_surface *surface,
boolean *rebind);
- /**
- * Invalidate the content of this surface
- */
- enum pipe_error
- (*surface_invalidate)(struct svga_winsys_context *swc,
- struct svga_winsys_surface *surface);
-
/**
* Create and define a DX GB shader that resides in the device COTable.
* Caller of this function will issue the DXDefineShader command.
*/
struct svga_winsys_surface *
(*surface_create)(struct svga_winsys_screen *sws,
- SVGA3dSurface1Flags flags,
+ SVGA3dSurfaceAllFlags flags,
SVGA3dSurfaceFormat format,
unsigned usage,
SVGA3dSize size,
SVGA3dSurfaceFormat format,
SVGA3dSize size,
uint32 numLayers,
- uint32 numMipLevels);
+ uint32 numMipLevels,
+ uint32 numSamples);
/**
* Buffer management. Buffer attributes are mostly fixed over its lifetime.
/** Can we do DMA with guest-backed objects enabled? */
bool have_gb_dma;
+ /** Do we support coherent surface memory? */
+ bool have_coherent;
/**
* Create and define a GB shader.
*/
void
(*stats_time_pop)();
+ /**
+ * Send a host log message
+ */
+ void
+ (*host_log)(struct svga_winsys_screen *sws, const char *message);
/** Have VGPU v10 hardware? */
boolean have_vgpu10;
+ /** Have SM4_1 hardware? */
+ boolean have_sm4_1;
+
/** To rebind resources at the beginnning of a new command buffer */
boolean need_to_rebind_resources;
boolean have_set_predication_cmd;
boolean have_transfer_from_buffer_cmd;
boolean have_fence_fd;
+ boolean have_intra_surface_copy;
};