radeon/winsys: add offset support for BO import/export
[mesa.git] / src / gallium / winsys / amdgpu / drm / amdgpu_bo.c
index 70993297ceb087bafdc5056834fe6ca15fc44966..3f74dd7da5e5e97176a1b4ac72e84d320aee6e5e 100644 (file)
@@ -519,7 +519,8 @@ amdgpu_bo_create(struct radeon_winsys *rws,
 
 static struct pb_buffer *amdgpu_bo_from_handle(struct radeon_winsys *rws,
                                                struct winsys_handle *whandle,
-                                               unsigned *stride)
+                                               unsigned *stride,
+                                               unsigned *offset)
 {
    struct amdgpu_winsys *ws = amdgpu_winsys(rws);
    struct amdgpu_winsys_bo *bo;
@@ -587,6 +588,8 @@ static struct pb_buffer *amdgpu_bo_from_handle(struct radeon_winsys *rws,
 
    if (stride)
       *stride = whandle->stride;
+   if (offset)
+      *offset = whandle->offset;
 
    if (bo->initial_domain & RADEON_DOMAIN_VRAM)
       ws->allocated_vram += align(bo->base.size, ws->gart_page_size);
@@ -609,7 +612,7 @@ error:
 }
 
 static boolean amdgpu_bo_get_handle(struct pb_buffer *buffer,
-                                    unsigned stride,
+                                    unsigned stride, unsigned offset,
                                     struct winsys_handle *whandle)
 {
    struct amdgpu_winsys_bo *bo = amdgpu_winsys_bo(buffer);
@@ -637,7 +640,7 @@ static boolean amdgpu_bo_get_handle(struct pb_buffer *buffer,
       return FALSE;
 
    whandle->stride = stride;
-   whandle->offset = 0;
+   whandle->offset = offset;
    bo->is_shared = true;
    return TRUE;
 }