radeonsi: fix user fence space when MCBP is enabled

[mesa.git] / src / gallium / winsys / amdgpu / drm / amdgpu_cs.c

diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index f51c7782033d8006082521d2c6e4adc30093887d..c531d72ca4526a6866efa760f43bf2aa5f1cd16b 100644 (file)
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -1683,8 +1683,14 @@ finalize:
       /* Success. */
       uint64_t *user_fence = NULL;
 
       /* Success. */
       uint64_t *user_fence = NULL;
 

+      /* Need to reserve 4 QWORD for user fence:
+       *   QWORD[0]: completed fence
+       *   QWORD[1]: preempted fence
+       *   QWORD[2]: reset fence
+       *   QWORD[3]: preempted then reset
+       **/

       if (has_user_fence)
       if (has_user_fence)

-         user_fence = acs->ctx->user_fence_cpu_address_base + acs->ring_type;
+         user_fence = acs->ctx->user_fence_cpu_address_base + acs->ring_type * 4;

       amdgpu_fence_submitted(cs->fence, seq_no, user_fence);
    }
 
       amdgpu_fence_submitted(cs->fence, seq_no, user_fence);
    }