radeonsi: set up IBs for preemption

[mesa.git] / src / gallium / winsys / amdgpu / drm / amdgpu_cs.h

diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
index a50257b5b7bf5bec2e443e5fd05b45dc6cde00f3..138e0b0adcc441f1f5aefce611098a2354eef5be 100644 (file)
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.h
@@ -56,6 +56,7 @@ struct amdgpu_cs_buffer {
 };
 
 enum ib_type {
+   IB_PREAMBLE,
    IB_MAIN,
    IB_PARALLEL_COMPUTE,
    IB_NUM,
@@ -151,6 +152,7 @@ struct amdgpu_cs {
 
    struct util_queue_fence flush_completed;
    struct pipe_fence_handle *next_fence;
+   struct pb_buffer *preamble_ib_bo;
 };
 
 struct amdgpu_fence {