#include "radeon_drm_bo.h"
+struct radeon_ctx {
+ struct radeon_drm_winsys *ws;
+ uint32_t gpu_reset_counter;
+};
+
struct radeon_bo_item {
struct radeon_bo *bo;
- uint64_t priority_usage;
+ union {
+ struct {
+ uint32_t priority_usage;
+ } real;
+ struct {
+ unsigned real_idx;
+ } slab;
+ } u;
};
struct radeon_cs_context {
struct radeon_bo_item *relocs_bo;
struct drm_radeon_cs_reloc *relocs;
+ unsigned num_slab_buffers;
+ unsigned max_slab_buffers;
+ struct radeon_bo_item *slab_buffers;
+
int reloc_indices_hashlist[4096];
};
struct radeon_drm_cs {
- struct radeon_winsys_cs base;
+ struct radeon_cmdbuf base;
enum ring_type ring_type;
/* We flip between these two CS. While one is being consumed
int radeon_lookup_buffer(struct radeon_cs_context *csc, struct radeon_bo *bo);
static inline struct radeon_drm_cs *
-radeon_drm_cs(struct radeon_winsys_cs *base)
+radeon_drm_cs(struct radeon_cmdbuf *base)
{
return (struct radeon_drm_cs*)base;
}
if (index == -1)
return false;
+ if (!bo->handle)
+ index = cs->csc->slab_buffers[index].u.slab.real_idx;
+
return cs->csc->relocs[index].write_domain != 0;
}
return bo->num_cs_references != 0;
}
-void radeon_drm_cs_sync_flush(struct radeon_winsys_cs *rcs);
+void radeon_drm_cs_sync_flush(struct radeon_cmdbuf *rcs);
void radeon_drm_cs_init_functions(struct radeon_drm_winsys *ws);
void radeon_drm_cs_emit_ioctl_oneshot(void *job, int thread_index);