intel/eu: Add a mechanism for emitting relocatable constant MOVs

[mesa.git] / src / intel / compiler / brw_eu.cpp

diff --git a/src/intel/compiler/brw_eu.cpp b/src/intel/compiler/brw_eu.cpp
index 51ae8cdc2210a9883baab279a838dc8595c872d3..4bd52df5085651761b1a63f56ec48783f8debc78 100644 (file)
--- a/src/intel/compiler/brw_eu.cpp
+++ b/src/intel/compiler/brw_eu.cpp
@@ -363,6 +363,13 @@ const unsigned *brw_get_program( struct brw_codegen *p,
    return (const unsigned *)p->store;
 }
 
+const brw_shader_reloc *
+brw_get_shader_relocs(struct brw_codegen *p, unsigned *num_relocs)
+{
+   *num_relocs = p->num_relocs;
+   return p->relocs;
+}
+
 bool brw_try_override_assembly(struct brw_codegen *p, int start_offset,
                                const char *identifier)
 {
@@ -650,7 +657,7 @@ static const struct opcode_desc opcode_descs[] = {
    { BRW_OPCODE_FORK,     46,  "fork",    0,    0,    GEN6 },
    { BRW_OPCODE_GOTO,     46,  "goto",    0,    0,    GEN_GE(GEN8) },
    { BRW_OPCODE_POP,      47,  "pop",     2,    0,    GEN_LE(GEN5) },
-   { BRW_OPCODE_WAIT,     48,  "wait",    1,    0,    GEN_LT(GEN12) },
+   { BRW_OPCODE_WAIT,     48,  "wait",    0,    1,    GEN_LT(GEN12) },
    { BRW_OPCODE_SEND,     49,  "send",    1,    1,    GEN_LT(GEN12) },
    { BRW_OPCODE_SENDC,    50,  "sendc",   1,    1,    GEN_LT(GEN12) },
    { BRW_OPCODE_SEND,     49,  "send",    2,    1,    GEN_GE(GEN12) },