#include <stdbool.h>
#include <stdio.h>
#include "brw_inst.h"
+#include "brw_compiler.h"
#include "brw_eu_defines.h"
#include "brw_reg.h"
#include "brw_disasm_info.h"
/* One of BRW_MASK_* */
unsigned mask_control:1;
+ /* Scheduling info for Gen12+ */
+ struct tgl_swsb swsb;
+
bool saturate:1;
/* One of BRW_ALIGN_* */
int *if_depth_in_loop;
int loop_stack_depth;
int loop_stack_array_size;
+
+ struct brw_shader_reloc *relocs;
+ int num_relocs;
+ int reloc_array_size;
+};
+
+struct brw_label {
+ int offset;
+ int number;
+ struct brw_label *next;
};
void brw_pop_insn_state( struct brw_codegen *p );
unsigned brw_get_default_exec_size(struct brw_codegen *p);
unsigned brw_get_default_group(struct brw_codegen *p);
unsigned brw_get_default_access_mode(struct brw_codegen *p);
+struct tgl_swsb brw_get_default_swsb(struct brw_codegen *p);
void brw_set_default_exec_size(struct brw_codegen *p, unsigned value);
void brw_set_default_mask_control( struct brw_codegen *p, unsigned value );
void brw_set_default_saturate( struct brw_codegen *p, bool enable );
void brw_set_default_predicate_inverse(struct brw_codegen *p, bool predicate_inverse);
void brw_set_default_flag_reg(struct brw_codegen *p, int reg, int subreg);
void brw_set_default_acc_write_control(struct brw_codegen *p, unsigned value);
+void brw_set_default_swsb(struct brw_codegen *p, struct tgl_swsb value);
void brw_init_codegen(const struct gen_device_info *, struct brw_codegen *p,
void *mem_ctx);
+bool brw_has_jip(const struct gen_device_info *devinfo, enum opcode opcode);
+bool brw_has_uip(const struct gen_device_info *devinfo, enum opcode opcode);
+const struct brw_label *brw_find_label(const struct brw_label *root, int offset);
+void brw_create_label(struct brw_label **labels, int offset, void *mem_ctx);
int brw_disassemble_inst(FILE *file, const struct gen_device_info *devinfo,
- const struct brw_inst *inst, bool is_compacted);
+ const struct brw_inst *inst, bool is_compacted,
+ int offset, const struct brw_label *root_label);
+const struct brw_label *brw_label_assembly(const struct gen_device_info *devinfo,
+ const void *assembly, int start, int end,
+ void *mem_ctx);
+void brw_disassemble_with_labels(const struct gen_device_info *devinfo,
+ const void *assembly, int start, int end, FILE *out);
void brw_disassemble(const struct gen_device_info *devinfo,
- const void *assembly, int start, int end, FILE *out);
+ const void *assembly, int start, int end,
+ const struct brw_label *root_label, FILE *out);
+const struct brw_shader_reloc *brw_get_shader_relocs(struct brw_codegen *p,
+ unsigned *num_relocs);
const unsigned *brw_get_program( struct brw_codegen *p, unsigned *sz );
bool brw_try_override_assembly(struct brw_codegen *p, int start_offset,
const char *identifier);
+void brw_realign(struct brw_codegen *p, unsigned align);
+int brw_append_data(struct brw_codegen *p, void *data,
+ unsigned size, unsigned align);
brw_inst *brw_next_insn(struct brw_codegen *p, unsigned opcode);
void brw_set_dest(struct brw_codegen *p, brw_inst *insn, struct brw_reg dest);
void brw_set_src0(struct brw_codegen *p, brw_inst *insn, struct brw_reg reg);
struct brw_reg src1, \
struct brw_reg src2);
-#define ROUND(OP) \
-void brw_##OP(struct brw_codegen *p, struct brw_reg dest, struct brw_reg src0);
-
ALU1(MOV)
ALU2(SEL)
ALU1(NOT)
ALU2(MUL)
ALU1(FRC)
ALU1(RNDD)
+ALU1(RNDE)
+ALU1(RNDU)
+ALU1(RNDZ)
ALU2(MAC)
ALU2(MACH)
ALU1(LZD)
ALU2(SUBB)
ALU2(MAC)
-ROUND(RNDZ)
-ROUND(RNDE)
-
#undef ALU1
#undef ALU2
#undef ALU3
-#undef ROUND
/* Helpers for SEND instruction:
return GET_BITS(ex_desc, 9, 6);
}
+static inline uint32_t
+brw_urb_desc(const struct gen_device_info *devinfo,
+ unsigned msg_type,
+ bool per_slot_offset_present,
+ bool channel_mask_present,
+ unsigned global_offset)
+{
+ if (devinfo->gen >= 8) {
+ return (SET_BITS(per_slot_offset_present, 17, 17) |
+ SET_BITS(channel_mask_present, 15, 15) |
+ SET_BITS(global_offset, 14, 4) |
+ SET_BITS(msg_type, 3, 0));
+ } else if (devinfo->gen >= 7) {
+ assert(!channel_mask_present);
+ return (SET_BITS(per_slot_offset_present, 16, 16) |
+ SET_BITS(global_offset, 13, 3) |
+ SET_BITS(msg_type, 3, 0));
+ } else {
+ unreachable("unhandled URB write generation");
+ }
+}
+
+static inline uint32_t
+brw_urb_desc_msg_type(ASSERTED const struct gen_device_info *devinfo,
+ uint32_t desc)
+{
+ assert(devinfo->gen >= 7);
+ return GET_BITS(desc, 3, 0);
+}
+
/**
* Construct a message descriptor immediate with the specified sampler
* function controls.
return brw_dp_surface_desc(devinfo, msg_type, msg_control);
}
+static inline uint32_t
+brw_dp_dword_scattered_rw_desc(const struct gen_device_info *devinfo,
+ unsigned exec_size,
+ bool write)
+{
+ assert(exec_size == 8 || exec_size == 16);
+
+ unsigned msg_type;
+ if (write) {
+ if (devinfo->gen >= 6) {
+ msg_type = GEN6_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE;
+ } else {
+ msg_type = BRW_DATAPORT_WRITE_MESSAGE_DWORD_SCATTERED_WRITE;
+ }
+ } else {
+ if (devinfo->gen >= 7) {
+ msg_type = GEN7_DATAPORT_DC_DWORD_SCATTERED_READ;
+ } else if (devinfo->gen > 4 || devinfo->is_g4x) {
+ msg_type = G45_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ;
+ } else {
+ msg_type = BRW_DATAPORT_READ_MESSAGE_DWORD_SCATTERED_READ;
+ }
+ }
+
+ const unsigned msg_control =
+ SET_BITS(1, 1, 1) | /* Legacy SIMD Mode */
+ SET_BITS(exec_size == 16, 0, 0);
+
+ return brw_dp_surface_desc(devinfo, msg_type, msg_control);
+}
+
static inline uint32_t
brw_dp_a64_untyped_surface_rw_desc(const struct gen_device_info *devinfo,
unsigned exec_size, /**< 0 for SIMD4x2 */
SET_BITS(brw_mdc_cmask(num_channels), 3, 0) |
SET_BITS(simd_mode, 5, 4);
- return brw_dp_desc(devinfo, BRW_BTI_STATELESS, msg_type, msg_control);
+ return brw_dp_desc(devinfo, GEN8_BTI_STATELESS_NON_COHERENT,
+ msg_type, msg_control);
}
/**
SET_BITS(brw_mdc_a64_ds(bit_size / 8), 3, 2) |
SET_BITS(exec_size == 16, 4, 4);
- return brw_dp_desc(devinfo, BRW_BTI_STATELESS, msg_type, msg_control);
+ return brw_dp_desc(devinfo, GEN8_BTI_STATELESS_NON_COHERENT,
+ msg_type, msg_control);
}
static inline uint32_t
SET_BITS(bit_size == 64, 4, 4) |
SET_BITS(response_expected, 5, 5);
- return brw_dp_desc(devinfo, BRW_BTI_STATELESS, msg_type, msg_control);
+ return brw_dp_desc(devinfo, GEN8_BTI_STATELESS_NON_COHERENT,
+ msg_type, msg_control);
}
static inline uint32_t
SET_BITS(atomic_op, 1, 0) |
SET_BITS(response_expected, 5, 5);
- return brw_dp_desc(devinfo, BRW_BTI_STATELESS, msg_type, msg_control);
+ return brw_dp_desc(devinfo, GEN8_BTI_STATELESS_NON_COHERENT,
+ msg_type, msg_control);
}
static inline uint32_t
brw_inst *brw_BREAK(struct brw_codegen *p);
brw_inst *brw_CONT(struct brw_codegen *p);
-brw_inst *gen6_HALT(struct brw_codegen *p);
+brw_inst *brw_HALT(struct brw_codegen *p);
/* Forward jumps:
*/
struct brw_reg dst,
struct brw_reg src,
enum opcode send_op,
- bool stall,
+ enum brw_message_target sfid,
+ bool commit_enable,
unsigned bti);
void
brw_float_controls_mode(struct brw_codegen *p,
unsigned mode, unsigned mask);
+void
+brw_update_reloc_imm(const struct gen_device_info *devinfo,
+ brw_inst *inst,
+ uint32_t value);
+
+void
+brw_MOV_reloc_imm(struct brw_codegen *p,
+ struct brw_reg dst,
+ enum brw_reg_type src_type,
+ uint32_t id);
+
/***********************************************************************
* brw_eu_util.c:
*/
enum brw_conditional_mod brw_swap_cmod(enum brw_conditional_mod cmod);
/* brw_eu_compact.c */
-void brw_init_compaction_tables(const struct gen_device_info *devinfo);
void brw_compact_instructions(struct brw_codegen *p, int start_offset,
struct disasm_info *disasm);
void brw_uncompact_instruction(const struct gen_device_info *devinfo,
brw_inst *orig, brw_inst *uncompacted);
/* brw_eu_validate.c */
+bool brw_validate_instruction(const struct gen_device_info *devinfo,
+ const brw_inst *inst, int offset,
+ struct disasm_info *disasm);
bool brw_validate_instructions(const struct gen_device_info *devinfo,
const void *assembly, int start_offset, int end_offset,
struct disasm_info *disasm);
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