intel/fs,vec4: Stuff the constant data from NIR in the end of the program

[mesa.git] / src / intel / compiler / brw_fs.h

diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index 4e8f8ccac78775fab3390b4a9daf9bb47ac7e13b..0843f6e73fc5b2b79785c501e7bccc26b2763e89 100644 (file)
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -125,9 +125,9 @@ public:
    bool run_tcs();
    bool run_tes();
    bool run_gs();
-   bool run_cs(unsigned min_dispatch_width);
+   bool run_cs(bool allow_spilling);
    void optimize();
-   void allocate_registers(unsigned min_dispatch_width, bool allow_spilling);
+   void allocate_registers(bool allow_spilling);
    void setup_fs_payload_gen4();
    void setup_fs_payload_gen6();
    void setup_vs_payload();
@@ -175,7 +175,6 @@ public:
    bool remove_duplicate_mrf_writes();
    bool remove_extra_rounding_modes();
 
-   bool opt_sampler_eot();
    void schedule_instructions(instruction_scheduler_mode mode);
    void insert_gen4_send_dependency_workarounds();
    void insert_gen4_pre_send_dependency_workarounds(bblock_t *block,
@@ -477,7 +476,9 @@ public:
    void enable_debug(const char *shader_name);
    int generate_code(const cfg_t *cfg, int dispatch_width,
                      struct shader_stats shader_stats,
+                     const brw::performance &perf,
                      struct brw_compile_stats *stats);
+   void add_const_data(void *data, unsigned size);
    const unsigned *get_assembly();
 
 private: