#include "brw_cfg.h"
#include "brw_fs.h"
#include "brw_nir.h"
-#include "common/gen_debug.h"
+#include "dev/gen_debug.h"
namespace brw {
void *mem_ctx,
bool no_spills,
int shader_time_index)
- : vec4_visitor(compiler, log_data, &c->key.tex,
+ : vec4_visitor(compiler, log_data, &c->key.base.tex,
&prog_data->base, shader, mem_ctx,
no_spills, shader_time_index),
c(c),
}
-dst_reg *
-vec4_gs_visitor::make_reg_for_system_value(int location)
-{
- dst_reg *reg = new(mem_ctx) dst_reg(this, glsl_type::int_type);
-
- switch (location) {
- case SYSTEM_VALUE_INVOCATION_ID:
- this->current_annotation = "initialize gl_InvocationID";
- if (gs_prog_data->invocations > 1)
- emit(GS_OPCODE_GET_INSTANCE_ID, *reg);
- else
- emit(MOV(*reg, brw_imm_ud(0)));
- break;
- default:
- unreachable("not reached");
- }
-
- return reg;
-}
-
static inline struct brw_reg
attribute_to_hw_reg(int attr, brw_reg_type type, bool interleaved)
{
assert(c->control_data_bits_per_vertex == 2);
/* Must be a valid stream */
- assert(stream_id >= 0 && stream_id < MAX_VERTEX_STREAMS);
+ assert(stream_id < MAX_VERTEX_STREAMS);
/* Control data bits are initialized to 0 so we don't have to set any
* bits when sending vertices to stream 0.
void *mem_ctx,
const struct brw_gs_prog_key *key,
struct brw_gs_prog_data *prog_data,
- const nir_shader *src_shader,
+ nir_shader *shader,
struct gl_program *prog,
int shader_time_index,
- unsigned *final_assembly_size,
+ struct brw_compile_stats *stats,
char **error_str)
{
struct brw_gs_compile c;
c.key = *key;
const bool is_scalar = compiler->scalar_stage[MESA_SHADER_GEOMETRY];
- nir_shader *shader = nir_shader_clone(mem_ctx, src_shader);
/* The GLSL linker will have already matched up GS inputs and the outputs
* of prior stages. The driver does extend VS outputs in some cases, but
GLbitfield64 inputs_read = shader->info.inputs_read;
brw_compute_vue_map(compiler->devinfo,
&c.input_vue_map, inputs_read,
- shader->info.separate_shader);
+ shader->info.separate_shader, 1);
- shader = brw_nir_apply_sampler_key(shader, compiler, &key->tex, is_scalar);
+ brw_nir_apply_key(shader, compiler, &key->base, 8, is_scalar);
brw_nir_lower_vue_inputs(shader, &c.input_vue_map);
- brw_nir_lower_vue_outputs(shader, is_scalar);
- shader = brw_postprocess_nir(shader, compiler, is_scalar);
+ brw_nir_lower_vue_outputs(shader);
+ brw_postprocess_nir(shader, compiler, is_scalar);
prog_data->base.clip_distance_mask =
((1 << shader->info.clip_distance_array_size) - 1);
prog_data->control_data_format = GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_SID;
/* We only have to emit control bits if we are using streams */
- if (prog && prog->info.gs.uses_streams)
+ if (shader->info.gs.uses_streams)
c.control_data_bits_per_vertex = 2;
else
c.control_data_bits_per_vertex = 0;
/* URB entry sizes are stored as a multiple of 64 bytes in gen7+ and
* a multiple of 128 bytes in gen6.
*/
- if (compiler->devinfo->gen >= 7)
+ if (compiler->devinfo->gen >= 7) {
prog_data->base.urb_entry_size = ALIGN(output_size_bytes, 64) / 64;
- else
+ /* On Cannonlake software shall not program an allocation size that
+ * specifies a size that is a multiple of 3 64B (512-bit) cachelines.
+ */
+ if (compiler->devinfo->gen == 10 &&
+ prog_data->base.urb_entry_size % 3 == 0)
+ prog_data->base.urb_entry_size++;
+ } else {
prog_data->base.urb_entry_size = ALIGN(output_size_bytes, 128) / 128;
+ }
assert(shader->info.gs.output_primitive < ARRAY_SIZE(gl_prim_to_hw_prim));
prog_data->output_topology =
prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8;
prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs;
- fs_generator g(compiler, log_data, mem_ctx, &c.key,
- &prog_data->base.base, v.promoted_constants,
- false, MESA_SHADER_GEOMETRY);
+ fs_generator g(compiler, log_data, mem_ctx,
+ &prog_data->base.base, false, MESA_SHADER_GEOMETRY);
if (unlikely(INTEL_DEBUG & DEBUG_GS)) {
const char *label =
shader->info.label ? shader->info.label : "unnamed";
label, shader->info.name);
g.enable_debug(name);
}
- g.generate_code(v.cfg, 8);
- return g.get_assembly(final_assembly_size);
+ g.generate_code(v.cfg, 8, v.shader_stats,
+ v.performance_analysis.require(), stats);
+ return g.get_assembly();
}
}
vec4_gs_visitor v(compiler, log_data, &c, prog_data, shader,
mem_ctx, true /* no_spills */, shader_time_index);
+
+ /* Backup 'nr_params' and 'param' as they can be modified by the
+ * the DUAL_OBJECT visitor. If it fails, we will run the fallback
+ * (DUAL_INSTANCED or SINGLE mode) and we need to restore original
+ * values.
+ */
+ const unsigned param_count = prog_data->base.base.nr_params;
+ uint32_t *param = ralloc_array(NULL, uint32_t, param_count);
+ memcpy(param, prog_data->base.base.param,
+ sizeof(uint32_t) * param_count);
+
if (v.run()) {
+ /* Success! Backup is not needed */
+ ralloc_free(param);
return brw_vec4_generate_assembly(compiler, log_data, mem_ctx,
- shader, &prog_data->base, v.cfg,
- final_assembly_size);
+ shader, &prog_data->base,
+ v.cfg,
+ v.performance_analysis.require(),
+ stats);
+ } else {
+ /* These variables could be modified by the execution of the GS
+ * visitor if it packed the uniforms in the push constant buffer.
+ * As it failed, we need restore them so we can start again with
+ * DUAL_INSTANCED or SINGLE mode.
+ *
+ * FIXME: Could more variables be modified by this execution?
+ */
+ memcpy(prog_data->base.base.param, param,
+ sizeof(uint32_t) * param_count);
+ prog_data->base.base.nr_params = param_count;
+ prog_data->base.base.nr_pull_params = 0;
+ ralloc_free(param);
}
}
}
} else {
ret = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, shader,
&prog_data->base, gs->cfg,
- final_assembly_size);
+ gs->performance_analysis.require(),
+ stats);
}
delete gs;
projects / mesa.git / blobdiff