intel/fs: Update location of Render Target Array Index for gen12

[mesa.git] / src / intel / compiler / brw_vec4_gs_visitor.cpp

diff --git a/src/intel/compiler/brw_vec4_gs_visitor.cpp b/src/intel/compiler/brw_vec4_gs_visitor.cpp
index f763f482365bc82e6183fb6de04c393a8aa35ca6..ce341806c7b93ebe3ca79e775f67e7cae45aac3a 100644 (file)
--- a/src/intel/compiler/brw_vec4_gs_visitor.cpp
+++ b/src/intel/compiler/brw_vec4_gs_visitor.cpp
@@ -32,7 +32,7 @@
 #include "brw_cfg.h"
 #include "brw_fs.h"
 #include "brw_nir.h"
-#include "common/gen_debug.h"
+#include "dev/gen_debug.h"
 
 namespace brw {
 
@@ -44,7 +44,7 @@ vec4_gs_visitor::vec4_gs_visitor(const struct brw_compiler *compiler,
                                  void *mem_ctx,
                                  bool no_spills,
                                  int shader_time_index)
-   : vec4_visitor(compiler, log_data, &c->key.tex,
+   : vec4_visitor(compiler, log_data, &c->key.base.tex,
                   &prog_data->base, shader,  mem_ctx,
                   no_spills, shader_time_index),
      c(c),
@@ -422,7 +422,7 @@ vec4_gs_visitor::set_stream_control_data_bits(unsigned stream_id)
    assert(c->control_data_bits_per_vertex == 2);
 
    /* Must be a valid stream */
-   assert(stream_id >= 0 && stream_id < MAX_VERTEX_STREAMS);
+   assert(stream_id < MAX_VERTEX_STREAMS);
 
    /* Control data bits are initialized to 0 so we don't have to set any
     * bits when sending vertices to stream 0.
@@ -615,10 +615,10 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
                void *mem_ctx,
                const struct brw_gs_prog_key *key,
                struct brw_gs_prog_data *prog_data,
-               const nir_shader *src_shader,
+               nir_shader *shader,
                struct gl_program *prog,
                int shader_time_index,
-               unsigned *final_assembly_size,
+               struct brw_compile_stats *stats,
                char **error_str)
 {
    struct brw_gs_compile c;
@@ -626,7 +626,6 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
    c.key = *key;
 
    const bool is_scalar = compiler->scalar_stage[MESA_SHADER_GEOMETRY];
-   nir_shader *shader = nir_shader_clone(mem_ctx, src_shader);
 
    /* The GLSL linker will have already matched up GS inputs and the outputs
     * of prior stages.  The driver does extend VS outputs in some cases, but
@@ -639,12 +638,12 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
    GLbitfield64 inputs_read = shader->info.inputs_read;
    brw_compute_vue_map(compiler->devinfo,
                        &c.input_vue_map, inputs_read,
-                       shader->info.separate_shader);
+                       shader->info.separate_shader, 1);
 
-   shader = brw_nir_apply_sampler_key(shader, compiler, &key->tex, is_scalar);
+   brw_nir_apply_key(shader, compiler, &key->base, 8, is_scalar);
    brw_nir_lower_vue_inputs(shader, &c.input_vue_map);
-   brw_nir_lower_vue_outputs(shader, is_scalar);
-   shader = brw_postprocess_nir(shader, compiler, is_scalar);
+   brw_nir_lower_vue_outputs(shader);
+   brw_postprocess_nir(shader, compiler, is_scalar);
 
    prog_data->base.clip_distance_mask =
       ((1 << shader->info.clip_distance_array_size) - 1);
@@ -669,7 +668,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
          prog_data->control_data_format = GEN7_GS_CONTROL_DATA_FORMAT_GSCTL_SID;
 
          /* We only have to emit control bits if we are using streams */
-         if (prog && prog->info.gs.uses_streams)
+         if (shader->info.gs.uses_streams)
             c.control_data_bits_per_vertex = 2;
          else
             c.control_data_bits_per_vertex = 0;
@@ -857,9 +856,8 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
          prog_data->base.dispatch_mode = DISPATCH_MODE_SIMD8;
          prog_data->base.base.dispatch_grf_start_reg = v.payload.num_regs;
 
-         fs_generator g(compiler, log_data, mem_ctx, &c.key,
-                        &prog_data->base.base, v.promoted_constants,
-                        false, MESA_SHADER_GEOMETRY);
+         fs_generator g(compiler, log_data, mem_ctx,
+                        &prog_data->base.base, false, MESA_SHADER_GEOMETRY);
          if (unlikely(INTEL_DEBUG & DEBUG_GS)) {
             const char *label =
                shader->info.label ? shader->info.label : "unnamed";
@@ -867,8 +865,9 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
                                          label, shader->info.name);
             g.enable_debug(name);
          }
-         g.generate_code(v.cfg, 8);
-         return g.get_assembly(final_assembly_size);
+         g.generate_code(v.cfg, 8, v.shader_stats,
+                         v.performance_analysis.require(), stats);
+         return g.get_assembly();
       }
    }
 
@@ -890,17 +889,18 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
           * values.
           */
          const unsigned param_count = prog_data->base.base.nr_params;
-         gl_constant_value **param = ralloc_array(NULL, gl_constant_value*,
-                                                  param_count);
+         uint32_t *param = ralloc_array(NULL, uint32_t, param_count);
          memcpy(param, prog_data->base.base.param,
-                sizeof(gl_constant_value*) * param_count);
+                sizeof(uint32_t) * param_count);
 
          if (v.run()) {
             /* Success! Backup is not needed */
             ralloc_free(param);
             return brw_vec4_generate_assembly(compiler, log_data, mem_ctx,
-                                              shader, &prog_data->base, v.cfg,
-                                              final_assembly_size);
+                                              shader, &prog_data->base,
+                                              v.cfg,
+                                              v.performance_analysis.require(),
+                                              stats);
          } else {
             /* These variables could be modified by the execution of the GS
              * visitor if it packed the uniforms in the push constant buffer.
@@ -910,8 +910,9 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
              * FIXME: Could more variables be modified by this execution?
              */
             memcpy(prog_data->base.base.param, param,
-                   sizeof(gl_constant_value*) * param_count);
+                   sizeof(uint32_t) * param_count);
             prog_data->base.base.nr_params = param_count;
+            prog_data->base.base.nr_pull_params = 0;
             ralloc_free(param);
          }
       }
@@ -963,7 +964,8 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
    } else {
       ret = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, shader,
                                        &prog_data->base, gs->cfg,
-                                       final_assembly_size);
+                                       gs->performance_analysis.require(),
+                                       stats);
    }
 
    delete gs;