intel/nir: Lower things with > 4 components in lower_mem_access_bit_sizes

[mesa.git] / src / intel / isl / isl_drm.c

diff --git a/src/intel/isl/isl_drm.c b/src/intel/isl/isl_drm.c
index e7abe74778516fcd01f7a0a7bc366f4c93b8acbe..c13a26c31ce15de61794cb3313fb490f1fc1fb31 100644 (file)
--- a/src/intel/isl/isl_drm.c
+++ b/src/intel/isl/isl_drm.c
@@ -41,13 +41,14 @@ isl_tiling_to_i915_tiling(enum isl_tiling tiling)
       return I915_TILING_X;
 
    case ISL_TILING_Y0:
+   case ISL_TILING_HIZ:
+   case ISL_TILING_CCS:
       return I915_TILING_Y;
 
    case ISL_TILING_W:
    case ISL_TILING_Yf:
    case ISL_TILING_Ys:
-   case ISL_TILING_HIZ:
-   case ISL_TILING_CCS:
+   case ISL_TILING_GEN12_CCS:
       return I915_TILING_NONE;
    }
 
@@ -94,6 +95,13 @@ static const struct isl_drm_modifier_info modifier_info[] = {
       .aux_usage = ISL_AUX_USAGE_CCS_E,
       .supports_clear_color = false,
    },
+   {
+      .modifier = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
+      .name = "I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS",
+      .tiling = ISL_TILING_Y0,
+      .aux_usage = ISL_AUX_USAGE_GEN12_CCS_E,
+      .supports_clear_color = false,
+   },
 };
 
 const struct isl_drm_modifier_info *