/**************************************************************************
*
- * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * Copyright 2003 VMware, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
- * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
+ * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#include "main/glheader.h"
#include "main/mtypes.h"
-#include "main/imports.h"
+#include "util/imports.h"
#include "main/macros.h"
-#include "main/colormac.h"
#include "main/renderbuffer.h"
#include "main/framebuffer.h"
{
BATCH_LOCALS;
- BEGIN_BATCH(17);
+ BEGIN_BATCH(15);
OUT_BATCH(_3DSTATE_AA_CMD |
AA_LINE_ECAAR_WIDTH_ENABLE |
CSB_TCB(3, 3) |
CSB_TCB(4, 4) | CSB_TCB(5, 5) | CSB_TCB(6, 6) | CSB_TCB(7, 7));
- /* Need to initialize this to zero.
- */
- OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | (0));
+ OUT_BATCH(_3DSTATE_SCISSOR_RECT_0_CMD);
+ OUT_BATCH(0);
OUT_BATCH(0);
/* XXX: Use this */
OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
- OUT_BATCH(_3DSTATE_SCISSOR_RECT_0_CMD);
- OUT_BATCH(0);
- OUT_BATCH(0);
-
OUT_BATCH(_3DSTATE_DEPTH_SUBRECT_DISABLE);
OUT_BATCH(_3DSTATE_LOAD_INDIRECT | 0); /* disable indirect state */
#define emit(intel, state, size ) \
- intel_batchbuffer_data(intel, state, size, false)
+ intel_batchbuffer_data(intel, state, size)
static GLuint
get_dirty(struct i915_hw_state *state)
* batchbuffer fills up.
*/
intel_batchbuffer_require_space(intel,
- get_state_size(state) + INTEL_PRIM_EMIT_SIZE,
- false);
+ get_state_size(state) +
+ INTEL_PRIM_EMIT_SIZE);
count = 0;
again:
if (intel->batch.bo == NULL) {
assert(get_dirty(state) == 0);
if (INTEL_DEBUG & DEBUG_STATE)
- fprintf(stderr, "%s dirty: %x\n", __FUNCTION__, dirty);
+ fprintf(stderr, "%s dirty: %x\n", __func__, dirty);
if (dirty & I915_UPLOAD_INVARIENT) {
if (INTEL_DEBUG & DEBUG_STATE)
OUT_BATCH(state->Buffer[I915_DESTREG_DV0]);
OUT_BATCH(state->Buffer[I915_DESTREG_DV1]);
- OUT_BATCH(state->Buffer[I915_DESTREG_SENABLE]);
OUT_BATCH(state->Buffer[I915_DESTREG_SR0]);
OUT_BATCH(state->Buffer[I915_DESTREG_SR1]);
OUT_BATCH(state->Buffer[I915_DESTREG_SR2]);
+ OUT_BATCH(state->Buffer[I915_DESTREG_SENABLE]);
if (state->Buffer[I915_DESTREG_DRAWRECT0] != MI_NOOP)
OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT0]);
state[1] = buffer_id;
if (region != NULL) {
- state[1] |= BUF_3D_PITCH(region->pitch * region->cpp);
+ state[1] |= BUF_3D_PITCH(region->pitch);
if (region->tiling != I915_TILING_NONE) {
state[1] |= BUF_3D_TILED_SURFACE;
static uint32_t i915_render_target_format_for_mesa_format[MESA_FORMAT_COUNT] =
{
- [MESA_FORMAT_ARGB8888] = DV_PF_8888,
- [MESA_FORMAT_XRGB8888] = DV_PF_8888,
- [MESA_FORMAT_RGB565] = DV_PF_565 | DITHER_FULL_ALWAYS,
- [MESA_FORMAT_ARGB1555] = DV_PF_1555 | DITHER_FULL_ALWAYS,
- [MESA_FORMAT_ARGB4444] = DV_PF_4444 | DITHER_FULL_ALWAYS,
+ [MESA_FORMAT_B8G8R8A8_UNORM] = DV_PF_8888,
+ [MESA_FORMAT_B8G8R8X8_UNORM] = DV_PF_8888,
+ [MESA_FORMAT_B5G6R5_UNORM] = DV_PF_565 | DITHER_FULL_ALWAYS,
+ [MESA_FORMAT_B5G5R5A1_UNORM] = DV_PF_1555 | DITHER_FULL_ALWAYS,
+ [MESA_FORMAT_B4G4R4A4_UNORM] = DV_PF_4444 | DITHER_FULL_ALWAYS,
};
static bool
i915_render_target_supported(struct intel_context *intel,
struct gl_renderbuffer *rb)
{
- gl_format format = rb->Format;
+ mesa_format format = rb->Format;
- if (format == MESA_FORMAT_S8_Z24 ||
- format == MESA_FORMAT_X8_Z24 ||
- format == MESA_FORMAT_Z16) {
+ if (format == MESA_FORMAT_Z24_UNORM_S8_UINT ||
+ format == MESA_FORMAT_Z24_UNORM_X8_UINT ||
+ format == MESA_FORMAT_Z_UNORM16) {
return true;
}
value |= DV_PF_8888;
}
- /* This isn't quite safe, thus being hidden behind an option. When changing
- * the value of this bit, the pipeline needs to be MI_FLUSHed. And it
- * can only be set when a depth buffer is already defined.
- */
- if (intel->is_945 && intel->use_early_z &&
- depth_region->tiling != I915_TILING_NONE)
- value |= CLASSIC_EARLY_DEPTH;
-
if (depth_region && depth_region->cpp == 4) {
value |= DEPTH_FRMT_24_FIXED_8_OTHER;
}
*/
if (ctx->NewState & _NEW_BUFFERS) {
/* this updates the DrawBuffer->_NumColorDrawBuffers fields, etc */
- _mesa_update_framebuffer(ctx);
+ _mesa_update_framebuffer(ctx, ctx->ReadBuffer, ctx->DrawBuffer);
/* this updates the DrawBuffer's Width/Height if it's a FBO */
- _mesa_update_draw_buffer_bounds(ctx);
+ _mesa_update_draw_buffer_bounds(ctx, ctx->DrawBuffer);
}
if (fb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) {
/* Check for stencil fallback. */
if (irbStencil && irbStencil->mt) {
- assert(intel_rb_format(irbStencil) == MESA_FORMAT_S8_Z24);
+ assert(intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_S8_UINT);
FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, false);
} else if (irbStencil && !irbStencil->mt) {
FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, true);
* we still need to set up the shared depth/stencil state so we can use it.
*/
if (depthRegion == NULL && irbStencil && irbStencil->mt
- && intel_rb_format(irbStencil) == MESA_FORMAT_S8_Z24) {
+ && intel_rb_format(irbStencil) == MESA_FORMAT_Z24_UNORM_S8_UINT) {
depthRegion = irbStencil->mt->region;
}
fb->_NumColorDrawBuffers);
intel->NewGLState |= _NEW_BUFFERS;
- /* update viewport since it depends on window size */
- intelCalcViewport(ctx);
-
/* Set state we know depends on drawable parameters:
*/
- ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y,
- ctx->Scissor.Width, ctx->Scissor.Height);
- ctx->Driver.DepthRange(ctx, ctx->Viewport.Near, ctx->Viewport.Far);
+ intelCalcViewport(ctx);
+ ctx->Driver.Scissor(ctx);
/* Update culling direction which changes depending on the
* orientation of the buffer:
(void) dirty;
}
-/** Return false; i915 does not support HiZ. */
-static bool
-i915_is_hiz_depth_format(struct intel_context *intel,
- gl_format format)
-{
- return false;
-}
-
static void
i915_invalidate_state(struct intel_context *intel, GLuint new_state)
{
i915->intel.vtbl.finish_batch = intel_finish_vb;
i915->intel.vtbl.invalidate_state = i915_invalidate_state;
i915->intel.vtbl.render_target_supported = i915_render_target_supported;
- i915->intel.vtbl.is_hiz_depth_format = i915_is_hiz_depth_format;
}
projects / mesa.git / blobdiff