*/
/**
- * @file intel_bufmgr.h
+ * @file brw_bufmgr.h
*
* Public definitions of Intel-specific bufmgr functions.
*/
#ifndef INTEL_BUFMGR_H
#define INTEL_BUFMGR_H
-#include <stdio.h>
+#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
+#include "util/list.h"
#if defined(__cplusplus)
extern "C" {
#endif
-struct drm_clip_rect;
-
-typedef struct _drm_bacon_bufmgr drm_bacon_bufmgr;
-typedef struct _drm_bacon_context drm_bacon_context;
-typedef struct _drm_bacon_bo drm_bacon_bo;
-
-struct _drm_bacon_bo {
- /**
- * Size in bytes of the buffer object.
- *
- * The size may be larger than the size originally requested for the
- * allocation, such as being aligned to page size.
- */
- unsigned long size;
-
- /**
- * Alignment requirement for object
- *
- * Used for GTT mapping & pinning the object.
- */
- unsigned long align;
-
- /**
- * Deprecated field containing (possibly the low 32-bits of) the last
- * seen virtual card address. Use offset64 instead.
- */
- unsigned long offset;
-
- /**
- * Virtual address for accessing the buffer data. Only valid while
- * mapped.
- */
-#ifdef __cplusplus
- void *virt;
-#else
- void *virtual;
+struct gen_device_info;
+struct brw_context;
+
+struct brw_bo {
+ /**
+ * Size in bytes of the buffer object.
+ *
+ * The size may be larger than the size originally requested for the
+ * allocation, such as being aligned to page size.
+ */
+ uint64_t size;
+
+ /**
+ * Alignment requirement for object
+ *
+ * Used for GTT mapping & pinning the object.
+ */
+ uint64_t align;
+
+ /** Buffer manager context associated with this buffer object */
+ struct brw_bufmgr *bufmgr;
+
+ /** The GEM handle for this buffer object. */
+ uint32_t gem_handle;
+
+ /**
+ * Last seen card virtual address (offset from the beginning of the
+ * aperture) for the object. This should be used to fill relocation
+ * entries when calling brw_bo_emit_reloc()
+ */
+ uint64_t offset64;
+
+ /**
+ * Boolean of whether the GPU is definitely not accessing the buffer.
+ *
+ * This is only valid when reusable, since non-reusable
+ * buffers are those that have been shared with other
+ * processes, so we don't know their state.
+ */
+ bool idle;
+
+ int refcount;
+ const char *name;
+
+#ifndef EXEC_OBJECT_CAPTURE
+#define EXEC_OBJECT_CAPTURE (1<<7)
#endif
+ uint64_t kflags;
+
+ /**
+ * Kenel-assigned global name for this object
+ *
+ * List contains both flink named and prime fd'd objects
+ */
+ unsigned int global_name;
+
+ /**
+ * Current tiling mode
+ */
+ uint32_t tiling_mode;
+ uint32_t swizzle_mode;
+ uint32_t stride;
+
+ time_t free_time;
+
+ /** Mapped address for the buffer, saved across map/unmap cycles */
+ void *map_cpu;
+ /** GTT virtual address for the buffer, saved across map/unmap cycles */
+ void *map_gtt;
+ /** WC CPU address for the buffer, saved across map/unmap cycles */
+ void *map_wc;
+
+ /** BO cache list */
+ struct list_head head;
+
+ /**
+ * Boolean of whether this buffer can be re-used
+ */
+ bool reusable;
+
+ /**
+ * Boolean of whether this buffer has been shared with an external client.
+ */
+ bool external;
+
+ /**
+ * Boolean of whether this buffer is cache coherent
+ */
+ bool cache_coherent;
+};
- /** Buffer manager context associated with this buffer object */
- drm_bacon_bufmgr *bufmgr;
+#define BO_ALLOC_FOR_RENDER (1<<0)
- /**
- * MM-specific handle for accessing object
- */
- int handle;
+/**
+ * Allocate a buffer object.
+ *
+ * Buffer objects are not necessarily initially mapped into CPU virtual
+ * address space or graphics device aperture. They must be mapped
+ * using brw_bo_map() to be used by the CPU.
+ */
+struct brw_bo *brw_bo_alloc(struct brw_bufmgr *bufmgr, const char *name,
+ uint64_t size, uint64_t alignment);
- /**
- * Last seen card virtual address (offset from the beginning of the
- * aperture) for the object. This should be used to fill relocation
- * entries when calling drm_bacon_bo_emit_reloc()
- */
- uint64_t offset64;
-};
+/**
+ * Allocate a tiled buffer object.
+ *
+ * Alignment for tiled objects is set automatically; the 'flags'
+ * argument provides a hint about how the object will be used initially.
+ *
+ * Valid tiling formats are:
+ * I915_TILING_NONE
+ * I915_TILING_X
+ * I915_TILING_Y
+ */
+struct brw_bo *brw_bo_alloc_tiled(struct brw_bufmgr *bufmgr,
+ const char *name,
+ uint64_t size,
+ uint32_t tiling_mode,
+ uint32_t pitch,
+ unsigned flags);
-#define BO_ALLOC_FOR_RENDER (1<<0)
+/**
+ * Allocate a tiled buffer object.
+ *
+ * Alignment for tiled objects is set automatically; the 'flags'
+ * argument provides a hint about how the object will be used initially.
+ *
+ * Valid tiling formats are:
+ * I915_TILING_NONE
+ * I915_TILING_X
+ * I915_TILING_Y
+ *
+ * Note the tiling format may be rejected; callers should check the
+ * 'tiling_mode' field on return, as well as the pitch value, which
+ * may have been rounded up to accommodate for tiling restrictions.
+ */
+struct brw_bo *brw_bo_alloc_tiled_2d(struct brw_bufmgr *bufmgr,
+ const char *name,
+ int x, int y, int cpp,
+ uint32_t tiling_mode,
+ uint32_t *pitch,
+ unsigned flags);
+
+/** Takes a reference on a buffer object */
+void brw_bo_reference(struct brw_bo *bo);
+
+/**
+ * Releases a reference on a buffer object, freeing the data if
+ * no references remain.
+ */
+void brw_bo_unreference(struct brw_bo *bo);
+
+/* Must match MapBufferRange interface (for convenience) */
+#define MAP_READ GL_MAP_READ_BIT
+#define MAP_WRITE GL_MAP_WRITE_BIT
+#define MAP_ASYNC GL_MAP_UNSYNCHRONIZED_BIT
+#define MAP_PERSISTENT GL_MAP_PERSISTENT_BIT
+#define MAP_COHERENT GL_MAP_COHERENT_BIT
+/* internal */
+#define MAP_INTERNAL_MASK (0xff << 24)
+#define MAP_RAW (0x01 << 24)
+
+/**
+ * Maps the buffer into userspace.
+ *
+ * This function will block waiting for any existing execution on the
+ * buffer to complete, first. The resulting mapping is returned.
+ */
+MUST_CHECK void *brw_bo_map(struct brw_context *brw, struct brw_bo *bo, unsigned flags);
+
+/**
+ * Reduces the refcount on the userspace mapping of the buffer
+ * object.
+ */
+static inline int brw_bo_unmap(struct brw_bo *bo) { return 0; }
+
+/** Write data into an object. */
+int brw_bo_subdata(struct brw_bo *bo, uint64_t offset,
+ uint64_t size, const void *data);
+/** Read data from an object. */
+int brw_bo_get_subdata(struct brw_bo *bo, uint64_t offset,
+ uint64_t size, void *data);
+/**
+ * Waits for rendering to an object by the GPU to have completed.
+ *
+ * This is not required for any access to the BO by bo_map,
+ * bo_subdata, etc. It is merely a way for the driver to implement
+ * glFinish.
+ */
+void brw_bo_wait_rendering(struct brw_bo *bo);
+
+/**
+ * Tears down the buffer manager instance.
+ */
+void brw_bufmgr_destroy(struct brw_bufmgr *bufmgr);
-drm_bacon_bo *drm_bacon_bo_alloc(drm_bacon_bufmgr *bufmgr, const char *name,
- unsigned long size, unsigned int alignment);
-drm_bacon_bo *drm_bacon_bo_alloc_for_render(drm_bacon_bufmgr *bufmgr,
- const char *name,
- unsigned long size,
- unsigned int alignment);
-drm_bacon_bo *drm_bacon_bo_alloc_userptr(drm_bacon_bufmgr *bufmgr,
- const char *name,
- void *addr, uint32_t tiling_mode,
- uint32_t stride, unsigned long size,
- unsigned long flags);
-drm_bacon_bo *drm_bacon_bo_alloc_tiled(drm_bacon_bufmgr *bufmgr,
- const char *name,
- int x, int y, int cpp,
- uint32_t *tiling_mode,
- unsigned long *pitch,
- unsigned long flags);
-void drm_bacon_bo_reference(drm_bacon_bo *bo);
-void drm_bacon_bo_unreference(drm_bacon_bo *bo);
-int drm_bacon_bo_map(drm_bacon_bo *bo, int write_enable);
-int drm_bacon_bo_unmap(drm_bacon_bo *bo);
-
-int drm_bacon_bo_subdata(drm_bacon_bo *bo, unsigned long offset,
- unsigned long size, const void *data);
-int drm_bacon_bo_get_subdata(drm_bacon_bo *bo, unsigned long offset,
- unsigned long size, void *data);
-void drm_bacon_bo_wait_rendering(drm_bacon_bo *bo);
-
-void drm_bacon_bufmgr_set_debug(drm_bacon_bufmgr *bufmgr, int enable_debug);
-void drm_bacon_bufmgr_destroy(drm_bacon_bufmgr *bufmgr);
-int drm_bacon_bo_exec(drm_bacon_bo *bo, int used,
- struct drm_clip_rect *cliprects, int num_cliprects, int DR4);
-int drm_bacon_bo_mrb_exec(drm_bacon_bo *bo, int used,
- struct drm_clip_rect *cliprects, int num_cliprects, int DR4,
- unsigned int flags);
-int drm_bacon_bufmgr_check_aperture_space(drm_bacon_bo ** bo_array, int count);
-
-int drm_bacon_bo_emit_reloc(drm_bacon_bo *bo, uint32_t offset,
- drm_bacon_bo *target_bo, uint32_t target_offset,
- uint32_t read_domains, uint32_t write_domain);
-int drm_bacon_bo_emit_reloc_fence(drm_bacon_bo *bo, uint32_t offset,
- drm_bacon_bo *target_bo,
- uint32_t target_offset,
- uint32_t read_domains, uint32_t write_domain);
-int drm_bacon_bo_pin(drm_bacon_bo *bo, uint32_t alignment);
-int drm_bacon_bo_unpin(drm_bacon_bo *bo);
-int drm_bacon_bo_set_tiling(drm_bacon_bo *bo, uint32_t * tiling_mode,
- uint32_t stride);
-int drm_bacon_bo_get_tiling(drm_bacon_bo *bo, uint32_t * tiling_mode,
- uint32_t * swizzle_mode);
-int drm_bacon_bo_flink(drm_bacon_bo *bo, uint32_t * name);
-int drm_bacon_bo_busy(drm_bacon_bo *bo);
-int drm_bacon_bo_madvise(drm_bacon_bo *bo, int madv);
-int drm_bacon_bo_use_48b_address_range(drm_bacon_bo *bo, uint32_t enable);
-int drm_bacon_bo_set_softpin_offset(drm_bacon_bo *bo, uint64_t offset);
-
-int drm_bacon_bo_disable_reuse(drm_bacon_bo *bo);
-int drm_bacon_bo_is_reusable(drm_bacon_bo *bo);
-int drm_bacon_bo_references(drm_bacon_bo *bo, drm_bacon_bo *target_bo);
+/**
+ * Get the current tiling (and resulting swizzling) mode for the bo.
+ *
+ * \param buf Buffer to get tiling mode for
+ * \param tiling_mode returned tiling mode
+ * \param swizzle_mode returned swizzling mode
+ */
+int brw_bo_get_tiling(struct brw_bo *bo, uint32_t *tiling_mode,
+ uint32_t *swizzle_mode);
+
+/**
+ * Create a visible name for a buffer which can be used by other apps
+ *
+ * \param buf Buffer to create a name for
+ * \param name Returned name
+ */
+int brw_bo_flink(struct brw_bo *bo, uint32_t *name);
+
+/**
+ * Returns 1 if mapping the buffer for write could cause the process
+ * to block, due to the object being active in the GPU.
+ */
+int brw_bo_busy(struct brw_bo *bo);
+
+/**
+ * Specify the volatility of the buffer.
+ * \param bo Buffer to create a name for
+ * \param madv The purgeable status
+ *
+ * Use I915_MADV_DONTNEED to mark the buffer as purgeable, and it will be
+ * reclaimed under memory pressure. If you subsequently require the buffer,
+ * then you must pass I915_MADV_WILLNEED to mark the buffer as required.
+ *
+ * Returns 1 if the buffer was retained, or 0 if it was discarded whilst
+ * marked as I915_MADV_DONTNEED.
+ */
+int brw_bo_madvise(struct brw_bo *bo, int madv);
/* drm_bacon_bufmgr_gem.c */
-drm_bacon_bufmgr *drm_bacon_bufmgr_gem_init(int fd, int batch_size);
-drm_bacon_bo *drm_bacon_bo_gem_create_from_name(drm_bacon_bufmgr *bufmgr,
- const char *name,
- unsigned int handle);
-void drm_bacon_bufmgr_gem_enable_reuse(drm_bacon_bufmgr *bufmgr);
-void drm_bacon_bufmgr_gem_enable_fenced_relocs(drm_bacon_bufmgr *bufmgr);
-void drm_bacon_bufmgr_gem_set_vma_cache_size(drm_bacon_bufmgr *bufmgr,
- int limit);
-int drm_bacon_gem_bo_map_unsynchronized(drm_bacon_bo *bo);
-int drm_bacon_gem_bo_map_gtt(drm_bacon_bo *bo);
-int drm_bacon_gem_bo_unmap_gtt(drm_bacon_bo *bo);
-
-#define HAVE_DRM_INTEL_GEM_BO_DISABLE_IMPLICIT_SYNC 1
-int drm_bacon_bufmgr_gem_can_disable_implicit_sync(drm_bacon_bufmgr *bufmgr);
-void drm_bacon_gem_bo_disable_implicit_sync(drm_bacon_bo *bo);
-void drm_bacon_gem_bo_enable_implicit_sync(drm_bacon_bo *bo);
-
-void *drm_bacon_gem_bo_map__cpu(drm_bacon_bo *bo);
-void *drm_bacon_gem_bo_map__gtt(drm_bacon_bo *bo);
-void *drm_bacon_gem_bo_map__wc(drm_bacon_bo *bo);
-
-int drm_bacon_gem_bo_get_reloc_count(drm_bacon_bo *bo);
-void drm_bacon_gem_bo_clear_relocs(drm_bacon_bo *bo, int start);
-void drm_bacon_gem_bo_start_gtt_access(drm_bacon_bo *bo, int write_enable);
-
-int drm_bacon_get_pipe_from_crtc_id(drm_bacon_bufmgr *bufmgr, int crtc_id);
-
-int drm_bacon_bufmgr_gem_get_devid(drm_bacon_bufmgr *bufmgr);
-int drm_bacon_gem_bo_wait(drm_bacon_bo *bo, int64_t timeout_ns);
-
-drm_bacon_context *drm_bacon_gem_context_create(drm_bacon_bufmgr *bufmgr);
-int drm_bacon_gem_context_get_id(drm_bacon_context *ctx,
- uint32_t *ctx_id);
-void drm_bacon_gem_context_destroy(drm_bacon_context *ctx);
-int drm_bacon_gem_bo_context_exec(drm_bacon_bo *bo, drm_bacon_context *ctx,
- int used, unsigned int flags);
-int drm_bacon_gem_bo_fence_exec(drm_bacon_bo *bo,
- drm_bacon_context *ctx,
- int used,
- int in_fence,
- int *out_fence,
- unsigned int flags);
-
-int drm_bacon_bo_gem_export_to_prime(drm_bacon_bo *bo, int *prime_fd);
-drm_bacon_bo *drm_bacon_bo_gem_create_from_prime(drm_bacon_bufmgr *bufmgr,
- int prime_fd, int size);
-
-int drm_bacon_reg_read(drm_bacon_bufmgr *bufmgr,
- uint32_t offset,
- uint64_t *result);
-
-int drm_bacon_get_reset_stats(drm_bacon_context *ctx,
- uint32_t *reset_count,
- uint32_t *active,
- uint32_t *pending);
-
-int drm_bacon_get_subslice_total(int fd, unsigned int *subslice_total);
-int drm_bacon_get_eu_total(int fd, unsigned int *eu_total);
-
-int drm_bacon_get_pooled_eu(int fd);
-int drm_bacon_get_min_eu_in_pool(int fd);
+struct brw_bufmgr *brw_bufmgr_init(struct gen_device_info *devinfo,
+ int fd, int batch_size);
+struct brw_bo *brw_bo_gem_create_from_name(struct brw_bufmgr *bufmgr,
+ const char *name,
+ unsigned int handle);
+void brw_bufmgr_enable_reuse(struct brw_bufmgr *bufmgr);
+
+int brw_bo_wait(struct brw_bo *bo, int64_t timeout_ns);
+
+uint32_t brw_create_hw_context(struct brw_bufmgr *bufmgr);
+void brw_destroy_hw_context(struct brw_bufmgr *bufmgr, uint32_t ctx_id);
+
+int brw_bo_gem_export_to_prime(struct brw_bo *bo, int *prime_fd);
+struct brw_bo *brw_bo_gem_create_from_prime(struct brw_bufmgr *bufmgr,
+ int prime_fd);
+
+int brw_reg_read(struct brw_bufmgr *bufmgr, uint32_t offset,
+ uint64_t *result);
/** @{ */
#if defined(__cplusplus)
}
#endif
-
#endif /* INTEL_BUFMGR_H */
projects / mesa.git / blobdiff