i965/bxt: Add 2x6 variant
[mesa.git] / src / mesa / drivers / dri / i965 / brw_device_info.c
index 51a91b6c0d9d5cc20d1c6051ee273a3ff7923fd6..77bbe7855801a666f2d72eff7348aec0b96c0639 100644 (file)
@@ -28,6 +28,7 @@
 static const struct brw_device_info brw_device_info_i965 = {
    .gen = 4,
    .has_negative_rhw_bug = true,
+   .num_slices = 1,
    .max_vs_threads = 16,
    .max_gs_threads = 2,
    .max_wm_threads = 8 * 4,
@@ -42,6 +43,7 @@ static const struct brw_device_info brw_device_info_g4x = {
    .has_compr4 = true,
    .has_surface_tile_offset = true,
    .is_g4x = true,
+   .num_slices = 1,
    .max_vs_threads = 32,
    .max_gs_threads = 2,
    .max_wm_threads = 10 * 5,
@@ -55,6 +57,7 @@ static const struct brw_device_info brw_device_info_ilk = {
    .has_pln = true,
    .has_compr4 = true,
    .has_surface_tile_offset = true,
+   .num_slices = 1,
    .max_vs_threads = 72,
    .max_gs_threads = 32,
    .max_wm_threads = 12 * 6,
@@ -71,6 +74,7 @@ static const struct brw_device_info brw_device_info_snb_gt1 = {
    .has_pln = true,
    .has_surface_tile_offset = true,
    .needs_unlit_centroid_workaround = true,
+   .num_slices = 1,
    .max_vs_threads = 24,
    .max_gs_threads = 21, /* conservative; 24 if rendering disabled. */
    .max_wm_threads = 40,
@@ -90,6 +94,7 @@ static const struct brw_device_info brw_device_info_snb_gt2 = {
    .has_pln = true,
    .has_surface_tile_offset = true,
    .needs_unlit_centroid_workaround = true,
+   .num_slices = 1,
    .max_vs_threads = 60,
    .max_gs_threads = 60,
    .max_wm_threads = 80,
@@ -112,6 +117,7 @@ static const struct brw_device_info brw_device_info_snb_gt2 = {
 static const struct brw_device_info brw_device_info_ivb_gt1 = {
    GEN7_FEATURES, .is_ivybridge = true, .gt = 1,
    .needs_unlit_centroid_workaround = true,
+   .num_slices = 1,
    .max_vs_threads = 36,
    .max_hs_threads = 36,
    .max_ds_threads = 36,
@@ -123,6 +129,7 @@ static const struct brw_device_info brw_device_info_ivb_gt1 = {
       .min_vs_entries = 32,
       .max_vs_entries = 512,
       .max_hs_entries = 32,
+      .min_ds_entries = 10,
       .max_ds_entries = 288,
       .max_gs_entries = 192,
    },
@@ -131,6 +138,7 @@ static const struct brw_device_info brw_device_info_ivb_gt1 = {
 static const struct brw_device_info brw_device_info_ivb_gt2 = {
    GEN7_FEATURES, .is_ivybridge = true, .gt = 2,
    .needs_unlit_centroid_workaround = true,
+   .num_slices = 1,
    .max_vs_threads = 128,
    .max_hs_threads = 128,
    .max_ds_threads = 128,
@@ -142,6 +150,7 @@ static const struct brw_device_info brw_device_info_ivb_gt2 = {
       .min_vs_entries = 32,
       .max_vs_entries = 704,
       .max_hs_entries = 64,
+      .min_ds_entries = 10,
       .max_ds_entries = 448,
       .max_gs_entries = 320,
    },
@@ -150,6 +159,7 @@ static const struct brw_device_info brw_device_info_ivb_gt2 = {
 static const struct brw_device_info brw_device_info_byt = {
    GEN7_FEATURES, .is_baytrail = true, .gt = 1,
    .needs_unlit_centroid_workaround = true,
+   .num_slices = 1,
    .has_llc = false,
    .max_vs_threads = 36,
    .max_hs_threads = 36,
@@ -162,6 +172,7 @@ static const struct brw_device_info brw_device_info_byt = {
       .min_vs_entries = 32,
       .max_vs_entries = 512,
       .max_hs_entries = 32,
+      .min_ds_entries = 10,
       .max_ds_entries = 288,
       .max_gs_entries = 192,
    },
@@ -175,6 +186,7 @@ static const struct brw_device_info brw_device_info_byt = {
 
 static const struct brw_device_info brw_device_info_hsw_gt1 = {
    HSW_FEATURES, .gt = 1,
+   .num_slices = 1,
    .max_vs_threads = 70,
    .max_hs_threads = 70,
    .max_ds_threads = 70,
@@ -186,6 +198,7 @@ static const struct brw_device_info brw_device_info_hsw_gt1 = {
       .min_vs_entries = 32,
       .max_vs_entries = 640,
       .max_hs_entries = 64,
+      .min_ds_entries = 10,
       .max_ds_entries = 384,
       .max_gs_entries = 256,
    },
@@ -193,6 +206,7 @@ static const struct brw_device_info brw_device_info_hsw_gt1 = {
 
 static const struct brw_device_info brw_device_info_hsw_gt2 = {
    HSW_FEATURES, .gt = 2,
+   .num_slices = 1,
    .max_vs_threads = 280,
    .max_hs_threads = 256,
    .max_ds_threads = 280,
@@ -204,6 +218,7 @@ static const struct brw_device_info brw_device_info_hsw_gt2 = {
       .min_vs_entries = 64,
       .max_vs_entries = 1664,
       .max_hs_entries = 128,
+      .min_ds_entries = 10,
       .max_ds_entries = 960,
       .max_gs_entries = 640,
    },
@@ -211,6 +226,7 @@ static const struct brw_device_info brw_device_info_hsw_gt2 = {
 
 static const struct brw_device_info brw_device_info_hsw_gt3 = {
    HSW_FEATURES, .gt = 3,
+   .num_slices = 2,
    .max_vs_threads = 280,
    .max_hs_threads = 256,
    .max_ds_threads = 280,
@@ -222,6 +238,7 @@ static const struct brw_device_info brw_device_info_hsw_gt3 = {
       .min_vs_entries = 64,
       .max_vs_entries = 1664,
       .max_hs_entries = 128,
+      .min_ds_entries = 10,
       .max_ds_entries = 960,
       .max_gs_entries = 640,
    },
@@ -243,12 +260,14 @@ static const struct brw_device_info brw_device_info_hsw_gt3 = {
 
 static const struct brw_device_info brw_device_info_bdw_gt1 = {
    GEN8_FEATURES, .gt = 1,
+   .num_slices = 1,
    .max_cs_threads = 42,
    .urb = {
       .size = 192,
       .min_vs_entries = 64,
       .max_vs_entries = 2560,
       .max_hs_entries = 504,
+      .min_ds_entries = 34,
       .max_ds_entries = 1536,
       .max_gs_entries = 960,
    }
@@ -256,12 +275,14 @@ static const struct brw_device_info brw_device_info_bdw_gt1 = {
 
 static const struct brw_device_info brw_device_info_bdw_gt2 = {
    GEN8_FEATURES, .gt = 2,
+   .num_slices = 1,
    .max_cs_threads = 56,
    .urb = {
       .size = 384,
       .min_vs_entries = 64,
       .max_vs_entries = 2560,
       .max_hs_entries = 504,
+      .min_ds_entries = 34,
       .max_ds_entries = 1536,
       .max_gs_entries = 960,
    }
@@ -269,12 +290,14 @@ static const struct brw_device_info brw_device_info_bdw_gt2 = {
 
 static const struct brw_device_info brw_device_info_bdw_gt3 = {
    GEN8_FEATURES, .gt = 3,
+   .num_slices = 2,
    .max_cs_threads = 56,
    .urb = {
       .size = 384,
       .min_vs_entries = 64,
       .max_vs_entries = 2560,
       .max_hs_entries = 504,
+      .min_ds_entries = 34,
       .max_ds_entries = 1536,
       .max_gs_entries = 960,
    }
@@ -283,23 +306,24 @@ static const struct brw_device_info brw_device_info_bdw_gt3 = {
 static const struct brw_device_info brw_device_info_chv = {
    GEN8_FEATURES, .is_cherryview = 1, .gt = 1,
    .has_llc = false,
+   .num_slices = 1,
    .max_vs_threads = 80,
    .max_hs_threads = 80,
    .max_ds_threads = 80,
    .max_gs_threads = 80,
    .max_wm_threads = 128,
-   .max_cs_threads = 28,
+   .max_cs_threads = 6 * 7,
    .urb = {
       .size = 192,
       .min_vs_entries = 34,
       .max_vs_entries = 640,
       .max_hs_entries = 80,
+      .min_ds_entries = 34,
       .max_ds_entries = 384,
       .max_gs_entries = 256,
    }
 };
 
-/* Thread counts and URB limits are placeholders, and may not be accurate. */
 #define GEN9_FEATURES                               \
    .gen = 9,                                        \
    .has_hiz_and_separate_stencil = true,            \
@@ -307,34 +331,51 @@ static const struct brw_device_info brw_device_info_chv = {
    .must_use_separate_stencil = true,               \
    .has_llc = true,                                 \
    .has_pln = true,                                 \
-   .max_vs_threads = 280,                           \
-   .max_gs_threads = 256,                           \
-   .max_wm_threads = 408,                           \
+   .supports_simd16_3src = true,                    \
+   .max_vs_threads = 336,                           \
+   .max_gs_threads = 336,                           \
+   .max_hs_threads = 336,                           \
+   .max_ds_threads = 336,                           \
+   .max_wm_threads = 64 * 9,                        \
+   .max_cs_threads = 56,                            \
    .urb = {                                         \
-      .size = 128,                                  \
+      .size = 384,                                  \
       .min_vs_entries = 64,                         \
-      .max_vs_entries = 1664,                       \
+      .max_vs_entries = 1856,                       \
+      .max_hs_entries = 672,                        \
+      .min_ds_entries = 34,                         \
+      .max_ds_entries = 1120,                       \
       .max_gs_entries = 640,                        \
    }
 
-static const struct brw_device_info brw_device_info_skl_early = {
-   GEN9_FEATURES, .gt = 1,
-   .supports_simd16_3src = false,
-};
-
 static const struct brw_device_info brw_device_info_skl_gt1 = {
    GEN9_FEATURES, .gt = 1,
-   .supports_simd16_3src = true,
+   .num_slices = 1,
+   .urb.size = 192,
 };
 
 static const struct brw_device_info brw_device_info_skl_gt2 = {
    GEN9_FEATURES, .gt = 2,
-   .supports_simd16_3src = true,
+   .num_slices = 1,
 };
 
 static const struct brw_device_info brw_device_info_skl_gt3 = {
    GEN9_FEATURES, .gt = 3,
-   .supports_simd16_3src = true,
+   .num_slices = 2,
+};
+
+static const struct brw_device_info brw_device_info_skl_gt4 = {
+   GEN9_FEATURES, .gt = 4,
+   .num_slices = 3,
+   /* From the "L3 Allocation and Programming" documentation:
+    *
+    * "URB is limited to 1008KB due to programming restrictions.  This is not a
+    * restriction of the L3 implementation, but of the FF and other clients.
+    * Therefore, in a GT4 implementation it is possible for the programmed
+    * allocation of the L3 data array to provide 3*384KB=1152KB for URB, but
+    * only 1008KB of this will be used."
+    */
+   .urb.size = 1008 / 3,
 };
 
 static const struct brw_device_info brw_device_info_bxt = {
@@ -342,19 +383,113 @@ static const struct brw_device_info brw_device_info_bxt = {
    .is_broxton = 1,
    .gt = 1,
    .has_llc = false,
+
+   .num_slices = 1,
    .max_vs_threads = 112,
+   .max_hs_threads = 112,
+   .max_ds_threads = 112,
    .max_gs_threads = 112,
-   .max_wm_threads = 32,
+   .max_wm_threads = 64 * 3,
+   .max_cs_threads = 6 * 6,
    .urb = {
-      .size = 64,
+      .size = 192,
       .min_vs_entries = 34,
-      .max_vs_entries = 640,
+      .max_vs_entries = 704,
+      .max_hs_entries = 256,
+      .max_ds_entries = 416,
       .max_gs_entries = 256,
    }
 };
 
+static const struct brw_device_info brw_device_info_bxt_2x6 = {
+   GEN9_FEATURES,
+   .is_broxton = 1,
+   .gt = 1,
+   .has_llc = false,
+
+   .num_slices = 1,
+   .max_vs_threads = 56, /* XXX: guess */
+   .max_hs_threads = 56, /* XXX: guess */
+   .max_ds_threads = 56,
+   .max_gs_threads = 56,
+   .max_wm_threads = 64 * 2,
+   .max_cs_threads = 6 * 6,
+   .urb = {
+      .size = 128,
+      .min_vs_entries = 34,
+      .max_vs_entries = 352,
+      .max_hs_entries = 128,
+      .max_ds_entries = 208,
+      .max_gs_entries = 128,
+   }
+};
+/*
+ * Note: for all KBL SKUs, the PRM says SKL for GS entries, not SKL+.
+ * There's no KBL entry. Using the default SKL (GEN9) GS entries value.
+ */
+
+/*
+ * Both SKL and KBL support a maximum of 64 threads per
+ * Pixel Shader Dispatch (PSD) unit.
+ */
+#define  KBL_MAX_THREADS_PER_PSD 64
+
+static const struct brw_device_info brw_device_info_kbl_gt1 = {
+   GEN9_FEATURES,
+   .gt = 1,
+
+   .max_cs_threads = 7 * 6,
+   .max_wm_threads = KBL_MAX_THREADS_PER_PSD * 2,
+   .urb.size = 192,
+   .num_slices = 1,
+};
+
+static const struct brw_device_info brw_device_info_kbl_gt1_5 = {
+   GEN9_FEATURES,
+   .gt = 1,
+
+   .max_cs_threads = 7 * 6,
+   .max_wm_threads = KBL_MAX_THREADS_PER_PSD * 3,
+   .num_slices = 1,
+};
+
+static const struct brw_device_info brw_device_info_kbl_gt2 = {
+   GEN9_FEATURES,
+   .gt = 2,
+
+   .max_wm_threads = KBL_MAX_THREADS_PER_PSD * 3,
+   .num_slices = 1,
+};
+
+static const struct brw_device_info brw_device_info_kbl_gt3 = {
+   GEN9_FEATURES,
+   .gt = 3,
+
+   .max_wm_threads = KBL_MAX_THREADS_PER_PSD * 6,
+   .num_slices = 2,
+};
+
+static const struct brw_device_info brw_device_info_kbl_gt4 = {
+   GEN9_FEATURES,
+   .gt = 4,
+
+   .max_wm_threads = KBL_MAX_THREADS_PER_PSD * 9,
+   /*
+    * From the "L3 Allocation and Programming" documentation:
+    *
+    * "URB is limited to 1008KB due to programming restrictions.  This
+    *  is not a restriction of the L3 implementation, but of the FF and
+    *  other clients.  Therefore, in a GT4 implementation it is
+    *  possible for the programmed allocation of the L3 data array to
+    *  provide 3*384KB=1152KB for URB, but only 1008KB of this
+    *  will be used."
+    */
+   .urb.size = 1008 / 3,
+   .num_slices = 3,
+};
+
 const struct brw_device_info *
-brw_get_device_info(int devid, int revision)
+brw_get_device_info(int devid)
 {
    const struct brw_device_info *devinfo;
    switch (devid) {
@@ -367,8 +502,17 @@ brw_get_device_info(int devid, int revision)
       return NULL;
    }
 
-   if (devinfo->gen == 9 && (revision == 2 || revision == 3 || revision == -1))
-      return &brw_device_info_skl_early;
-
    return devinfo;
 }
+
+const char *
+brw_get_device_name(int devid)
+{
+   switch (devid) {
+#undef CHIPSET
+#define CHIPSET(id, family, name) case id: return name;
+#include "pci_ids/i965_pci_ids.h"
+   default:
+      return NULL;
+   }
+}