Merge branch 'lp-offset-twoside'

[mesa.git] / src / mesa / drivers / dri / i965 / brw_disasm.c

diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index 3a93b253777436091b2e1aaa86b49d45ca3e73f2..962c04128b8280deb74b9f6a3a7638ee32b05556 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -72,6 +72,7 @@ struct {
     [BRW_OPCODE_CMPN] = { .name = "cmpn", .nsrc = 2, .ndst = 1 },
 
     [BRW_OPCODE_SEND] = { .name = "send", .nsrc = 1, .ndst = 1 },
+    [BRW_OPCODE_SENDC] = { .name = "sendc", .nsrc = 1, .ndst = 1 },
     [BRW_OPCODE_NOP] = { .name = "nop", .nsrc = 0, .ndst = 0 },
     [BRW_OPCODE_JMPI] = { .name = "jmpi", .nsrc = 1, .ndst = 0 },
     [BRW_OPCODE_IF] = { .name = "if", .nsrc = 2, .ndst = 0 },
@@ -165,8 +166,8 @@ char *accwr[2] = {
 };
 
 char *wectrl[2] = {
-    [0] = "WEnormal",
-    [1] = "WEpredicted"
+    [0] = "WE_normal",
+    [1] = "WE_all"
 };
 
 char *exec_size[8] = {
@@ -460,6 +461,9 @@ static int reg (FILE *file, GLuint _reg_file, GLuint _reg_nr)
        case BRW_ARF_ACCUMULATOR:
            format (file, "acc%d", _reg_nr & 0x0f);
            break;
+       case BRW_ARF_FLAG:
+           format (file, "f%d", _reg_nr & 0x0f);
+           break;
        case BRW_ARF_MASK:
            format (file, "mask%d", _reg_nr & 0x0f);
            break;
@@ -876,7 +880,8 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
        string (file, " ");
        err |= control (file, "function", math_function,
                        inst->header.destreg__conditionalmod, NULL);
-    } else if (inst->header.opcode != BRW_OPCODE_SEND)
+    } else if (inst->header.opcode != BRW_OPCODE_SEND &&
+              inst->header.opcode != BRW_OPCODE_SENDC)
        err |= control (file, "conditional modifier", conditional_modifier,
                        inst->header.destreg__conditionalmod, NULL);
 
@@ -892,7 +897,12 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
     if (opcode[inst->header.opcode].ndst > 0) {
        pad (file, 16);
        err |= dest (file, inst);
+    } else if (gen >= 6 && (inst->header.opcode == BRW_OPCODE_IF ||
+                           inst->header.opcode == BRW_OPCODE_ELSE ||
+                           inst->header.opcode == BRW_OPCODE_ENDIF)) {
+       format (file, " %d", inst->bits1.branch_gen6.jump_count);
     }
+
     if (opcode[inst->header.opcode].nsrc > 0) {
        pad (file, 32);
        err |= src0 (file, inst);
@@ -902,7 +912,8 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
        err |= src1 (file, inst);
     }
 
-    if (inst->header.opcode == BRW_OPCODE_SEND) {
+    if (inst->header.opcode == BRW_OPCODE_SEND ||
+       inst->header.opcode == BRW_OPCODE_SENDC) {
        int target;
 
        if (gen >= 6)
@@ -1065,7 +1076,8 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
        err |= control (file, "thread control", thread_ctrl, inst->header.thread_control, &space);
        if (gen >= 6)
            err |= control (file, "acc write control", accwr, inst->header.acc_wr_control, &space);
-       if (inst->header.opcode == BRW_OPCODE_SEND)
+       if (inst->header.opcode == BRW_OPCODE_SEND ||
+           inst->header.opcode == BRW_OPCODE_SENDC)
            err |= control (file, "end of thread", end_of_thread,
                            inst->bits3.generic.end_of_thread, &space);
        if (space)