Merge remote-tracking branch 'mesa-public/master' into vulkan

[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs_nir.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index a62dbb8b0ad27128e4c06d0131f535fb5ea2dbc3..6272b61a98be0edf1321205f9576d822feff1605 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -1516,13 +1516,22 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
       has_indirect = true;
       /* fallthrough */
    case nir_intrinsic_load_ubo: {
+      uint32_t set = instr->const_index[0];
       nir_const_value *const_index = nir_src_as_const_value(instr->src[0]);
       fs_reg surf_index;
 
       if (const_index) {
-         surf_index = fs_reg(stage_prog_data->binding_table.ubo_start +
-                             const_index->u[0]);
+         uint32_t binding = const_index->u[0];
+
+         /* FIXME: We should probably assert here, but dota2 seems to hit
+          * it and we'd like to keep going.
+          */
+         if (binding >= stage_prog_data->bind_map[set].index_count)
+            binding = 0;
+
+         surf_index = fs_reg(stage_prog_data->bind_map[set].index[binding]);
       } else {
+         assert(0 && "need more info from the ir for this.");
          /* The block index is not a constant. Evaluate the index expression
           * per-channel and add the base UBO index; we have to select a value
           * from any live channel.
@@ -1547,7 +1556,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
                                      BRW_REGISTER_TYPE_D),
                  fs_reg(2));
 
-         unsigned vec4_offset = instr->const_index[0] / 4;
+         unsigned vec4_offset = instr->const_index[1] / 4;
          for (int i = 0; i < instr->num_components; i++)
             VARYING_PULL_CONSTANT_LOAD(bld, offset(dest, bld, i), surf_index,
                                        base_offset, vec4_offset + i);
@@ -1555,7 +1564,7 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
          fs_reg packed_consts = vgrf(glsl_type::float_type);
          packed_consts.type = dest.type;
 
-         fs_reg const_offset_reg((unsigned) instr->const_index[0] & ~15);
+         fs_reg const_offset_reg((unsigned) instr->const_index[1] & ~15);
          bld.emit(FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD, packed_consts,
                   surf_index, const_offset_reg);
 
@@ -1738,7 +1747,13 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
 void
 fs_visitor::nir_emit_texture(const fs_builder &bld, nir_tex_instr *instr)
 {
-   unsigned sampler = instr->sampler_index;
+   uint32_t set = instr->sampler_set;
+   uint32_t binding = instr->sampler_index;
+
+   assert(binding < stage_prog_data->bind_map[set].index_count);
+   assert(stage_prog_data->bind_map[set].index[binding] < 1000);
+
+   unsigned sampler = stage_prog_data->bind_map[set].index[binding];
    fs_reg sampler_reg(sampler);
 
    /* FINISHME: We're failing to recompile our programs when the sampler is
@@ -1898,6 +1913,12 @@ fs_visitor::nir_emit_jump(const fs_builder &bld, nir_jump_instr *instr)
       bld.emit(BRW_OPCODE_CONTINUE);
       break;
    case nir_jump_return:
+      /* This has to be the last block in the shader.  We don't handle
+       * early returns.
+       */
+      assert(nir_cf_node_next(&instr->instr.block->cf_node) == NULL &&
+             instr->instr.block->cf_node.parent->type == nir_cf_node_function);
+      break;
    default:
       unreachable("unknown jump");
    }