i965: Combine both gl_PatchVerticesIn lowering passes.

[mesa.git] / src / mesa / drivers / dri / i965 / brw_nir_uniforms.cpp

diff --git a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
index 28a60691926bbdb9e29c846e381187aa5c77ae04..54f9f9b1a6b804f8f71217e5664c782339e2e57f 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
+++ b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp
@@ -267,31 +267,3 @@ brw_nir_setup_arb_uniforms(void *mem_ctx, nir_shader *shader,
          stage_prog_data->param[4 * p + i] = BRW_PARAM_BUILTIN_ZERO;
    }
 }
-
-void
-brw_nir_lower_patch_vertices_in_to_uniform(nir_shader *nir)
-{
-   nir_foreach_variable_safe(var, &nir->system_values) {
-      if (var->data.location != SYSTEM_VALUE_VERTICES_IN)
-         continue;
-
-      gl_state_index16 tokens[STATE_LENGTH] = {
-         STATE_INTERNAL,
-         nir->info.stage == MESA_SHADER_TESS_CTRL ?
-            (gl_state_index16)STATE_TCS_PATCH_VERTICES_IN :
-            (gl_state_index16)STATE_TES_PATCH_VERTICES_IN,
-      };
-      var->num_state_slots = 1;
-      var->state_slots =
-         ralloc_array(var, nir_state_slot, var->num_state_slots);
-      memcpy(var->state_slots[0].tokens, tokens, sizeof(tokens));
-      var->state_slots[0].swizzle = SWIZZLE_XXXX;
-
-      var->data.mode = nir_var_uniform;
-      var->data.location = -1;
-      exec_node_remove(&var->node);
-      exec_list_push_tail(&nir->uniforms, &var->node);
-   }
-
-   nir_fixup_deref_modes(nir);
-}