i965: Clarify nomenclature: vert_result -> varying

[mesa.git] / src / mesa / drivers / dri / i965 / gen7_sol_state.c

diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c b/src/mesa/drivers/dri/i965/gen7_sol_state.c
index b55fccc0e0bdce6f5b1273028a58eb919adf5f21..0dcbfb429d3ca38a81cafd17ca15188bc19fddd3 100644 (file)
--- a/src/mesa/drivers/dri/i965/gen7_sol_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c
@@ -130,12 +130,12 @@ upload_3dstate_so_decl_list(struct brw_context *brw,
    for (i = 0; i < linked_xfb_info->NumOutputs; i++) {
       int buffer = linked_xfb_info->Outputs[i].OutputBuffer;
       uint16_t decl = 0;
-      int vert_result = linked_xfb_info->Outputs[i].OutputRegister;
+      int varying = linked_xfb_info->Outputs[i].OutputRegister;
       unsigned component_mask =
          (1 << linked_xfb_info->Outputs[i].NumComponents) - 1;
 
       /* gl_PointSize is stored in VARYING_SLOT_PSIZ.w. */
-      if (vert_result == VARYING_SLOT_PSIZ) {
+      if (varying == VARYING_SLOT_PSIZ) {
          assert(linked_xfb_info->Outputs[i].NumComponents == 1);
          component_mask <<= 3;
       } else {
@@ -145,7 +145,7 @@ upload_3dstate_so_decl_list(struct brw_context *brw,
       buffer_mask |= 1 << buffer;
 
       decl |= buffer << SO_DECL_OUTPUT_BUFFER_SLOT_SHIFT;
-      decl |= vue_map->vert_result_to_slot[vert_result] <<
+      decl |= vue_map->varying_to_slot[varying] <<
         SO_DECL_REGISTER_INDEX_SHIFT;
       decl |= component_mask << SO_DECL_COMPONENT_MASK_SHIFT;