Merge remote branch 'main/master' into radeon-rewrite
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_common.c
index 87b6dac40bc640928d7f7a1f1e508248a306a0d0..840233ff89657180d2db5c13033a69bc3ca42d96 100644 (file)
@@ -51,7 +51,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "main/light.h"
 #include "main/framebuffer.h"
 #include "main/simple_list.h"
-
+#include "main/renderbuffer.h"
 #include "swrast/swrast.h"
 #include "vbo/vbo.h"
 #include "tnl/tnl.h"
@@ -59,17 +59,11 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "swrast_setup/swrast_setup.h"
 
 #include "dri_util.h"
-#include "drirenderbuffer.h"
 #include "vblank.h"
 
 #include "radeon_common.h"
-#include "radeon_common.h"
-#include "radeon_bo.h"
-#include "radeon_cs.h"
-#include "radeon_bo_legacy.h"
-#include "radeon_cs_legacy.h"
-#include "radeon_bo_gem.h"
-#include "radeon_cs_gem.h"
+#include "radeon_bocs_wrapper.h"
+#include "radeon_lock.h"
 #include "radeon_drm.h"
 #include "radeon_mipmap_tree.h"
 
@@ -138,6 +132,38 @@ void radeonRecalcScissorRects(radeonContextPtr radeon)
        }
 }
 
+static void radeon_get_cliprects(radeonContextPtr radeon,
+                                struct drm_clip_rect **cliprects,
+                                unsigned int *num_cliprects,
+                                int *x_off, int *y_off)
+{
+       __DRIdrawablePrivate *dPriv = radeon->dri.drawable;
+       struct radeon_framebuffer *rfb = dPriv->driverPrivate;
+
+       if (radeon->constant_cliprect) {
+               radeon->fboRect.x1 = 0;
+               radeon->fboRect.y1 = 0;
+               radeon->fboRect.x2 = radeon->glCtx->DrawBuffer->Width;
+               radeon->fboRect.y2 = radeon->glCtx->DrawBuffer->Height;
+
+               *cliprects = &radeon->fboRect;
+               *num_cliprects = 1;
+               *x_off = 0;
+               *y_off = 0;
+       } else if (radeon->front_cliprects ||
+                  rfb->pf_active || dPriv->numBackClipRects == 0) {
+               *cliprects = dPriv->pClipRects;
+               *num_cliprects = dPriv->numClipRects;
+               *x_off = dPriv->x;
+               *y_off = dPriv->y;
+       } else {
+               *num_cliprects = dPriv->numBackClipRects;
+               *cliprects = dPriv->pBackClipRects;
+               *x_off = dPriv->backX;
+               *y_off = dPriv->backY;
+       }
+}
+
 /**
  * Update cliprects and scissors.
  */
@@ -145,49 +171,36 @@ void radeonSetCliprects(radeonContextPtr radeon)
 {
        __DRIdrawablePrivate *const drawable = radeon->dri.drawable;
        __DRIdrawablePrivate *const readable = radeon->dri.readable;
-       GLframebuffer *const draw_fb = (GLframebuffer*)drawable->driverPrivate;
-       GLframebuffer *const read_fb = (GLframebuffer*)readable->driverPrivate;
+       struct radeon_framebuffer *const draw_rfb = drawable->driverPrivate;
+       struct radeon_framebuffer *const read_rfb = readable->driverPrivate;
+       int x_off, y_off;
 
-       if (!radeon->radeonScreen->driScreen->dri2.enabled) {
-               if (draw_fb->_ColorDrawBufferIndexes[0] == BUFFER_BACK_LEFT) {
-                       /* Can't ignore 2d windows if we are page flipping. */
-                       if (drawable->numBackClipRects == 0 || radeon->doPageFlip ||
-                           radeon->sarea->pfCurrentPage == 1) {
-                               radeon->numClipRects = drawable->numClipRects;
-                               radeon->pClipRects = drawable->pClipRects;
-                       } else {
-                               radeon->numClipRects = drawable->numBackClipRects;
-                               radeon->pClipRects = drawable->pBackClipRects;
-                       }
-               } else {
-                       /* front buffer (or none, or multiple buffers */
-                       radeon->numClipRects = drawable->numClipRects;
-                       radeon->pClipRects = drawable->pClipRects;
-               }
-       }
+       radeon_get_cliprects(radeon, &radeon->pClipRects,
+                            &radeon->numClipRects, &x_off, &y_off);
        
-       if ((draw_fb->Width != drawable->w) ||
-           (draw_fb->Height != drawable->h)) {
-               _mesa_resize_framebuffer(radeon->glCtx, draw_fb,
+       if ((draw_rfb->base.Width != drawable->w) ||
+           (draw_rfb->base.Height != drawable->h)) {
+               _mesa_resize_framebuffer(radeon->glCtx, &draw_rfb->base,
                                         drawable->w, drawable->h);
-               draw_fb->Initialized = GL_TRUE;
+               draw_rfb->base.Initialized = GL_TRUE;
        }
 
        if (drawable != readable) {
-               if ((read_fb->Width != readable->w) ||
-                   (read_fb->Height != readable->h)) {
-                       _mesa_resize_framebuffer(radeon->glCtx, read_fb,
+               if ((read_rfb->base.Width != readable->w) ||
+                   (read_rfb->base.Height != readable->h)) {
+                       _mesa_resize_framebuffer(radeon->glCtx, &read_rfb->base,
                                                 readable->w, readable->h);
-                       read_fb->Initialized = GL_TRUE;
+                       read_rfb->base.Initialized = GL_TRUE;
                }
        }
 
        if (radeon->state.scissor.enabled)
                radeonRecalcScissorRects(radeon);
 
-       radeon->lastStamp = drawable->lastStamp;
 }
 
+
+
 void radeonUpdateScissor( GLcontext *ctx )
 {
        radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
@@ -232,7 +245,7 @@ static uint32_t radeonGetLastFrame(radeonContextPtr radeon)
 {
        drm_radeon_getparam_t gp;
        int ret;
-       uint32_t frame;
+       uint32_t frame = 0;
 
        gp.param = RADEON_PARAM_LAST_FRAME;
        gp.value = (int *)&frame;
@@ -354,6 +367,37 @@ static void radeonWaitForIdle(radeonContextPtr radeon)
        UNLOCK_HARDWARE(radeon);
 }
 
+static void radeon_flip_renderbuffers(struct radeon_framebuffer *rfb)
+{
+       int current_page = rfb->pf_current_page;
+       int next_page = (current_page + 1) % rfb->pf_num_pages;
+       struct gl_renderbuffer *tmp_rb;
+
+       /* Exchange renderbuffers if necessary but make sure their
+        * reference counts are preserved.
+        */
+       if (rfb->color_rb[current_page] &&
+           rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer !=
+           &rfb->color_rb[current_page]->base) {
+               tmp_rb = NULL;
+               _mesa_reference_renderbuffer(&tmp_rb,
+                                            rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer);
+               tmp_rb = &rfb->color_rb[current_page]->base;
+               _mesa_reference_renderbuffer(&rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer, tmp_rb);
+               _mesa_reference_renderbuffer(&tmp_rb, NULL);
+       }
+
+       if (rfb->color_rb[next_page] &&
+           rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer !=
+           &rfb->color_rb[next_page]->base) {
+               tmp_rb = NULL;
+               _mesa_reference_renderbuffer(&tmp_rb,
+                                            rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer);
+               tmp_rb = &rfb->color_rb[next_page]->base;
+               _mesa_reference_renderbuffer(&rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer, tmp_rb);
+               _mesa_reference_renderbuffer(&tmp_rb, NULL);
+       }
+}
 
 /* Copy the back color buffer to the front color buffer.
  */
@@ -361,10 +405,8 @@ void radeonCopyBuffer( __DRIdrawablePrivate *dPriv,
                       const drm_clip_rect_t      *rect)
 {
        radeonContextPtr rmesa;
+       struct radeon_framebuffer *rfb;
        GLint nbox, i, ret;
-       GLboolean   missed_target;
-       int64_t ust;
-       __DRIscreenPrivate *psp;
    
        assert(dPriv);
        assert(dPriv->driContextPriv);
@@ -372,22 +414,12 @@ void radeonCopyBuffer( __DRIdrawablePrivate *dPriv,
    
        rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
 
-       if ( RADEON_DEBUG & DEBUG_IOCTL ) {
-               fprintf( stderr, "\n%s( %p )\n\n", __FUNCTION__, (void *) rmesa->glCtx );
-       }
+       LOCK_HARDWARE(rmesa);
 
-       radeon_firevertices(rmesa);
-       LOCK_HARDWARE( rmesa );
+       rfb = dPriv->driverPrivate;
 
-       /* Throttle the frame rate -- only allow one pending swap buffers
-        * request at a time.
-        */
-       radeonWaitForFrameCompletion( rmesa );
-       if (!rect)
-       {
-               UNLOCK_HARDWARE( rmesa );
-               driWaitForVBlank( dPriv, & missed_target );
-               LOCK_HARDWARE( rmesa );
+       if ( RADEON_DEBUG & DEBUG_IOCTL ) {
+               fprintf( stderr, "\n%s( %p )\n\n", __FUNCTION__, (void *) rmesa->glCtx );
        }
 
        nbox = dPriv->numClipRects; /* must be in locked region */
@@ -435,94 +467,77 @@ void radeonCopyBuffer( __DRIdrawablePrivate *dPriv,
        }
 
        UNLOCK_HARDWARE( rmesa );
-       if (!rect)
-       {
-               psp = dPriv->driScreenPriv;
-               rmesa->swap_count++;
-               (*psp->systemTime->getUST)( & ust );
-               if ( missed_target ) {
-                       rmesa->swap_missed_count++;
-                       rmesa->swap_missed_ust = ust - rmesa->swap_ust;
-               }
+}
 
-               rmesa->swap_ust = ust;
-               rmesa->hw.all_dirty = GL_TRUE;
+static int radeonScheduleSwap(__DRIdrawablePrivate *dPriv, GLboolean *missed_target)
+{
+       radeonContextPtr rmesa;
 
+       rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
+       radeon_firevertices(rmesa);
+
+       LOCK_HARDWARE( rmesa );
+
+       if (!dPriv->numClipRects) {
+               UNLOCK_HARDWARE(rmesa);
+               usleep(10000);  /* throttle invisible client 10ms */
+               return 0;
        }
+
+       radeonWaitForFrameCompletion(rmesa);
+
+       UNLOCK_HARDWARE(rmesa);
+       driWaitForVBlank(dPriv, missed_target);
+       
+       return 0;
 }
 
-void radeonPageFlip( __DRIdrawablePrivate *dPriv )
+static GLboolean radeonPageFlip( __DRIdrawablePrivate *dPriv )
 {
-       radeonContextPtr rmesa;
+       radeonContextPtr radeon;
        GLint ret;
-       GLboolean   missed_target;
        __DRIscreenPrivate *psp;
        struct radeon_renderbuffer *rrb;
-       GLframebuffer *fb = dPriv->driverPrivate;
-       
+       struct radeon_framebuffer *rfb;
+
        assert(dPriv);
        assert(dPriv->driContextPriv);
        assert(dPriv->driContextPriv->driverPrivate);
 
-       rmesa = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
-       rrb = (void *)fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer;
+       radeon = (radeonContextPtr) dPriv->driContextPriv->driverPrivate;
+       rfb = dPriv->driverPrivate;
+       rrb = (void *)rfb->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer;
 
        psp = dPriv->driScreenPriv;
 
-       if ( RADEON_DEBUG & DEBUG_IOCTL ) {
-               fprintf(stderr, "%s: pfCurrentPage: %d\n", __FUNCTION__,
-                       rmesa->sarea->pfCurrentPage);
-       }
-
-       radeon_firevertices(rmesa);
-
-       LOCK_HARDWARE( rmesa );
+       LOCK_HARDWARE(radeon);
 
-       if (!dPriv->numClipRects) {
-               UNLOCK_HARDWARE(rmesa);
-               usleep(10000);  /* throttle invisible client 10ms */
-               return;
+       if ( RADEON_DEBUG & DEBUG_IOCTL ) {
+               fprintf(stderr, "%s: pfCurrentPage: %d %d\n", __FUNCTION__,
+                       radeon->sarea->pfCurrentPage, radeon->sarea->pfState);
        }
-
        drm_clip_rect_t *box = dPriv->pClipRects;
-       drm_clip_rect_t *b = rmesa->sarea->boxes;
+       drm_clip_rect_t *b = radeon->sarea->boxes;
        b[0] = box[0];
-       rmesa->sarea->nbox = 1;
+       radeon->sarea->nbox = 1;
 
-       /* Throttle the frame rate -- only allow a few pending swap buffers
-        * request at a time.
-        */
-       radeonWaitForFrameCompletion( rmesa );
-       UNLOCK_HARDWARE( rmesa );
-       driWaitForVBlank( dPriv, & missed_target );
-       if ( missed_target ) {
-               rmesa->swap_missed_count++;
-               (void) (*psp->systemTime->getUST)( & rmesa->swap_missed_ust );
-       }
-       LOCK_HARDWARE( rmesa );
-
-       ret = drmCommandNone( rmesa->dri.fd, DRM_RADEON_FLIP );
+       ret = drmCommandNone( radeon->dri.fd, DRM_RADEON_FLIP );
        
-       UNLOCK_HARDWARE( rmesa );
+       UNLOCK_HARDWARE(radeon);
 
        if ( ret ) {
                fprintf( stderr, "DRM_RADEON_FLIP: return = %d\n", ret );
-               exit( 1 );
+               return GL_FALSE;
        }
 
-       rmesa->swap_count++;
-       (void) (*psp->systemTime->getUST)( & rmesa->swap_ust );
-       
-       /* Get ready for drawing next frame.  Update the renderbuffers'
-        * flippedOffset/Pitch fields so we draw into the right place.
-        */
-       driFlipRenderbuffers(rmesa->glCtx->WinSysDrawBuffer,
-                            rmesa->sarea->pfCurrentPage);
-       
-       rmesa->state.color.rrb = rrb;
+       if (!rfb->pf_active)
+               return GL_FALSE;
 
-       if (rmesa->vtbl.update_draw_buffer)
-               rmesa->vtbl.update_draw_buffer(rmesa->glCtx);
+       rfb->pf_current_page = radeon->sarea->pfCurrentPage;
+       radeon_flip_renderbuffers(rfb);
+       radeon_draw_buffer(radeon->glCtx, &rfb->base);
+
+       return GL_TRUE;
 }
 
 
@@ -531,6 +546,9 @@ void radeonPageFlip( __DRIdrawablePrivate *dPriv )
  */
 void radeonSwapBuffers(__DRIdrawablePrivate * dPriv)
 {
+       int64_t ust;
+       __DRIscreenPrivate *psp;
+
        if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
                radeonContextPtr radeon;
                GLcontext *ctx;
@@ -539,12 +557,29 @@ void radeonSwapBuffers(__DRIdrawablePrivate * dPriv)
                ctx = radeon->glCtx;
 
                if (ctx->Visual.doubleBufferMode) {
+                       GLboolean missed_target;
+                       struct radeon_framebuffer *rfb = dPriv->driverPrivate;
                        _mesa_notifySwapBuffers(ctx);/* flush pending rendering comands */
-                       if (radeon->doPageFlip) {
+
+                       radeonScheduleSwap(dPriv, &missed_target);
+
+                       if (rfb->pf_active) {
                                radeonPageFlip(dPriv);
                        } else {
                                radeonCopyBuffer(dPriv, NULL);
                        }
+
+                       psp = dPriv->driScreenPriv;
+
+                       rfb->swap_count++;
+                       (*psp->systemTime->getUST)( & ust );
+                       if ( missed_target ) {
+                               rfb->swap_missed_count++;
+                               rfb->swap_missed_ust = ust - rfb->swap_ust;
+                       }
+
+                       rfb->swap_ust = ust;
+                       radeon->hw.all_dirty = GL_TRUE;
                }
        } else {
                /* XXX this shouldn't be an error but we can't handle it for now */
@@ -579,15 +614,233 @@ void radeonCopySubBuffer(__DRIdrawablePrivate * dPriv,
        }
 }
 
+void radeon_draw_buffer(GLcontext *ctx, struct gl_framebuffer *fb)
+{
+       radeonContextPtr radeon = RADEON_CONTEXT(ctx);
+       struct radeon_renderbuffer *rrbDepth = NULL, *rrbStencil = NULL,
+               *rrbColor = NULL;
+       
+
+       if (!fb) {
+               /* this can happen during the initial context initialization */
+               return;
+       }
+
+       /* radeons only handle 1 color draw so far */
+       if (fb->_NumColorDrawBuffers != 1) {
+               radeon->vtbl.fallback(ctx, RADEON_FALLBACK_DRAW_BUFFER, GL_TRUE);
+               return;
+       }
+               
+       /* Do this here, note core Mesa, since this function is called from
+        * many places within the driver.
+        */
+       if (ctx->NewState & (_NEW_BUFFERS | _NEW_COLOR | _NEW_PIXEL)) {
+               /* this updates the DrawBuffer->_NumColorDrawBuffers fields, etc */
+               _mesa_update_framebuffer(ctx);
+               /* this updates the DrawBuffer's Width/Height if it's a FBO */
+               _mesa_update_draw_buffer_bounds(ctx);
+       }
+
+       if (fb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) {
+               /* this may occur when we're called by glBindFrameBuffer() during
+                * the process of someone setting up renderbuffers, etc.
+                */
+               /*_mesa_debug(ctx, "DrawBuffer: incomplete user FBO\n");*/
+               return;
+       }
+
+       if (fb->Name)
+               ;/* do something depthy/stencily TODO */
+
+
+               /* none */
+       if (fb->Name == 0) {
+               if (fb->_ColorDrawBufferIndexes[0] == BUFFER_FRONT_LEFT) {
+                       rrbColor = (void *)fb->Attachment[BUFFER_FRONT_LEFT].Renderbuffer;
+                       radeon->front_cliprects = GL_TRUE;
+               } else {
+                       rrbColor = (void *)fb->Attachment[BUFFER_BACK_LEFT].Renderbuffer;
+                       radeon->front_cliprects = GL_FALSE;
+               }
+       } else {
+               /* user FBO in theory */
+               struct radeon_renderbuffer *rrb;
+               rrb = (void *)fb->_ColorDrawBuffers[0];
+               rrbColor = rrb;
+               radeon->constant_cliprect = GL_TRUE;
+       }
+
+       if (rrbColor == NULL)
+               radeon->vtbl.fallback(ctx, RADEON_FALLBACK_DRAW_BUFFER, GL_TRUE);
+       else
+               radeon->vtbl.fallback(ctx, RADEON_FALLBACK_DRAW_BUFFER, GL_FALSE);
+
+
+
+       if (fb->_DepthBuffer && fb->_DepthBuffer->Wrapped) {
+               rrbDepth = (struct radeon_renderbuffer *)fb->_DepthBuffer->Wrapped;
+               if (rrbDepth && rrbDepth->bo) {
+                       radeon->vtbl.fallback(ctx, RADEON_FALLBACK_DEPTH_BUFFER, GL_FALSE);
+               } else {
+                       radeon->vtbl.fallback(ctx, RADEON_FALLBACK_DEPTH_BUFFER, GL_TRUE);
+               }
+       } else {
+               radeon->vtbl.fallback(ctx, RADEON_FALLBACK_DEPTH_BUFFER, GL_FALSE);
+               rrbDepth = NULL;
+       }
+
+       /* TODO stencil things */
+       if (fb->_StencilBuffer && fb->_StencilBuffer->Wrapped) {
+               rrbStencil = (struct radeon_renderbuffer *)fb->_DepthBuffer->Wrapped;
+               if (rrbStencil && rrbStencil->bo) {
+                       radeon->vtbl.fallback(ctx, RADEON_FALLBACK_STENCIL_BUFFER, GL_FALSE);
+                       /* need to re-compute stencil hw state */
+                       if (ctx->Driver.Enable != NULL)
+                               ctx->Driver.Enable(ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled);
+                       else
+                               ctx->NewState |= _NEW_STENCIL;
+                       if (!rrbDepth)
+                               rrbDepth = rrbStencil;
+               } else {
+                       radeon->vtbl.fallback(ctx, RADEON_FALLBACK_STENCIL_BUFFER, GL_TRUE);
+               }
+       } else {
+               radeon->vtbl.fallback(ctx, RADEON_FALLBACK_STENCIL_BUFFER, GL_FALSE);
+               if (ctx->Driver.Enable != NULL)
+                       ctx->Driver.Enable(ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled);
+               else
+                       ctx->NewState |= _NEW_STENCIL;
+       }
+
+       /* Update culling direction which changes depending on the
+        * orientation of the buffer:
+        */
+       if (ctx->Driver.FrontFace)
+               ctx->Driver.FrontFace(ctx, ctx->Polygon.FrontFace);
+       else
+               ctx->NewState |= _NEW_POLYGON;
+       
+       /*
+        * Update depth test state
+        */
+       if (ctx->Driver.Enable) {
+               if (ctx->Depth.Test && fb->Visual.depthBits > 0) {
+                       ctx->Driver.Enable(ctx, GL_DEPTH_TEST, GL_TRUE);
+               } else {
+                       ctx->Driver.Enable(ctx, GL_DEPTH_TEST, GL_FALSE);
+               }
+       } else {
+               ctx->NewState |= _NEW_DEPTH;
+       }
+       
+       radeon->state.depth.rrb = rrbDepth;
+
+       radeon->state.color.rrb = rrbColor;
+
+       /* update viewport since it depends on window size */
+       if (ctx->Driver.Viewport) {
+               ctx->Driver.Viewport(ctx, ctx->Viewport.X, ctx->Viewport.Y,
+                                    ctx->Viewport.Width, ctx->Viewport.Height);
+       } else {
+               ctx->NewState |= _NEW_VIEWPORT;
+       }
+
+       /* Set state we know depends on drawable parameters:
+        */
+       if (ctx->Driver.Scissor)
+               ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y,
+                                   ctx->Scissor.Width, ctx->Scissor.Height);
+       radeon->NewGLState |= _NEW_SCISSOR;
+}
 
-static void radeon_print_state_atom( struct radeon_state_atom *state )
+/**
+ * Called via glDrawBuffer.
+ */
+void radeonDrawBuffer( GLcontext *ctx, GLenum mode )
+{
+       radeonContextPtr radeon = RADEON_CONTEXT(ctx);
+       
+       if (RADEON_DEBUG & DEBUG_DRI)
+               fprintf(stderr, "%s %s\n", __FUNCTION__,
+                       _mesa_lookup_enum_by_nr( mode ));
+       
+       radeon_firevertices(radeon);    /* don't pipeline cliprect changes */
+       
+       radeon_draw_buffer(ctx, ctx->DrawBuffer);
+}
+
+void radeonReadBuffer( GLcontext *ctx, GLenum mode )
+{
+       /* nothing, until we implement h/w glRead/CopyPixels or CopyTexImage */
+       if (ctx->ReadBuffer == ctx->DrawBuffer) {
+               /* This will update FBO completeness status.
+                * A framebuffer will be incomplete if the GL_READ_BUFFER setting
+                * refers to a missing renderbuffer.  Calling glReadBuffer can set
+                * that straight and can make the drawing buffer complete.
+                */
+               radeon_draw_buffer(ctx, ctx->DrawBuffer);
+       }
+}
+
+
+/* Turn on/off page flipping according to the flags in the sarea:
+ */
+void radeonUpdatePageFlipping(radeonContextPtr radeon)
+{
+       struct radeon_framebuffer *rfb = radeon->dri.drawable->driverPrivate;
+
+       rfb->pf_active = radeon->sarea->pfState;
+       rfb->pf_current_page = radeon->sarea->pfCurrentPage;
+       rfb->pf_num_pages = 2;
+       radeon_flip_renderbuffers(rfb);
+       radeon_draw_buffer(radeon->glCtx, radeon->glCtx->DrawBuffer);
+}
+
+void radeon_window_moved(radeonContextPtr radeon)
+{
+       GLcontext *ctx = radeon->glCtx;
+       __DRIdrawablePrivate *dPriv = radeon->dri.drawable;
+       struct radeon_framebuffer *rfb = dPriv->driverPrivate;
+
+       if (!radeon->radeonScreen->driScreen->dri2.enabled) {
+               radeonUpdatePageFlipping(radeon);
+       }
+       radeonSetCliprects(radeon);
+}
+
+void radeon_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height)
+{
+       radeonContextPtr radeon = RADEON_CONTEXT(ctx);
+       __DRIcontext *driContext = radeon->dri.context;
+       void (*old_viewport)(GLcontext *ctx, GLint x, GLint y,
+                            GLsizei w, GLsizei h);
+
+       if (!driContext->driScreenPriv->dri2.enabled)
+               return;
+
+       radeon_update_renderbuffers(driContext, driContext->driDrawablePriv);
+       if (driContext->driDrawablePriv != driContext->driReadablePriv)
+               radeon_update_renderbuffers(driContext, driContext->driReadablePriv);
+
+       old_viewport = ctx->Driver.Viewport;
+       ctx->Driver.Viewport = NULL;
+       radeon->dri.drawable = driContext->driDrawablePriv;
+       radeon_window_moved(radeon);
+       radeon_draw_buffer(ctx, radeon->glCtx->DrawBuffer);
+       ctx->Driver.Viewport = old_viewport;
+
+
+}
+static void radeon_print_state_atom(radeonContextPtr radeon, struct radeon_state_atom *state )
 {
        int i;
+       int dwords = (*state->check)(radeon->glCtx, state);
 
-       fprintf(stderr, "emit %s/%d\n", state->name, state->cmd_size);
+       fprintf(stderr, "emit %s %d/%d\n", state->name, state->cmd_size, dwords);
 
        if (RADEON_DEBUG & DEBUG_VERBOSE) 
-               for (i = 0 ; i < state->cmd_size ; i++) 
+               for (i = 0 ; i < dwords; i++) 
                        fprintf(stderr, "\t%s[%d]: %x\n", state->name, i, state->cmd[i]);
 
 }
@@ -607,7 +860,7 @@ static INLINE void radeonEmitAtoms(radeonContextPtr radeon, GLboolean dirty)
                        dwords = (*atom->check) (radeon->glCtx, atom);
                        if (dwords) {
                                if (DEBUG_CMDBUF && RADEON_DEBUG & DEBUG_STATE) {
-                                       radeon_print_state_atom(atom);
+                                       radeon_print_state_atom(radeon, atom);
                                }
                                if (atom->emit) {
                                        (*atom->emit)(radeon->glCtx, atom);
@@ -668,7 +921,7 @@ void radeonFlush(GLcontext *ctx)
 {
        radeonContextPtr radeon = RADEON_CONTEXT(ctx);
        if (RADEON_DEBUG & DEBUG_IOCTL)
-               fprintf(stderr, "%s\n", __FUNCTION__);
+               fprintf(stderr, "%s %d\n", __FUNCTION__, radeon->cmdbuf.cs->cdw);
 
        if (radeon->dma.flush)
                radeon->dma.flush( ctx );
@@ -720,6 +973,12 @@ int rcommonFlushCmdBufLocked(radeonContextPtr rmesa, const char *caller)
                exit(-1);
        }
        rmesa->cmdbuf.flushing = 1;
+
+       if (RADEON_DEBUG & DEBUG_IOCTL) {
+               fprintf(stderr, "%s from %s - %i cliprects\n",
+                       __FUNCTION__, caller, rmesa->numClipRects);
+       }
+
        if (rmesa->cmdbuf.cs->cdw) {
                ret = radeon_cs_emit(rmesa->cmdbuf.cs);
                rmesa->hw.all_dirty = GL_TRUE;
@@ -837,6 +1096,11 @@ void rcommonBeginBatch(radeonContextPtr rmesa, int n,
                radeonEmitState(rmesa);
        }
        radeon_cs_begin(rmesa->cmdbuf.cs, n, file, function, line);
+
+        if (DEBUG_CMDBUF && RADEON_DEBUG & DEBUG_IOCTL)
+                fprintf(stderr, "BEGIN_BATCH(%d) at %d, from %s:%i\n",
+                        n, rmesa->cmdbuf.cs->cdw, function, line);
+
 }