Merge branch '7.8'

[mesa.git] / src / mesa / drivers / dri / radeon / radeon_screen.c

diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 3080a0fcd0e75fc372a7b3bc1920712ca9af2536..4f59511a528218684bd3f3dffc2341835ee190e8 100644 (file)
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -47,7 +47,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "radeon_macros.h"
 #include "radeon_screen.h"
 #include "radeon_common.h"
-#include "radeon_span.h"
 #if defined(RADEON_R100)
 #include "radeon_context.h"
 #include "radeon_tex.h"
@@ -66,7 +65,6 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 #include "utils.h"
 #include "vblank.h"
-#include "drirenderbuffer.h"
 
 #include "radeon_bocs_wrapper.h"
 
@@ -295,18 +293,18 @@ radeonFillInModes( __DRIscreen *psp,
                                          depth_bits_array, stencil_bits_array,
                                          depth_buffer_factor, back_buffer_modes,
                                          back_buffer_factor, msaa_samples_array,
-                                         1);
+                                         1, GL_TRUE);
        configs_a8r8g8b8 = driCreateConfigs(GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV,
                                            depth_bits_array, stencil_bits_array,
                                            1, back_buffer_modes, 1,
-                                           msaa_samples_array, 1);
+                                           msaa_samples_array, 1, GL_TRUE);
        configs = driConcatConfigs(configs_r5g6b5, configs_a8r8g8b8);
    } else
        configs = driCreateConfigs(GL_BGRA, GL_UNSIGNED_INT_8_8_8_8_REV,
                                   depth_bits_array, stencil_bits_array,
                                   depth_buffer_factor,
                                   back_buffer_modes, back_buffer_factor,
-                                  msaa_samples_array, 1);
+                                  msaa_samples_array, 1, GL_TRUE);
 
     if (configs == NULL) {
        fprintf( stderr, "[%s:%u] Error creating FBConfig!\n",
@@ -518,6 +516,7 @@ static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
    case PCI_CHIP_RV380_3150:
    case PCI_CHIP_RV380_3152:
    case PCI_CHIP_RV380_3154:
+   case PCI_CHIP_RV380_3155:
    case PCI_CHIP_RV380_3E50:
    case PCI_CHIP_RV380_3E54:
       screen->chip_family = CHIP_FAMILY_RV380;
@@ -828,6 +827,7 @@ static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
    case PCI_CHIP_RS880_9712:
    case PCI_CHIP_RS880_9713:
    case PCI_CHIP_RS880_9714:
+   case PCI_CHIP_RS880_9715:
       screen->chip_family = CHIP_FAMILY_RS880;
       screen->chip_flags = RADEON_CHIPSET_TCL;
       break;
@@ -847,6 +847,7 @@ static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
    case PCI_CHIP_RV770_9456:
    case PCI_CHIP_RV770_945A:
    case PCI_CHIP_RV770_945B:
+   case PCI_CHIP_RV770_945E:
    case PCI_CHIP_RV790_9460:
    case PCI_CHIP_RV790_9462:
    case PCI_CHIP_RV770_946A:
@@ -861,6 +862,7 @@ static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
    case PCI_CHIP_RV730_9487:
    case PCI_CHIP_RV730_9488:
    case PCI_CHIP_RV730_9489:
+   case PCI_CHIP_RV730_948A:
    case PCI_CHIP_RV730_948F:
    case PCI_CHIP_RV730_9490:
    case PCI_CHIP_RV730_9491:
@@ -882,6 +884,7 @@ static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
    case PCI_CHIP_RV710_9553:
    case PCI_CHIP_RV710_9555:
    case PCI_CHIP_RV710_9557:
+   case PCI_CHIP_RV710_955F:
       screen->chip_family = CHIP_FAMILY_RV710;
       screen->chip_flags = RADEON_CHIPSET_TCL;
       break;
@@ -1134,6 +1137,7 @@ radeonCreateScreen( __DRIscreen *sPriv )
        /* pipe overrides */
        switch (dri_priv->deviceID) {
        case PCI_CHIP_R300_AD: /* 9500 with 1 quadpipe verified by: Reid Linnemann <lreid@cs.okstate.edu> */
+       case PCI_CHIP_R350_AH: /* 9800 SE only have 1 quadpipe */
        case PCI_CHIP_RV410_5E4C: /* RV410 SE only have 1 quadpipe */
        case PCI_CHIP_RV410_5E4F: /* RV410 SE only have 1 quadpipe */
           screen->num_gb_pipes = 1;
@@ -1232,6 +1236,8 @@ radeonCreateScreen( __DRIscreen *sPriv )
    screen->extensions[i++] = &r600texOffsetExtension.base;
 #endif
 
+   screen->extensions[i++] = &dri2ConfigQueryExtension.base;
+
    screen->extensions[i++] = NULL;
    sPriv->extensions = screen->extensions;
 
@@ -1341,6 +1347,7 @@ radeonCreateScreen2(__DRIscreen *sPriv)
        /* pipe overrides */
        switch (device_id) {
        case PCI_CHIP_R300_AD: /* 9500 with 1 quadpipe verified by: Reid Linnemann <lreid@cs.okstate.edu> */
+       case PCI_CHIP_R350_AH: /* 9800 SE only have 1 quadpipe */
        case PCI_CHIP_RV410_5E4C: /* RV410 SE only have 1 quadpipe */
        case PCI_CHIP_RV410_5E4F: /* RV410 SE only have 1 quadpipe */
           screen->num_gb_pipes = 1;
@@ -1481,7 +1488,7 @@ radeonCreateBuffer( __DRIscreen *driScrnPriv,
     if (!rfb)
       return GL_FALSE;
 
-    _mesa_initialize_framebuffer(&rfb->base, mesaVis);
+    _mesa_initialize_window_framebuffer(&rfb->base, mesaVis);
 
     if (mesaVis->redBits == 5)
         rgbFormat = _mesa_little_endian() ? MESA_FORMAT_RGB565 : MESA_FORMAT_RGB565_REV;
@@ -1678,7 +1685,8 @@ __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
                                     back_buffer_modes,
                                     ARRAY_SIZE(back_buffer_modes),
                                     msaa_samples_array,
-                                    ARRAY_SIZE(msaa_samples_array));
+                                    ARRAY_SIZE(msaa_samples_array),
+                                    GL_TRUE);
       if (configs == NULL)
         configs = new_configs;
       else