.scoreboard_index = clause->scoreboard_id,
.clause_type = clause->clause_type,
.next_clause_type = next ? next->clause_type : 0,
+ .suppress_inf = true,
+ .suppress_nan = true,
};
header.branch_cond |= header.back_to_back;
return u;
}
-/* Represents the assignment of ports for a given bundle */
-
-struct bi_registers {
- /* Register to assign to each port */
- unsigned port[4];
-
- /* Read ports can be disabled */
- bool enabled[2];
-
- /* Should we write FMA? what about ADD? If only a single port is
- * enabled it is in port 2, else ADD/FMA is 2/3 respectively */
- bool write_fma, write_add;
-
- /* Should we read with port 3? */
- bool read_port3;
-
- /* Packed uniform/constant */
- uint8_t uniform_constant;
-
- /* Whether writes are actually for the last instruction */
- bool first_instruction;
-};
-
-static inline void
-bi_print_ports(struct bi_registers *regs)
-{
- for (unsigned i = 0; i < 2; ++i) {
- if (regs->enabled[i])
- printf("port %u: %u\n", i, regs->port[i]);
- }
-
- if (regs->write_fma || regs->write_add) {
- printf("port 2 (%s): %u\n",
- regs->write_add ? "ADD" : "FMA",
- regs->port[2]);
- }
-
- if ((regs->write_fma && regs->write_add) || regs->read_port3) {
- printf("port 3 (%s): %u\n",
- regs->read_port3 ? "read" : "FMA",
- regs->port[3]);
- }
-}
-
/* The uniform/constant slot allows loading a contiguous 64-bit immediate or
* pushed uniform per bundle. Figure out which one we need in the bundle (the
* scheduler needs to ensure we only have one type per bundle), validate
regs->uniform_constant = f;
ins->src[s] = BIR_INDEX_PASS | BIFROST_SRC_CONST_LO;
assigned = true;
+ } else if (ins->src[s] & BIR_INDEX_ZERO && fast_zero) {
+ ins->src[s] = BIR_INDEX_PASS | BIFROST_SRC_STAGE;
} else if (s & BIR_INDEX_UNIFORM) {
unreachable("Push uniforms not implemented yet");
}
}
static enum bifrost_packed_src
-bi_get_src(bi_instruction *ins, struct bi_registers *regs, unsigned s, bool is_fma)
+bi_get_src(bi_instruction *ins, struct bi_registers *regs, unsigned s)
{
unsigned src = ins->src[s];
if (src & BIR_INDEX_REGISTER)
return bi_get_src_reg_port(regs, src);
- else if (src & BIR_INDEX_ZERO && is_fma)
- return BIFROST_SRC_STAGE;
else if (src & BIR_INDEX_PASS)
return src & ~BIR_INDEX_PASS;
else {
bool flip_ab = ins->src_abs[1];
struct bifrost_fma_mscale pack = {
- .src0 = bi_get_src(ins, regs, flip_ab ? 1 : 0, true),
- .src1 = bi_get_src(ins, regs, flip_ab ? 0 : 1, true),
- .src2 = bi_get_src(ins, regs, 2, true),
- .src3 = bi_get_src(ins, regs, 3, true),
+ .src0 = bi_get_src(ins, regs, flip_ab ? 1 : 0),
+ .src1 = bi_get_src(ins, regs, flip_ab ? 0 : 1),
+ .src2 = bi_get_src(ins, regs, 2),
+ .src3 = bi_get_src(ins, regs, 3),
.mscale_mode = 0,
.mode = ins->outmod,
.src0_abs = ins->src_abs[0] || ins->src_abs[1],
RETURN_PACKED(pack);
} else if (ins->dest_type == nir_type_float32) {
struct bifrost_fma_fma pack = {
- .src0 = bi_get_src(ins, regs, 0, true),
- .src1 = bi_get_src(ins, regs, 1, true),
- .src2 = bi_get_src(ins, regs, 2, true),
+ .src0 = bi_get_src(ins, regs, 0),
+ .src1 = bi_get_src(ins, regs, 1),
+ .src2 = bi_get_src(ins, regs, 2),
.src0_abs = ins->src_abs[0],
.src1_abs = ins->src_abs[1],
.src2_abs = ins->src_abs[2],
RETURN_PACKED(pack);
} else if (ins->dest_type == nir_type_float16) {
struct bifrost_fma_fma16 pack = {
- .src0 = bi_get_src(ins, regs, 0, true),
- .src1 = bi_get_src(ins, regs, 1, true),
- .src2 = bi_get_src(ins, regs, 2, true),
+ .src0 = bi_get_src(ins, regs, 0),
+ .src1 = bi_get_src(ins, regs, 1),
+ .src2 = bi_get_src(ins, regs, 2),
.swizzle_0 = bi_swiz16(ins, 0),
.swizzle_1 = bi_swiz16(ins, 1),
.swizzle_2 = bi_swiz16(ins, 2),
BIFROST_FMA_OP_FMAX32;
struct bifrost_fma_add pack = {
- .src0 = bi_get_src(ins, regs, 0, true),
- .src1 = bi_get_src(ins, regs, 1, true),
+ .src0 = bi_get_src(ins, regs, 0),
+ .src1 = bi_get_src(ins, regs, 1),
.src0_abs = ins->src_abs[0],
.src1_abs = ins->src_abs[1],
.src0_neg = ins->src_neg[0],
*/
unsigned abs_0 = ins->src_abs[0], abs_1 = ins->src_abs[1];
- unsigned src_0 = bi_get_src(ins, regs, 0, true);
- unsigned src_1 = bi_get_src(ins, regs, 1, true);
+ unsigned src_0 = bi_get_src(ins, regs, 0);
+ unsigned src_1 = bi_get_src(ins, regs, 1);
assert(!(abs_0 && abs_1 && src_0 == src_1));
bool flip = false;
bool l = bi_pack_fp16_abs(ins, regs, &flip);
- unsigned src_0 = bi_get_src(ins, regs, 0, true);
- unsigned src_1 = bi_get_src(ins, regs, 1, true);
+ unsigned src_0 = bi_get_src(ins, regs, 0);
+ unsigned src_1 = bi_get_src(ins, regs, 1);
if (FMA) {
struct bifrost_fma_add_minmax16 pack = {
bi_pack_fma_1src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
{
struct bifrost_fma_inst pack = {
- .src0 = bi_get_src(ins, regs, 0, true),
+ .src0 = bi_get_src(ins, regs, 0),
.op = op
};
bi_pack_fma_2src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
{
struct bifrost_fma_2src pack = {
- .src0 = bi_get_src(ins, regs, 0, true),
- .src1 = bi_get_src(ins, regs, 1, true),
+ .src0 = bi_get_src(ins, regs, 0),
+ .src1 = bi_get_src(ins, regs, 1),
.op = op
};
bi_pack_add_1src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
{
struct bifrost_add_inst pack = {
- .src0 = bi_get_src(ins, regs, 0, true),
+ .src0 = bi_get_src(ins, regs, 0),
.op = op
};
unsigned res_1 = (invert ? 2 : 3);
struct bifrost_csel4 pack = {
- .src0 = bi_get_src(ins, regs, cmp_0, true),
- .src1 = bi_get_src(ins, regs, cmp_1, true),
- .src2 = bi_get_src(ins, regs, res_0, true),
- .src3 = bi_get_src(ins, regs, res_1, true),
+ .src0 = bi_get_src(ins, regs, cmp_0),
+ .src1 = bi_get_src(ins, regs, cmp_1),
+ .src2 = bi_get_src(ins, regs, res_0),
+ .src3 = bi_get_src(ins, regs, res_1),
.cond = cond,
.op = (size == 16) ? BIFROST_FMA_OP_CSEL4_V16 :
BIFROST_FMA_OP_CSEL4
if (from_size == 32 && to_size == 16 && from_base == nir_type_float && to_base == from_base) {
/* TODO: second vectorized source? */
struct bifrost_fma_2src pfma = {
- .src0 = bi_get_src(ins, regs, 0, true),
+ .src0 = bi_get_src(ins, regs, 0),
.src1 = BIFROST_SRC_STAGE, /* 0 */
.op = BIFROST_FMA_FLOAT32_TO_16
};
struct bifrost_add_2src padd = {
- .src0 = bi_get_src(ins, regs, 0, true),
+ .src0 = bi_get_src(ins, regs, 0),
.src1 = BIFROST_SRC_STAGE, /* 0 */
.op = BIFROST_ADD_FLOAT32_TO_16
};
}
struct bifrost_fma_sel8 pack = {
- .src0 = bi_get_src(ins, regs, 0, true),
- .src1 = bi_get_src(ins, regs, 1, true),
- .src2 = bi_get_src(ins, regs, 2, true),
- .src3 = bi_get_src(ins, regs, 3, true),
+ .src0 = bi_get_src(ins, regs, 0),
+ .src1 = bi_get_src(ins, regs, 1),
+ .src2 = bi_get_src(ins, regs, 2),
+ .src3 = bi_get_src(ins, regs, 3),
.swizzle = swiz,
.op = BIFROST_FMA_OP_SEL8
};
cond = bi_flip_fcmp(cond);
struct bifrost_fma_fcmp pack = {
- .src0 = bi_get_src(ins, regs, 0, true),
- .src1 = bi_get_src(ins, regs, 1, true),
+ .src0 = bi_get_src(ins, regs, 0),
+ .src1 = bi_get_src(ins, regs, 1),
.src0_abs = ins->src_abs[0],
.src1_abs = ins->src_abs[1],
.src1_neg = neg,
cond = bi_flip_fcmp(cond);
struct bifrost_fma_fcmp16 pack = {
- .src0 = bi_get_src(ins, regs, flip ? 1 : 0, true),
- .src1 = bi_get_src(ins, regs, flip ? 0 : 1, true),
+ .src0 = bi_get_src(ins, regs, flip ? 1 : 0),
+ .src1 = bi_get_src(ins, regs, flip ? 0 : 1),
.src0_swizzle = bi_swiz16(ins, flip ? 1 : 0),
.src1_swizzle = bi_swiz16(ins, flip ? 0 : 1),
.abs1 = l,
}
struct bifrost_shift_fma pack = {
- .src0 = bi_get_src(ins, regs, 0, true),
- .src1 = bi_get_src(ins, regs, 1, true),
- .src2 = bi_get_src(ins, regs, 2, true),
+ .src0 = bi_get_src(ins, regs, 0),
+ .src1 = bi_get_src(ins, regs, 1),
+ .src2 = bi_get_src(ins, regs, 2),
.half = (size == 32) ? 0 : (size == 16) ? 0x7 : (size == 8) ? 0x4 : 0,
.unk = 1, /* XXX */
.invert_1 = invert_0,
return bi_pack_fma_1src(ins, regs, op);
}
-
+
+static unsigned
+bi_pack_fma_imath(bi_instruction *ins, struct bi_registers *regs)
+{
+ /* Scheduler: only ADD can have 8/16-bit imath */
+ assert(ins->dest_type == nir_type_int32 || ins->dest_type == nir_type_uint32);
+
+ unsigned op = ins->op.imath == BI_IMATH_ADD
+ ? BIFROST_FMA_IADD_32
+ : BIFROST_FMA_ISUB_32;
+
+ return bi_pack_fma_2src(ins, regs, op);
+}
+
static unsigned
bi_pack_fma(bi_clause *clause, bi_bundle bundle, struct bi_registers *regs)
{
return bi_pack_fma_fma(bundle.fma, regs);
case BI_FREXP:
return bi_pack_fma_frexp(bundle.fma, regs);
- case BI_ISUB:
- unreachable("Packing todo");
+ case BI_IMATH:
+ return bi_pack_fma_imath(bundle.fma, regs);
case BI_MINMAX:
return bi_pack_fma_addmin(bundle.fma, regs);
case BI_MOV:
packed_addr = bi_get_immediate(ins, 0);
} else {
/* Indirect gets an extra source */
- packed_addr = bi_get_src(ins, regs, 0, false) | 0b11000;
+ packed_addr = bi_get_src(ins, regs, 0) | 0b11000;
}
/* The destination is thrown in the data register */
assert(channels >= 1 && channels <= 4);
struct bifrost_ld_var pack = {
- .src0 = bi_get_src(ins, regs, 1, false),
+ .src0 = bi_get_src(ins, regs, 1),
.addr = packed_addr,
.channels = MALI_POSITIVE(channels),
.interp_mode = ins->load_vary.interp_mode,
bi_pack_add_2src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
{
struct bifrost_add_2src pack = {
- .src0 = bi_get_src(ins, regs, 0, true),
- .src1 = bi_get_src(ins, regs, 1, true),
+ .src0 = bi_get_src(ins, regs, 0),
+ .src1 = bi_get_src(ins, regs, 1),
.op = op
};
BIFROST_ADD_OP_FMAX32;
struct bifrost_add_faddmin pack = {
- .src0 = bi_get_src(ins, regs, 0, true),
- .src1 = bi_get_src(ins, regs, 1, true),
+ .src0 = bi_get_src(ins, regs, 0),
+ .src1 = bi_get_src(ins, regs, 1),
.src0_abs = ins->src_abs[0],
.src1_abs = ins->src_abs[1],
.src0_neg = ins->src_neg[0],
assert(ins->outmod == BIFROST_NONE);
struct bifrost_add_faddmin pack = {
- .src0 = bi_get_src(ins, regs, 0, true),
- .src1 = bi_get_src(ins, regs, 1, true),
+ .src0 = bi_get_src(ins, regs, 0),
+ .src1 = bi_get_src(ins, regs, 1),
.src0_abs = ins->src_abs[0],
.src1_abs = ins->src_abs[1],
.src0_neg = ins->src_neg[0],
bi_pack_add_ld_var_addr(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
{
struct bifrost_ld_var_addr pack = {
- .src0 = bi_get_src(ins, regs, 1, false),
- .src1 = bi_get_src(ins, regs, 2, false),
+ .src0 = bi_get_src(ins, regs, 1),
+ .src1 = bi_get_src(ins, regs, 2),
.location = bi_get_immediate(ins, 0),
.type = bi_pack_ldst_type(ins->src_types[3]),
.op = BIFROST_ADD_OP_LD_VAR_ADDR
assert(ins->vector_channels >= 0 && ins->vector_channels <= 4);
struct bifrost_ld_attr pack = {
- .src0 = bi_get_src(ins, regs, 1, false),
- .src1 = bi_get_src(ins, regs, 2, false),
+ .src0 = bi_get_src(ins, regs, 1),
+ .src1 = bi_get_src(ins, regs, 2),
.location = bi_get_immediate(ins, 0),
.channels = MALI_POSITIVE(ins->vector_channels),
.type = bi_pack_ldst_type(ins->dest_type),
assert(ins->vector_channels >= 1 && ins->vector_channels <= 4);
struct bifrost_st_vary pack = {
- .src0 = bi_get_src(ins, regs, 1, false),
- .src1 = bi_get_src(ins, regs, 2, false),
- .src2 = bi_get_src(ins, regs, 3, false),
+ .src0 = bi_get_src(ins, regs, 1),
+ .src1 = bi_get_src(ins, regs, 2),
+ .src2 = bi_get_src(ins, regs, 3),
.channels = MALI_POSITIVE(ins->vector_channels),
.op = BIFROST_ADD_OP_ST_VAR
};
bool fp16 = (ins->src_types[1] == nir_type_float16);
struct bifrost_add_atest pack = {
- .src0 = bi_get_src(ins, regs, 0, false),
- .src1 = bi_get_src(ins, regs, 1, false),
+ .src0 = bi_get_src(ins, regs, 0),
+ .src1 = bi_get_src(ins, regs, 1),
.half = fp16,
.component = fp16 ? ins->swizzle[1][0] : 1, /* Set for fp32 */
.op = BIFROST_ADD_OP_ATEST,
bi_pack_add_blend(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
{
struct bifrost_add_inst pack = {
- .src0 = bi_get_src(ins, regs, 1, false),
+ .src0 = bi_get_src(ins, regs, 1),
.op = BIFROST_ADD_OP_BLEND
};
return bi_pack_add_1src(ins, regs, op);
}
static unsigned
-bi_pack_add_tex_compact(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
+bi_pack_add_tex_compact(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs, gl_shader_stage stage)
{
bool f16 = ins->dest_type == nir_type_float16;
+ bool vtx = stage != MESA_SHADER_FRAGMENT;
struct bifrost_tex_compact pack = {
- .src0 = bi_get_src(ins, regs, 0, false),
- .src1 = bi_get_src(ins, regs, 1, false),
- .op = f16 ? BIFROST_ADD_OP_TEX_COMPACT_F16 :
- BIFROST_ADD_OP_TEX_COMPACT_F32,
- .unknown = 1,
+ .src0 = bi_get_src(ins, regs, 0),
+ .src1 = bi_get_src(ins, regs, 1),
+ .op = f16 ? BIFROST_ADD_OP_TEX_COMPACT_F16(vtx) :
+ BIFROST_ADD_OP_TEX_COMPACT_F32(vtx),
+ .compute_lod = !vtx,
.tex_index = ins->texture.texture_index,
.sampler_index = ins->texture.sampler_index
};
enum bifrost_discard_cond cond = bi_cond_to_discard(ins->cond, &flip);
struct bifrost_add_discard pack = {
- .src0 = bi_get_src(ins, regs, flip ? 1 : 0, false),
- .src1 = bi_get_src(ins, regs, flip ? 0 : 1, false),
+ .src0 = bi_get_src(ins, regs, flip ? 1 : 0),
+ .src1 = bi_get_src(ins, regs, flip ? 0 : 1),
.cond = cond,
.src0_select = fp16 ? ins->swizzle[0][0] : 0,
.src1_select = fp16 ? ins->swizzle[1][0] : 0,
enum bifrost_icmp_cond cond)
{
struct bifrost_add_icmp pack = {
- .src0 = bi_get_src(ins, regs, flip ? 1 : 0, true),
- .src1 = bi_get_src(ins, regs, flip ? 0 : 1, true),
+ .src0 = bi_get_src(ins, regs, flip ? 1 : 0),
+ .src1 = bi_get_src(ins, regs, flip ? 0 : 1),
.cond = cond,
.sz = 1,
.d3d = false,
enum bifrost_icmp_cond cond)
{
struct bifrost_add_icmp16 pack = {
- .src0 = bi_get_src(ins, regs, flip ? 1 : 0, false),
- .src1 = bi_get_src(ins, regs, flip ? 0 : 1, false),
+ .src0 = bi_get_src(ins, regs, flip ? 1 : 0),
+ .src1 = bi_get_src(ins, regs, flip ? 0 : 1),
.src0_swizzle = bi_swiz16(ins, flip ? 1 : 0),
.src1_swizzle = bi_swiz16(ins, flip ? 0 : 1),
.cond = cond,
}
static unsigned
-bi_pack_add(bi_clause *clause, bi_bundle bundle, struct bi_registers *regs)
+bi_pack_add_imath(bi_instruction *ins, struct bi_registers *regs)
+{
+ /* TODO: 32+16 add */
+ assert(ins->src_types[0] == ins->src_types[1]);
+ unsigned sz = nir_alu_type_get_type_size(ins->src_types[0]);
+ enum bi_imath_op p = ins->op.imath;
+
+ unsigned op = 0;
+
+ if (sz == 8) {
+ op = (p == BI_IMATH_ADD) ? BIFROST_ADD_IADD_8 :
+ BIFROST_ADD_ISUB_8;
+ } else if (sz == 16) {
+ op = (p == BI_IMATH_ADD) ? BIFROST_ADD_IADD_16 :
+ BIFROST_ADD_ISUB_16;
+ } else if (sz == 32) {
+ op = (p == BI_IMATH_ADD) ? BIFROST_ADD_IADD_32 :
+ BIFROST_ADD_ISUB_32;
+ } else {
+ unreachable("64-bit todo");
+ }
+
+ return bi_pack_add_2src(ins, regs, op);
+}
+
+static unsigned
+bi_pack_add(bi_clause *clause, bi_bundle bundle, struct bi_registers *regs, gl_shader_stage stage)
{
if (!bundle.add)
return BIFROST_ADD_NOP;
case BI_DISCARD:
return bi_pack_add_discard(bundle.add, regs);
case BI_FREXP:
- case BI_ISUB:
+ unreachable("Packing todo");
+ case BI_IMATH:
+ return bi_pack_add_imath(bundle.add, regs);
case BI_LOAD:
unreachable("Packing todo");
case BI_LOAD_ATTR:
return bi_pack_add_select(bundle.add, regs);
case BI_TEX:
if (bundle.add->op.texture == BI_TEX_COMPACT)
- return bi_pack_add_tex_compact(clause, bundle.add, regs);
+ return bi_pack_add_tex_compact(clause, bundle.add, regs, stage);
else
unreachable("Unknown tex type");
case BI_ROUND:
};
static struct bi_packed_bundle
-bi_pack_bundle(bi_clause *clause, bi_bundle bundle, bi_bundle prev, bool first_bundle)
+bi_pack_bundle(bi_clause *clause, bi_bundle bundle, bi_bundle prev, bool first_bundle, gl_shader_stage stage)
{
struct bi_registers regs = bi_assign_ports(bundle, prev);
bi_assign_uniform_constant(clause, ®s, bundle);
uint64_t reg = bi_pack_registers(regs);
uint64_t fma = bi_pack_fma(clause, bundle, ®s);
- uint64_t add = bi_pack_add(clause, bundle, ®s);
+ uint64_t add = bi_pack_add(clause, bundle, ®s, stage);
struct bi_packed_bundle packed = {
.lo = reg | (fma << 35) | ((add & 0b111111) << 58),
static void
bi_pack_clause(bi_context *ctx, bi_clause *clause, bi_clause *next,
- struct util_dynarray *emission)
+ struct util_dynarray *emission, gl_shader_stage stage)
{
- struct bi_packed_bundle ins_1 = bi_pack_bundle(clause, clause->bundles[0], clause->bundles[0], true);
+ struct bi_packed_bundle ins_1 = bi_pack_bundle(clause, clause->bundles[0], clause->bundles[0], true, stage);
assert(clause->bundle_count == 1);
/* Used to decide if we elide writes */
bi_foreach_clause_in_block(block, clause) {
bi_clause *next = bi_next_clause(ctx, _block, clause);
- bi_pack_clause(ctx, clause, next, emission);
+ bi_pack_clause(ctx, clause, next, emission, ctx->stage);
}
}
}
projects / mesa.git / blobdiff